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[qemu.git] / target-m68k / op_helper.c
CommitLineData
0633879f
PB
1/*
2 * M68K helper routines
5fafdf24 3 *
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4 * Copyright (c) 2007 CodeSourcery
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
0633879f 18 */
3e457172 19#include "cpu.h"
2ef6175a 20#include "exec/helper-proto.h"
f08b6170 21#include "exec/cpu_ldst.h"
cfe67cef 22#include "exec/semihost.h"
0633879f
PB
23
24#if defined(CONFIG_USER_ONLY)
25
97a8ea5a 26void m68k_cpu_do_interrupt(CPUState *cs)
3c688828 27{
27103424 28 cs->exception_index = -1;
3c688828
BS
29}
30
ab409bb3 31static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
0633879f 32{
0633879f
PB
33}
34
35#else
36
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37/* Try to fill the TLB and return an exception if error. If retaddr is
38 NULL, it means that the function was called in C code (i.e. not
39 from generated code or from helper.c) */
d5a11fef 40void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
20503968 41 uintptr_t retaddr)
0633879f 42{
0633879f
PB
43 int ret;
44
d5a11fef 45 ret = m68k_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
551bd27f 46 if (unlikely(ret)) {
0633879f
PB
47 if (retaddr) {
48 /* now we have a real cpu fault */
3f38f309 49 cpu_restore_state(cs, retaddr);
0633879f 50 }
5638d180 51 cpu_loop_exit(cs);
0633879f 52 }
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PB
53}
54
31871141 55static void do_rte(CPUM68KState *env)
0633879f
PB
56{
57 uint32_t sp;
58 uint32_t fmt;
59
60 sp = env->aregs[7];
31871141
BS
61 fmt = cpu_ldl_kernel(env, sp);
62 env->pc = cpu_ldl_kernel(env, sp + 4);
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PB
63 sp |= (fmt >> 28) & 3;
64 env->sr = fmt & 0xffff;
65 env->aregs[7] = sp + 8;
0c8ff723 66 m68k_switch_sp(env);
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PB
67}
68
31871141 69static void do_interrupt_all(CPUM68KState *env, int is_hw)
0633879f 70{
27103424 71 CPUState *cs = CPU(m68k_env_get_cpu(env));
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PB
72 uint32_t sp;
73 uint32_t fmt;
74 uint32_t retaddr;
75 uint32_t vector;
76
77 fmt = 0;
78 retaddr = env->pc;
79
80 if (!is_hw) {
27103424 81 switch (cs->exception_index) {
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PB
82 case EXCP_RTE:
83 /* Return from an exception. */
31871141 84 do_rte(env);
0633879f 85 return;
a87295e8 86 case EXCP_HALT_INSN:
cfe67cef 87 if (semihosting_enabled()
a87295e8
PB
88 && (env->sr & SR_S) != 0
89 && (env->pc & 3) == 0
31871141
BS
90 && cpu_lduw_code(env, env->pc - 4) == 0x4e71
91 && cpu_ldl_code(env, env->pc) == 0x4e7bf000) {
a87295e8
PB
92 env->pc += 4;
93 do_m68k_semihosting(env, env->dregs[0]);
94 return;
95 }
259186a7 96 cs->halted = 1;
27103424 97 cs->exception_index = EXCP_HLT;
5638d180 98 cpu_loop_exit(cs);
a87295e8 99 return;
0633879f 100 }
27103424
AF
101 if (cs->exception_index >= EXCP_TRAP0
102 && cs->exception_index <= EXCP_TRAP15) {
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PB
103 /* Move the PC after the trap instruction. */
104 retaddr += 2;
105 }
106 }
107
27103424 108 vector = cs->exception_index << 2;
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PB
109
110 fmt |= 0x40000000;
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PB
111 fmt |= vector << 16;
112 fmt |= env->sr;
113
20dcee94
PB
114 env->sr |= SR_S;
115 if (is_hw) {
116 env->sr = (env->sr & ~SR_I) | (env->pending_level << SR_I_SHIFT);
117 env->sr &= ~SR_M;
118 }
119 m68k_switch_sp(env);
0c8ff723
GU
120 sp = env->aregs[7];
121 fmt |= (sp & 3) << 28;
20dcee94 122
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123 /* ??? This could cause MMU faults. */
124 sp &= ~3;
125 sp -= 4;
31871141 126 cpu_stl_kernel(env, sp, retaddr);
0633879f 127 sp -= 4;
31871141 128 cpu_stl_kernel(env, sp, fmt);
0633879f 129 env->aregs[7] = sp;
0633879f 130 /* Jump to vector. */
31871141 131 env->pc = cpu_ldl_kernel(env, env->vbr + vector);
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132}
133
97a8ea5a 134void m68k_cpu_do_interrupt(CPUState *cs)
3c688828 135{
97a8ea5a
AF
136 M68kCPU *cpu = M68K_CPU(cs);
137 CPUM68KState *env = &cpu->env;
138
31871141 139 do_interrupt_all(env, 0);
3c688828
BS
140}
141
ab409bb3 142static inline void do_interrupt_m68k_hardirq(CPUM68KState *env)
3c688828 143{
31871141 144 do_interrupt_all(env, 1);
3c688828 145}
0633879f 146#endif
e1f3808e 147
ab409bb3
RH
148bool m68k_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
149{
150 M68kCPU *cpu = M68K_CPU(cs);
151 CPUM68KState *env = &cpu->env;
152
153 if (interrupt_request & CPU_INTERRUPT_HARD
154 && ((env->sr & SR_I) >> SR_I_SHIFT) < env->pending_level) {
155 /* Real hardware gets the interrupt vector via an IACK cycle
156 at this point. Current emulated hardware doesn't rely on
157 this, so we provide/save the vector when the interrupt is
158 first signalled. */
159 cs->exception_index = env->pending_vector;
160 do_interrupt_m68k_hardirq(env);
161 return true;
162 }
163 return false;
164}
165
31871141 166static void raise_exception(CPUM68KState *env, int tt)
e1f3808e 167{
27103424
AF
168 CPUState *cs = CPU(m68k_env_get_cpu(env));
169
170 cs->exception_index = tt;
5638d180 171 cpu_loop_exit(cs);
e1f3808e
PB
172}
173
31871141 174void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
e1f3808e 175{
31871141 176 raise_exception(env, tt);
e1f3808e
PB
177}
178
2b3e3cfe 179void HELPER(divu)(CPUM68KState *env, uint32_t word)
e1f3808e
PB
180{
181 uint32_t num;
182 uint32_t den;
183 uint32_t quot;
184 uint32_t rem;
185 uint32_t flags;
186
187 num = env->div1;
188 den = env->div2;
189 /* ??? This needs to make sure the throwing location is accurate. */
31871141
BS
190 if (den == 0) {
191 raise_exception(env, EXCP_DIV0);
192 }
e1f3808e
PB
193 quot = num / den;
194 rem = num % den;
195 flags = 0;
e1f3808e
PB
196 if (word && quot > 0xffff)
197 flags |= CCF_V;
198 if (quot == 0)
199 flags |= CCF_Z;
200 else if ((int32_t)quot < 0)
201 flags |= CCF_N;
202 env->div1 = quot;
203 env->div2 = rem;
204 env->cc_dest = flags;
205}
206
2b3e3cfe 207void HELPER(divs)(CPUM68KState *env, uint32_t word)
e1f3808e
PB
208{
209 int32_t num;
210 int32_t den;
211 int32_t quot;
212 int32_t rem;
213 int32_t flags;
214
215 num = env->div1;
216 den = env->div2;
31871141
BS
217 if (den == 0) {
218 raise_exception(env, EXCP_DIV0);
219 }
e1f3808e
PB
220 quot = num / den;
221 rem = num % den;
222 flags = 0;
223 if (word && quot != (int16_t)quot)
224 flags |= CCF_V;
225 if (quot == 0)
226 flags |= CCF_Z;
227 else if (quot < 0)
228 flags |= CCF_N;
229 env->div1 = quot;
230 env->div2 = rem;
231 env->cc_dest = flags;
232}
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