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1 | /* |
2 | * QTest testcase for the M25P80 Flash (Using the Aspeed SPI | |
3 | * Controller) | |
4 | * | |
5 | * Copyright (C) 2016 IBM Corp. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #include "qemu/osdep.h" | |
27 | #include "qemu/bswap.h" | |
28 | #include "libqtest.h" | |
29 | ||
30 | /* | |
31 | * ASPEED SPI Controller registers | |
32 | */ | |
33 | #define R_CONF 0x00 | |
34 | #define CONF_ENABLE_W0 (1 << 16) | |
35 | #define R_CE_CTRL 0x04 | |
36 | #define CRTL_EXTENDED0 0 /* 32 bit addressing for SPI */ | |
37 | #define R_CTRL0 0x10 | |
38 | #define CTRL_CE_STOP_ACTIVE (1 << 2) | |
39 | #define CTRL_USERMODE 0x3 | |
40 | ||
41 | #define ASPEED_FMC_BASE 0x1E620000 | |
42 | #define ASPEED_FLASH_BASE 0x20000000 | |
43 | ||
44 | /* | |
45 | * Flash commands | |
46 | */ | |
47 | enum { | |
48 | JEDEC_READ = 0x9f, | |
49 | BULK_ERASE = 0xc7, | |
50 | READ = 0x03, | |
51 | PP = 0x02, | |
52 | WREN = 0x6, | |
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53 | RESET_ENABLE = 0x66, |
54 | RESET_MEMORY = 0x99, | |
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55 | EN_4BYTE_ADDR = 0xB7, |
56 | ERASE_SECTOR = 0xd8, | |
57 | }; | |
58 | ||
59 | #define FLASH_JEDEC 0x20ba19 /* n25q256a */ | |
60 | #define FLASH_SIZE (32 * 1024 * 1024) | |
61 | ||
62 | #define PAGE_SIZE 256 | |
63 | ||
64 | /* | |
65 | * Use an explicit bswap for the values read/wrote to the flash region | |
66 | * as they are BE and the Aspeed CPU is LE. | |
67 | */ | |
68 | static inline uint32_t make_be32(uint32_t data) | |
69 | { | |
70 | return bswap32(data); | |
71 | } | |
72 | ||
73 | static void spi_conf(uint32_t value) | |
74 | { | |
75 | uint32_t conf = readl(ASPEED_FMC_BASE + R_CONF); | |
76 | ||
77 | conf |= value; | |
78 | writel(ASPEED_FMC_BASE + R_CONF, conf); | |
79 | } | |
80 | ||
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81 | static void spi_conf_remove(uint32_t value) |
82 | { | |
83 | uint32_t conf = readl(ASPEED_FMC_BASE + R_CONF); | |
84 | ||
85 | conf &= ~value; | |
86 | writel(ASPEED_FMC_BASE + R_CONF, conf); | |
87 | } | |
88 | ||
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89 | static void spi_ctrl_start_user(void) |
90 | { | |
91 | uint32_t ctrl = readl(ASPEED_FMC_BASE + R_CTRL0); | |
92 | ||
93 | ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE; | |
94 | writel(ASPEED_FMC_BASE + R_CTRL0, ctrl); | |
95 | ||
96 | ctrl &= ~CTRL_CE_STOP_ACTIVE; | |
97 | writel(ASPEED_FMC_BASE + R_CTRL0, ctrl); | |
98 | } | |
99 | ||
100 | static void spi_ctrl_stop_user(void) | |
101 | { | |
102 | uint32_t ctrl = readl(ASPEED_FMC_BASE + R_CTRL0); | |
103 | ||
104 | ctrl |= CTRL_USERMODE | CTRL_CE_STOP_ACTIVE; | |
105 | writel(ASPEED_FMC_BASE + R_CTRL0, ctrl); | |
106 | } | |
107 | ||
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108 | static void flash_reset(void) |
109 | { | |
110 | spi_conf(CONF_ENABLE_W0); | |
111 | ||
112 | spi_ctrl_start_user(); | |
113 | writeb(ASPEED_FLASH_BASE, RESET_ENABLE); | |
114 | writeb(ASPEED_FLASH_BASE, RESET_MEMORY); | |
115 | spi_ctrl_stop_user(); | |
116 | ||
117 | spi_conf_remove(CONF_ENABLE_W0); | |
118 | } | |
119 | ||
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120 | static void test_read_jedec(void) |
121 | { | |
122 | uint32_t jedec = 0x0; | |
123 | ||
124 | spi_conf(CONF_ENABLE_W0); | |
125 | ||
126 | spi_ctrl_start_user(); | |
127 | writeb(ASPEED_FLASH_BASE, JEDEC_READ); | |
128 | jedec |= readb(ASPEED_FLASH_BASE) << 16; | |
129 | jedec |= readb(ASPEED_FLASH_BASE) << 8; | |
130 | jedec |= readb(ASPEED_FLASH_BASE); | |
131 | spi_ctrl_stop_user(); | |
132 | ||
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133 | flash_reset(); |
134 | ||
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135 | g_assert_cmphex(jedec, ==, FLASH_JEDEC); |
136 | } | |
137 | ||
138 | static void read_page(uint32_t addr, uint32_t *page) | |
139 | { | |
140 | int i; | |
141 | ||
142 | spi_ctrl_start_user(); | |
143 | ||
144 | writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR); | |
145 | writeb(ASPEED_FLASH_BASE, READ); | |
146 | writel(ASPEED_FLASH_BASE, make_be32(addr)); | |
147 | ||
148 | /* Continuous read are supported */ | |
149 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
150 | page[i] = make_be32(readl(ASPEED_FLASH_BASE)); | |
151 | } | |
152 | spi_ctrl_stop_user(); | |
153 | } | |
154 | ||
155 | static void test_erase_sector(void) | |
156 | { | |
157 | uint32_t some_page_addr = 0x600 * PAGE_SIZE; | |
158 | uint32_t page[PAGE_SIZE / 4]; | |
159 | int i; | |
160 | ||
161 | spi_conf(CONF_ENABLE_W0); | |
162 | ||
163 | spi_ctrl_start_user(); | |
164 | writeb(ASPEED_FLASH_BASE, WREN); | |
165 | writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR); | |
166 | writeb(ASPEED_FLASH_BASE, ERASE_SECTOR); | |
167 | writel(ASPEED_FLASH_BASE, make_be32(some_page_addr)); | |
168 | spi_ctrl_stop_user(); | |
169 | ||
170 | /* Previous page should be full of zeroes as backend is not | |
171 | * initialized */ | |
172 | read_page(some_page_addr - PAGE_SIZE, page); | |
173 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
174 | g_assert_cmphex(page[i], ==, 0x0); | |
175 | } | |
176 | ||
177 | /* But this one was erased */ | |
178 | read_page(some_page_addr, page); | |
179 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
180 | g_assert_cmphex(page[i], ==, 0xffffffff); | |
181 | } | |
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182 | |
183 | flash_reset(); | |
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184 | } |
185 | ||
186 | static void test_erase_all(void) | |
187 | { | |
188 | uint32_t some_page_addr = 0x15000 * PAGE_SIZE; | |
189 | uint32_t page[PAGE_SIZE / 4]; | |
190 | int i; | |
191 | ||
192 | spi_conf(CONF_ENABLE_W0); | |
193 | ||
194 | /* Check some random page. Should be full of zeroes as backend is | |
195 | * not initialized */ | |
196 | read_page(some_page_addr, page); | |
197 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
198 | g_assert_cmphex(page[i], ==, 0x0); | |
199 | } | |
200 | ||
201 | spi_ctrl_start_user(); | |
202 | writeb(ASPEED_FLASH_BASE, WREN); | |
203 | writeb(ASPEED_FLASH_BASE, BULK_ERASE); | |
204 | spi_ctrl_stop_user(); | |
205 | ||
206 | /* Recheck that some random page */ | |
207 | read_page(some_page_addr, page); | |
208 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
209 | g_assert_cmphex(page[i], ==, 0xffffffff); | |
210 | } | |
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211 | |
212 | flash_reset(); | |
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213 | } |
214 | ||
215 | static void test_write_page(void) | |
216 | { | |
217 | uint32_t my_page_addr = 0x14000 * PAGE_SIZE; /* beyond 16MB */ | |
218 | uint32_t some_page_addr = 0x15000 * PAGE_SIZE; | |
219 | uint32_t page[PAGE_SIZE / 4]; | |
220 | int i; | |
221 | ||
222 | spi_conf(CONF_ENABLE_W0); | |
223 | ||
224 | spi_ctrl_start_user(); | |
225 | writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR); | |
bd9f5052 | 226 | writeb(ASPEED_FLASH_BASE, WREN); |
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227 | writeb(ASPEED_FLASH_BASE, PP); |
228 | writel(ASPEED_FLASH_BASE, make_be32(my_page_addr)); | |
229 | ||
230 | /* Fill the page with its own addresses */ | |
231 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
232 | writel(ASPEED_FLASH_BASE, make_be32(my_page_addr + i * 4)); | |
233 | } | |
234 | spi_ctrl_stop_user(); | |
235 | ||
236 | /* Check what was written */ | |
237 | read_page(my_page_addr, page); | |
238 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
239 | g_assert_cmphex(page[i], ==, my_page_addr + i * 4); | |
240 | } | |
241 | ||
242 | /* Check some other page. It should be full of 0xff */ | |
243 | read_page(some_page_addr, page); | |
244 | for (i = 0; i < PAGE_SIZE / 4; i++) { | |
245 | g_assert_cmphex(page[i], ==, 0xffffffff); | |
246 | } | |
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247 | |
248 | flash_reset(); | |
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249 | } |
250 | ||
251 | static char tmp_path[] = "/tmp/qtest.m25p80.XXXXXX"; | |
252 | ||
253 | int main(int argc, char **argv) | |
254 | { | |
255 | int ret; | |
256 | int fd; | |
257 | char *args; | |
258 | ||
259 | g_test_init(&argc, &argv, NULL); | |
260 | ||
261 | fd = mkstemp(tmp_path); | |
262 | g_assert(fd >= 0); | |
263 | ret = ftruncate(fd, FLASH_SIZE); | |
264 | g_assert(ret == 0); | |
265 | close(fd); | |
266 | ||
267 | args = g_strdup_printf("-m 256 -machine palmetto-bmc " | |
268 | "-drive file=%s,format=raw,if=mtd", | |
269 | tmp_path); | |
270 | qtest_start(args); | |
271 | ||
272 | qtest_add_func("/m25p80/read_jedec", test_read_jedec); | |
273 | qtest_add_func("/m25p80/erase_sector", test_erase_sector); | |
274 | qtest_add_func("/m25p80/erase_all", test_erase_all); | |
275 | qtest_add_func("/m25p80/write_page", test_write_page); | |
276 | ||
277 | ret = g_test_run(); | |
278 | ||
279 | qtest_quit(global_qtest); | |
280 | unlink(tmp_path); | |
281 | g_free(args); | |
282 | return ret; | |
283 | } |