]> Git Repo - qemu.git/blame - target-i386/op.c
16/32 stack operations fix on x86_64 (aka win2000 startup bug)
[qemu.git] / target-i386 / op.c
CommitLineData
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1/*
2 * i386 micro operations
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
f68dd770 20
f68dd770 21#define ASM_SOFTMMU
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22#include "exec.h"
23
24/* n must be a constant to be efficient */
14ce26e7 25static inline target_long lshift(target_long x, int n)
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26{
27 if (n >= 0)
28 return x << n;
29 else
30 return x >> (-n);
31}
32
33/* we define the various pieces of code used by the JIT */
34
35#define REG EAX
36#define REGNAME _EAX
37#include "opreg_template.h"
38#undef REG
39#undef REGNAME
40
41#define REG ECX
42#define REGNAME _ECX
43#include "opreg_template.h"
44#undef REG
45#undef REGNAME
46
47#define REG EDX
48#define REGNAME _EDX
49#include "opreg_template.h"
50#undef REG
51#undef REGNAME
52
53#define REG EBX
54#define REGNAME _EBX
55#include "opreg_template.h"
56#undef REG
57#undef REGNAME
58
59#define REG ESP
60#define REGNAME _ESP
61#include "opreg_template.h"
62#undef REG
63#undef REGNAME
64
65#define REG EBP
66#define REGNAME _EBP
67#include "opreg_template.h"
68#undef REG
69#undef REGNAME
70
71#define REG ESI
72#define REGNAME _ESI
73#include "opreg_template.h"
74#undef REG
75#undef REGNAME
76
77#define REG EDI
78#define REGNAME _EDI
79#include "opreg_template.h"
80#undef REG
81#undef REGNAME
82
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83#ifdef TARGET_X86_64
84
85#define REG (env->regs[8])
86#define REGNAME _R8
87#include "opreg_template.h"
88#undef REG
89#undef REGNAME
90
91#define REG (env->regs[9])
92#define REGNAME _R9
93#include "opreg_template.h"
94#undef REG
95#undef REGNAME
96
97#define REG (env->regs[10])
98#define REGNAME _R10
99#include "opreg_template.h"
100#undef REG
101#undef REGNAME
102
103#define REG (env->regs[11])
104#define REGNAME _R11
105#include "opreg_template.h"
106#undef REG
107#undef REGNAME
108
109#define REG (env->regs[12])
110#define REGNAME _R12
111#include "opreg_template.h"
112#undef REG
113#undef REGNAME
114
115#define REG (env->regs[13])
116#define REGNAME _R13
117#include "opreg_template.h"
118#undef REG
119#undef REGNAME
120
121#define REG (env->regs[14])
122#define REGNAME _R14
123#include "opreg_template.h"
124#undef REG
125#undef REGNAME
126
127#define REG (env->regs[15])
128#define REGNAME _R15
129#include "opreg_template.h"
130#undef REG
131#undef REGNAME
132
133#endif
134
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135/* operations with flags */
136
137/* update flags with T0 and T1 (add/sub case) */
138void OPPROTO op_update2_cc(void)
139{
140 CC_SRC = T1;
141 CC_DST = T0;
142}
143
144/* update flags with T0 (logic operation case) */
145void OPPROTO op_update1_cc(void)
146{
147 CC_DST = T0;
148}
149
150void OPPROTO op_update_neg_cc(void)
151{
152 CC_SRC = -T0;
153 CC_DST = T0;
154}
155
156void OPPROTO op_cmpl_T0_T1_cc(void)
157{
158 CC_SRC = T1;
159 CC_DST = T0 - T1;
160}
161
162void OPPROTO op_update_inc_cc(void)
163{
164 CC_SRC = cc_table[CC_OP].compute_c();
165 CC_DST = T0;
166}
167
168void OPPROTO op_testl_T0_T1_cc(void)
169{
170 CC_DST = T0 & T1;
171}
172
173/* operations without flags */
174
175void OPPROTO op_addl_T0_T1(void)
176{
177 T0 += T1;
178}
179
180void OPPROTO op_orl_T0_T1(void)
181{
182 T0 |= T1;
183}
184
185void OPPROTO op_andl_T0_T1(void)
186{
187 T0 &= T1;
188}
189
190void OPPROTO op_subl_T0_T1(void)
191{
192 T0 -= T1;
193}
194
195void OPPROTO op_xorl_T0_T1(void)
196{
197 T0 ^= T1;
198}
199
200void OPPROTO op_negl_T0(void)
201{
202 T0 = -T0;
203}
204
205void OPPROTO op_incl_T0(void)
206{
207 T0++;
208}
209
210void OPPROTO op_decl_T0(void)
211{
212 T0--;
213}
214
215void OPPROTO op_notl_T0(void)
216{
217 T0 = ~T0;
218}
219
220void OPPROTO op_bswapl_T0(void)
221{
222 T0 = bswap32(T0);
223}
224
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225#ifdef TARGET_X86_64
226void OPPROTO op_bswapq_T0(void)
227{
228 T0 = bswap64(T0);
229}
230#endif
231
2c0262af 232/* multiply/divide */
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233
234/* XXX: add eflags optimizations */
235/* XXX: add non P4 style flags */
236
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237void OPPROTO op_mulb_AL_T0(void)
238{
239 unsigned int res;
240 res = (uint8_t)EAX * (uint8_t)T0;
14ce26e7 241 EAX = (EAX & ~0xffff) | res;
d36cd60e 242 CC_DST = res;
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243 CC_SRC = (res & 0xff00);
244}
245
246void OPPROTO op_imulb_AL_T0(void)
247{
248 int res;
249 res = (int8_t)EAX * (int8_t)T0;
14ce26e7 250 EAX = (EAX & ~0xffff) | (res & 0xffff);
d36cd60e 251 CC_DST = res;
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252 CC_SRC = (res != (int8_t)res);
253}
254
255void OPPROTO op_mulw_AX_T0(void)
256{
257 unsigned int res;
258 res = (uint16_t)EAX * (uint16_t)T0;
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259 EAX = (EAX & ~0xffff) | (res & 0xffff);
260 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 261 CC_DST = res;
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262 CC_SRC = res >> 16;
263}
264
265void OPPROTO op_imulw_AX_T0(void)
266{
267 int res;
268 res = (int16_t)EAX * (int16_t)T0;
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269 EAX = (EAX & ~0xffff) | (res & 0xffff);
270 EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
d36cd60e 271 CC_DST = res;
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272 CC_SRC = (res != (int16_t)res);
273}
274
275void OPPROTO op_mull_EAX_T0(void)
276{
277 uint64_t res;
278 res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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279 EAX = (uint32_t)res;
280 EDX = (uint32_t)(res >> 32);
281 CC_DST = (uint32_t)res;
282 CC_SRC = (uint32_t)(res >> 32);
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283}
284
285void OPPROTO op_imull_EAX_T0(void)
286{
287 int64_t res;
288 res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
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289 EAX = (uint32_t)(res);
290 EDX = (uint32_t)(res >> 32);
d36cd60e 291 CC_DST = res;
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292 CC_SRC = (res != (int32_t)res);
293}
294
295void OPPROTO op_imulw_T0_T1(void)
296{
297 int res;
298 res = (int16_t)T0 * (int16_t)T1;
299 T0 = res;
d36cd60e 300 CC_DST = res;
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301 CC_SRC = (res != (int16_t)res);
302}
303
304void OPPROTO op_imull_T0_T1(void)
305{
306 int64_t res;
307 res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
308 T0 = res;
d36cd60e 309 CC_DST = res;
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310 CC_SRC = (res != (int32_t)res);
311}
312
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313#ifdef TARGET_X86_64
314void OPPROTO op_mulq_EAX_T0(void)
315{
316 helper_mulq_EAX_T0();
317}
318
319void OPPROTO op_imulq_EAX_T0(void)
320{
321 helper_imulq_EAX_T0();
322}
323
324void OPPROTO op_imulq_T0_T1(void)
325{
326 helper_imulq_T0_T1();
327}
328#endif
329
2c0262af 330/* division, flags are undefined */
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331
332void OPPROTO op_divb_AL_T0(void)
333{
334 unsigned int num, den, q, r;
335
336 num = (EAX & 0xffff);
337 den = (T0 & 0xff);
338 if (den == 0) {
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339 raise_exception(EXCP00_DIVZ);
340 }
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341 q = (num / den);
342 if (q > 0xff)
343 raise_exception(EXCP00_DIVZ);
344 q &= 0xff;
2c0262af 345 r = (num % den) & 0xff;
14ce26e7 346 EAX = (EAX & ~0xffff) | (r << 8) | q;
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347}
348
349void OPPROTO op_idivb_AL_T0(void)
350{
351 int num, den, q, r;
352
353 num = (int16_t)EAX;
354 den = (int8_t)T0;
355 if (den == 0) {
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356 raise_exception(EXCP00_DIVZ);
357 }
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358 q = (num / den);
359 if (q != (int8_t)q)
360 raise_exception(EXCP00_DIVZ);
361 q &= 0xff;
2c0262af 362 r = (num % den) & 0xff;
14ce26e7 363 EAX = (EAX & ~0xffff) | (r << 8) | q;
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364}
365
366void OPPROTO op_divw_AX_T0(void)
367{
368 unsigned int num, den, q, r;
369
370 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
371 den = (T0 & 0xffff);
372 if (den == 0) {
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373 raise_exception(EXCP00_DIVZ);
374 }
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375 q = (num / den);
376 if (q > 0xffff)
377 raise_exception(EXCP00_DIVZ);
378 q &= 0xffff;
2c0262af 379 r = (num % den) & 0xffff;
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380 EAX = (EAX & ~0xffff) | q;
381 EDX = (EDX & ~0xffff) | r;
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382}
383
384void OPPROTO op_idivw_AX_T0(void)
385{
386 int num, den, q, r;
387
388 num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
389 den = (int16_t)T0;
390 if (den == 0) {
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391 raise_exception(EXCP00_DIVZ);
392 }
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393 q = (num / den);
394 if (q != (int16_t)q)
395 raise_exception(EXCP00_DIVZ);
396 q &= 0xffff;
2c0262af 397 r = (num % den) & 0xffff;
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398 EAX = (EAX & ~0xffff) | q;
399 EDX = (EDX & ~0xffff) | r;
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400}
401
402void OPPROTO op_divl_EAX_T0(void)
403{
14ce26e7 404 helper_divl_EAX_T0();
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405}
406
407void OPPROTO op_idivl_EAX_T0(void)
408{
14ce26e7 409 helper_idivl_EAX_T0();
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410}
411
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412#ifdef TARGET_X86_64
413void OPPROTO op_divq_EAX_T0(void)
414{
415 helper_divq_EAX_T0();
416}
417
418void OPPROTO op_idivq_EAX_T0(void)
419{
420 helper_idivq_EAX_T0();
421}
422#endif
423
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424/* constant load & misc op */
425
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426/* XXX: consistent names */
427void OPPROTO op_movl_T0_imu(void)
428{
429 T0 = (uint32_t)PARAM1;
430}
431
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432void OPPROTO op_movl_T0_im(void)
433{
14ce26e7 434 T0 = (int32_t)PARAM1;
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435}
436
437void OPPROTO op_addl_T0_im(void)
438{
439 T0 += PARAM1;
440}
441
442void OPPROTO op_andl_T0_ffff(void)
443{
444 T0 = T0 & 0xffff;
445}
446
447void OPPROTO op_andl_T0_im(void)
448{
449 T0 = T0 & PARAM1;
450}
451
452void OPPROTO op_movl_T0_T1(void)
453{
454 T0 = T1;
455}
456
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457void OPPROTO op_movl_T1_imu(void)
458{
459 T1 = (uint32_t)PARAM1;
460}
461
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462void OPPROTO op_movl_T1_im(void)
463{
14ce26e7 464 T1 = (int32_t)PARAM1;
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465}
466
467void OPPROTO op_addl_T1_im(void)
468{
469 T1 += PARAM1;
470}
471
472void OPPROTO op_movl_T1_A0(void)
473{
474 T1 = A0;
475}
476
477void OPPROTO op_movl_A0_im(void)
478{
14ce26e7 479 A0 = (uint32_t)PARAM1;
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480}
481
482void OPPROTO op_addl_A0_im(void)
483{
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484 A0 = (uint32_t)(A0 + PARAM1);
485}
486
487void OPPROTO op_movl_A0_seg(void)
488{
489 A0 = (uint32_t)*(target_ulong *)((char *)env + PARAM1);
490}
491
492void OPPROTO op_addl_A0_seg(void)
493{
494 A0 = (uint32_t)(A0 + *(target_ulong *)((char *)env + PARAM1));
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495}
496
497void OPPROTO op_addl_A0_AL(void)
498{
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499 A0 = (uint32_t)(A0 + (EAX & 0xff));
500}
501
502#ifdef WORDS_BIGENDIAN
503typedef union UREG64 {
504 struct { uint16_t v3, v2, v1, v0; } w;
505 struct { uint32_t v1, v0; } l;
506 uint64_t q;
507} UREG64;
508#else
509typedef union UREG64 {
510 struct { uint16_t v0, v1, v2, v3; } w;
511 struct { uint32_t v0, v1; } l;
512 uint64_t q;
513} UREG64;
514#endif
515
516#ifdef TARGET_X86_64
517
518#define PARAMQ1 \
519({\
520 UREG64 __p;\
521 __p.l.v1 = PARAM1;\
522 __p.l.v0 = PARAM2;\
523 __p.q;\
524})
525
526void OPPROTO op_movq_T0_im64(void)
527{
528 T0 = PARAMQ1;
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529}
530
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531void OPPROTO op_movq_T1_im64(void)
532{
533 T1 = PARAMQ1;
534}
535
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536void OPPROTO op_movq_A0_im(void)
537{
538 A0 = (int32_t)PARAM1;
539}
540
541void OPPROTO op_movq_A0_im64(void)
542{
543 A0 = PARAMQ1;
544}
545
546void OPPROTO op_addq_A0_im(void)
547{
548 A0 = (A0 + (int32_t)PARAM1);
549}
550
551void OPPROTO op_addq_A0_im64(void)
552{
553 A0 = (A0 + PARAMQ1);
554}
555
556void OPPROTO op_movq_A0_seg(void)
557{
558 A0 = *(target_ulong *)((char *)env + PARAM1);
559}
560
561void OPPROTO op_addq_A0_seg(void)
562{
563 A0 += *(target_ulong *)((char *)env + PARAM1);
564}
565
566void OPPROTO op_addq_A0_AL(void)
567{
568 A0 = (A0 + (EAX & 0xff));
569}
570
571#endif
572
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573void OPPROTO op_andl_A0_ffff(void)
574{
575 A0 = A0 & 0xffff;
576}
577
578/* memory access */
579
61382a50 580#define MEMSUFFIX _raw
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581#include "ops_mem.h"
582
61382a50 583#if !defined(CONFIG_USER_ONLY)
f68dd770 584#define MEMSUFFIX _kernel
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585#include "ops_mem.h"
586
f68dd770 587#define MEMSUFFIX _user
2c0262af 588#include "ops_mem.h"
61382a50 589#endif
2c0262af 590
14ce26e7 591/* indirect jump */
2c0262af 592
14ce26e7 593void OPPROTO op_jmp_T0(void)
2c0262af 594{
14ce26e7 595 EIP = T0;
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596}
597
14ce26e7 598void OPPROTO op_movl_eip_im(void)
2c0262af 599{
14ce26e7 600 EIP = (uint32_t)PARAM1;
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601}
602
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603#ifdef TARGET_X86_64
604void OPPROTO op_movq_eip_im(void)
2c0262af 605{
14ce26e7 606 EIP = (int32_t)PARAM1;
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607}
608
14ce26e7 609void OPPROTO op_movq_eip_im64(void)
2c0262af 610{
14ce26e7 611 EIP = PARAMQ1;
2c0262af 612}
14ce26e7 613#endif
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614
615void OPPROTO op_hlt(void)
616{
acf5feac 617 env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
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618 env->exception_index = EXCP_HLT;
619 cpu_loop_exit();
620}
621
622void OPPROTO op_debug(void)
623{
624 env->exception_index = EXCP_DEBUG;
625 cpu_loop_exit();
626}
627
628void OPPROTO op_raise_interrupt(void)
629{
a8ede8ba 630 int intno, next_eip_addend;
2c0262af 631 intno = PARAM1;
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632 next_eip_addend = PARAM2;
633 raise_interrupt(intno, 1, 0, next_eip_addend);
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634}
635
636void OPPROTO op_raise_exception(void)
637{
638 int exception_index;
639 exception_index = PARAM1;
640 raise_exception(exception_index);
641}
642
643void OPPROTO op_into(void)
644{
645 int eflags;
646 eflags = cc_table[CC_OP].compute_all();
647 if (eflags & CC_O) {
648 raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
649 }
650 FORCE_RET();
651}
652
653void OPPROTO op_cli(void)
654{
655 env->eflags &= ~IF_MASK;
656}
657
658void OPPROTO op_sti(void)
659{
660 env->eflags |= IF_MASK;
661}
662
663void OPPROTO op_set_inhibit_irq(void)
664{
665 env->hflags |= HF_INHIBIT_IRQ_MASK;
666}
667
668void OPPROTO op_reset_inhibit_irq(void)
669{
670 env->hflags &= ~HF_INHIBIT_IRQ_MASK;
671}
672
673#if 0
674/* vm86plus instructions */
675void OPPROTO op_cli_vm(void)
676{
677 env->eflags &= ~VIF_MASK;
678}
679
680void OPPROTO op_sti_vm(void)
681{
682 env->eflags |= VIF_MASK;
683 if (env->eflags & VIP_MASK) {
684 EIP = PARAM1;
685 raise_exception(EXCP0D_GPF);
686 }
687 FORCE_RET();
688}
689#endif
690
691void OPPROTO op_boundw(void)
692{
693 int low, high, v;
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694 low = ldsw(A0);
695 high = ldsw(A0 + 2);
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696 v = (int16_t)T0;
697 if (v < low || v > high) {
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698 raise_exception(EXCP05_BOUND);
699 }
700 FORCE_RET();
701}
702
703void OPPROTO op_boundl(void)
704{
705 int low, high, v;
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706 low = ldl(A0);
707 high = ldl(A0 + 4);
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708 v = T0;
709 if (v < low || v > high) {
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710 raise_exception(EXCP05_BOUND);
711 }
712 FORCE_RET();
713}
714
715void OPPROTO op_cmpxchg8b(void)
716{
717 helper_cmpxchg8b();
718}
719
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720void OPPROTO op_movl_T0_0(void)
721{
722 T0 = 0;
723}
724
725void OPPROTO op_exit_tb(void)
726{
727 EXIT_TB();
728}
729
730/* multiple size ops */
731
732#define ldul ldl
733
734#define SHIFT 0
735#include "ops_template.h"
736#undef SHIFT
737
738#define SHIFT 1
739#include "ops_template.h"
740#undef SHIFT
741
742#define SHIFT 2
743#include "ops_template.h"
744#undef SHIFT
745
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746#ifdef TARGET_X86_64
747
748#define SHIFT 3
749#include "ops_template.h"
750#undef SHIFT
751
752#endif
753
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754/* sign extend */
755
756void OPPROTO op_movsbl_T0_T0(void)
757{
758 T0 = (int8_t)T0;
759}
760
761void OPPROTO op_movzbl_T0_T0(void)
762{
763 T0 = (uint8_t)T0;
764}
765
766void OPPROTO op_movswl_T0_T0(void)
767{
768 T0 = (int16_t)T0;
769}
770
771void OPPROTO op_movzwl_T0_T0(void)
772{
773 T0 = (uint16_t)T0;
774}
775
776void OPPROTO op_movswl_EAX_AX(void)
777{
778 EAX = (int16_t)EAX;
779}
780
14ce26e7 781#ifdef TARGET_X86_64
664e0f19
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782void OPPROTO op_movslq_T0_T0(void)
783{
784 T0 = (int32_t)T0;
785}
786
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787void OPPROTO op_movslq_RAX_EAX(void)
788{
789 EAX = (int32_t)EAX;
790}
791#endif
792
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793void OPPROTO op_movsbw_AX_AL(void)
794{
14ce26e7 795 EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
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796}
797
798void OPPROTO op_movslq_EDX_EAX(void)
799{
800 EDX = (int32_t)EAX >> 31;
801}
802
803void OPPROTO op_movswl_DX_AX(void)
804{
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805 EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
806}
807
808#ifdef TARGET_X86_64
809void OPPROTO op_movsqo_RDX_RAX(void)
810{
811 EDX = (int64_t)EAX >> 63;
2c0262af 812}
14ce26e7 813#endif
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814
815/* string ops helpers */
816
817void OPPROTO op_addl_ESI_T0(void)
818{
14ce26e7 819 ESI = (uint32_t)(ESI + T0);
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820}
821
822void OPPROTO op_addw_ESI_T0(void)
823{
824 ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
825}
826
827void OPPROTO op_addl_EDI_T0(void)
828{
14ce26e7 829 EDI = (uint32_t)(EDI + T0);
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830}
831
832void OPPROTO op_addw_EDI_T0(void)
833{
834 EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
835}
836
837void OPPROTO op_decl_ECX(void)
838{
14ce26e7 839 ECX = (uint32_t)(ECX - 1);
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840}
841
842void OPPROTO op_decw_ECX(void)
843{
844 ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
845}
846
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847#ifdef TARGET_X86_64
848void OPPROTO op_addq_ESI_T0(void)
849{
850 ESI = (ESI + T0);
851}
852
853void OPPROTO op_addq_EDI_T0(void)
854{
855 EDI = (EDI + T0);
856}
857
858void OPPROTO op_decq_ECX(void)
859{
860 ECX--;
861}
862#endif
863
f68dd770 864/* push/pop utils */
2c0262af 865
f68dd770 866void op_addl_A0_SS(void)
2c0262af 867{
bc3fc8da 868 A0 = (uint32_t)(A0 + env->segs[R_SS].base);
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869}
870
f68dd770 871void op_subl_A0_2(void)
2c0262af 872{
14ce26e7 873 A0 = (uint32_t)(A0 - 2);
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874}
875
f68dd770 876void op_subl_A0_4(void)
2c0262af 877{
14ce26e7 878 A0 = (uint32_t)(A0 - 4);
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879}
880
881void op_addl_ESP_4(void)
882{
14ce26e7 883 ESP = (uint32_t)(ESP + 4);
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884}
885
886void op_addl_ESP_2(void)
887{
14ce26e7 888 ESP = (uint32_t)(ESP + 2);
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889}
890
891void op_addw_ESP_4(void)
892{
893 ESP = (ESP & ~0xffff) | ((ESP + 4) & 0xffff);
894}
895
896void op_addw_ESP_2(void)
897{
898 ESP = (ESP & ~0xffff) | ((ESP + 2) & 0xffff);
899}
900
901void op_addl_ESP_im(void)
902{
14ce26e7 903 ESP = (uint32_t)(ESP + PARAM1);
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904}
905
906void op_addw_ESP_im(void)
907{
908 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
909}
910
14ce26e7 911#ifdef TARGET_X86_64
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912void op_subq_A0_2(void)
913{
914 A0 -= 2;
915}
916
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917void op_subq_A0_8(void)
918{
919 A0 -= 8;
920}
921
922void op_addq_ESP_8(void)
923{
924 ESP += 8;
925}
926
927void op_addq_ESP_im(void)
928{
929 ESP += PARAM1;
930}
931#endif
932
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933void OPPROTO op_rdtsc(void)
934{
935 helper_rdtsc();
936}
937
938void OPPROTO op_cpuid(void)
939{
940 helper_cpuid();
941}
942
61a8c4ec
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943void OPPROTO op_enter_level(void)
944{
945 helper_enter_level(PARAM1, PARAM2);
946}
947
8f091a59
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948#ifdef TARGET_X86_64
949void OPPROTO op_enter64_level(void)
950{
951 helper_enter64_level(PARAM1, PARAM2);
952}
953#endif
954
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955void OPPROTO op_sysenter(void)
956{
957 helper_sysenter();
958}
959
960void OPPROTO op_sysexit(void)
961{
962 helper_sysexit();
963}
964
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965#ifdef TARGET_X86_64
966void OPPROTO op_syscall(void)
967{
06c2f506 968 helper_syscall(PARAM1);
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969}
970
971void OPPROTO op_sysret(void)
972{
973 helper_sysret(PARAM1);
974}
975#endif
976
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977void OPPROTO op_rdmsr(void)
978{
979 helper_rdmsr();
980}
981
982void OPPROTO op_wrmsr(void)
983{
984 helper_wrmsr();
985}
986
987/* bcd */
988
989/* XXX: exception */
990void OPPROTO op_aam(void)
991{
992 int base = PARAM1;
993 int al, ah;
994 al = EAX & 0xff;
995 ah = al / base;
996 al = al % base;
997 EAX = (EAX & ~0xffff) | al | (ah << 8);
998 CC_DST = al;
999}
1000
1001void OPPROTO op_aad(void)
1002{
1003 int base = PARAM1;
1004 int al, ah;
1005 al = EAX & 0xff;
1006 ah = (EAX >> 8) & 0xff;
1007 al = ((ah * base) + al) & 0xff;
1008 EAX = (EAX & ~0xffff) | al;
1009 CC_DST = al;
1010}
1011
1012void OPPROTO op_aaa(void)
1013{
1014 int icarry;
1015 int al, ah, af;
1016 int eflags;
1017
1018 eflags = cc_table[CC_OP].compute_all();
1019 af = eflags & CC_A;
1020 al = EAX & 0xff;
1021 ah = (EAX >> 8) & 0xff;
1022
1023 icarry = (al > 0xf9);
1024 if (((al & 0x0f) > 9 ) || af) {
1025 al = (al + 6) & 0x0f;
1026 ah = (ah + 1 + icarry) & 0xff;
1027 eflags |= CC_C | CC_A;
1028 } else {
1029 eflags &= ~(CC_C | CC_A);
1030 al &= 0x0f;
1031 }
1032 EAX = (EAX & ~0xffff) | al | (ah << 8);
1033 CC_SRC = eflags;
1034}
1035
1036void OPPROTO op_aas(void)
1037{
1038 int icarry;
1039 int al, ah, af;
1040 int eflags;
1041
1042 eflags = cc_table[CC_OP].compute_all();
1043 af = eflags & CC_A;
1044 al = EAX & 0xff;
1045 ah = (EAX >> 8) & 0xff;
1046
1047 icarry = (al < 6);
1048 if (((al & 0x0f) > 9 ) || af) {
1049 al = (al - 6) & 0x0f;
1050 ah = (ah - 1 - icarry) & 0xff;
1051 eflags |= CC_C | CC_A;
1052 } else {
1053 eflags &= ~(CC_C | CC_A);
1054 al &= 0x0f;
1055 }
1056 EAX = (EAX & ~0xffff) | al | (ah << 8);
1057 CC_SRC = eflags;
1058}
1059
1060void OPPROTO op_daa(void)
1061{
1062 int al, af, cf;
1063 int eflags;
1064
1065 eflags = cc_table[CC_OP].compute_all();
1066 cf = eflags & CC_C;
1067 af = eflags & CC_A;
1068 al = EAX & 0xff;
1069
1070 eflags = 0;
1071 if (((al & 0x0f) > 9 ) || af) {
1072 al = (al + 6) & 0xff;
1073 eflags |= CC_A;
1074 }
1075 if ((al > 0x9f) || cf) {
1076 al = (al + 0x60) & 0xff;
1077 eflags |= CC_C;
1078 }
1079 EAX = (EAX & ~0xff) | al;
1080 /* well, speed is not an issue here, so we compute the flags by hand */
1081 eflags |= (al == 0) << 6; /* zf */
1082 eflags |= parity_table[al]; /* pf */
1083 eflags |= (al & 0x80); /* sf */
1084 CC_SRC = eflags;
1085}
1086
1087void OPPROTO op_das(void)
1088{
1089 int al, al1, af, cf;
1090 int eflags;
1091
1092 eflags = cc_table[CC_OP].compute_all();
1093 cf = eflags & CC_C;
1094 af = eflags & CC_A;
1095 al = EAX & 0xff;
1096
1097 eflags = 0;
1098 al1 = al;
1099 if (((al & 0x0f) > 9 ) || af) {
1100 eflags |= CC_A;
1101 if (al < 6 || cf)
1102 eflags |= CC_C;
1103 al = (al - 6) & 0xff;
1104 }
1105 if ((al1 > 0x99) || cf) {
1106 al = (al - 0x60) & 0xff;
1107 eflags |= CC_C;
1108 }
1109 EAX = (EAX & ~0xff) | al;
1110 /* well, speed is not an issue here, so we compute the flags by hand */
1111 eflags |= (al == 0) << 6; /* zf */
1112 eflags |= parity_table[al]; /* pf */
1113 eflags |= (al & 0x80); /* sf */
1114 CC_SRC = eflags;
1115}
1116
1117/* segment handling */
1118
1119/* never use it with R_CS */
1120void OPPROTO op_movl_seg_T0(void)
1121{
3415a4dd 1122 load_seg(PARAM1, T0);
2c0262af
FB
1123}
1124
1125/* faster VM86 version */
1126void OPPROTO op_movl_seg_T0_vm(void)
1127{
1128 int selector;
1129 SegmentCache *sc;
1130
1131 selector = T0 & 0xffff;
1132 /* env->segs[] access */
1133 sc = (SegmentCache *)((char *)env + PARAM1);
1134 sc->selector = selector;
14ce26e7 1135 sc->base = (selector << 4);
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FB
1136}
1137
1138void OPPROTO op_movl_T0_seg(void)
1139{
1140 T0 = env->segs[PARAM1].selector;
1141}
1142
2c0262af
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1143void OPPROTO op_lsl(void)
1144{
1145 helper_lsl();
1146}
1147
1148void OPPROTO op_lar(void)
1149{
1150 helper_lar();
1151}
1152
3ab493de
FB
1153void OPPROTO op_verr(void)
1154{
1155 helper_verr();
1156}
1157
1158void OPPROTO op_verw(void)
1159{
1160 helper_verw();
1161}
1162
1163void OPPROTO op_arpl(void)
1164{
1165 if ((T0 & 3) < (T1 & 3)) {
1166 /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
1167 T0 = (T0 & ~3) | (T1 & 3);
1168 T1 = CC_Z;
1169 } else {
1170 T1 = 0;
1171 }
1172 FORCE_RET();
1173}
1174
1175void OPPROTO op_arpl_update(void)
1176{
1177 int eflags;
1178 eflags = cc_table[CC_OP].compute_all();
1179 CC_SRC = (eflags & ~CC_Z) | T1;
1180}
1181
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FB
1182/* T0: segment, T1:eip */
1183void OPPROTO op_ljmp_protected_T0_T1(void)
1184{
08cea4ee 1185 helper_ljmp_protected_T0_T1(PARAM1);
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FB
1186}
1187
1188void OPPROTO op_lcall_real_T0_T1(void)
1189{
1190 helper_lcall_real_T0_T1(PARAM1, PARAM2);
1191}
1192
1193void OPPROTO op_lcall_protected_T0_T1(void)
1194{
1195 helper_lcall_protected_T0_T1(PARAM1, PARAM2);
1196}
1197
1198void OPPROTO op_iret_real(void)
1199{
1200 helper_iret_real(PARAM1);
1201}
1202
1203void OPPROTO op_iret_protected(void)
1204{
08cea4ee 1205 helper_iret_protected(PARAM1, PARAM2);
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FB
1206}
1207
1208void OPPROTO op_lret_protected(void)
1209{
1210 helper_lret_protected(PARAM1, PARAM2);
1211}
1212
1213void OPPROTO op_lldt_T0(void)
1214{
1215 helper_lldt_T0();
1216}
1217
1218void OPPROTO op_ltr_T0(void)
1219{
1220 helper_ltr_T0();
1221}
1222
1223/* CR registers access */
1224void OPPROTO op_movl_crN_T0(void)
1225{
1226 helper_movl_crN_T0(PARAM1);
1227}
1228
82e41634 1229#if !defined(CONFIG_USER_ONLY)
39c61f49
FB
1230void OPPROTO op_movtl_T0_cr8(void)
1231{
39c61f49 1232 T0 = cpu_get_apic_tpr(env);
39c61f49 1233}
82e41634 1234#endif
39c61f49 1235
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1236/* DR registers access */
1237void OPPROTO op_movl_drN_T0(void)
1238{
1239 helper_movl_drN_T0(PARAM1);
1240}
1241
1242void OPPROTO op_lmsw_T0(void)
1243{
710c15a2
FB
1244 /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1245 if already set to one. */
1246 T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
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FB
1247 helper_movl_crN_T0(0);
1248}
1249
1250void OPPROTO op_invlpg_A0(void)
1251{
1252 helper_invlpg(A0);
1253}
1254
1255void OPPROTO op_movl_T0_env(void)
1256{
1257 T0 = *(uint32_t *)((char *)env + PARAM1);
1258}
1259
1260void OPPROTO op_movl_env_T0(void)
1261{
1262 *(uint32_t *)((char *)env + PARAM1) = T0;
1263}
1264
1265void OPPROTO op_movl_env_T1(void)
1266{
1267 *(uint32_t *)((char *)env + PARAM1) = T1;
1268}
1269
14ce26e7
FB
1270void OPPROTO op_movtl_T0_env(void)
1271{
1272 T0 = *(target_ulong *)((char *)env + PARAM1);
1273}
1274
1275void OPPROTO op_movtl_env_T0(void)
1276{
1277 *(target_ulong *)((char *)env + PARAM1) = T0;
1278}
1279
1280void OPPROTO op_movtl_T1_env(void)
1281{
1282 T1 = *(target_ulong *)((char *)env + PARAM1);
1283}
1284
1285void OPPROTO op_movtl_env_T1(void)
1286{
1287 *(target_ulong *)((char *)env + PARAM1) = T1;
1288}
1289
2c0262af
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1290void OPPROTO op_clts(void)
1291{
1292 env->cr[0] &= ~CR0_TS_MASK;
7eee2a50 1293 env->hflags &= ~HF_TS_MASK;
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FB
1294}
1295
1296/* flags handling */
1297
14ce26e7 1298void OPPROTO op_goto_tb0(void)
2c0262af 1299{
ae063a68 1300 GOTO_TB(op_goto_tb0, PARAM1, 0);
14ce26e7
FB
1301}
1302
1303void OPPROTO op_goto_tb1(void)
1304{
ae063a68 1305 GOTO_TB(op_goto_tb1, PARAM1, 1);
14ce26e7
FB
1306}
1307
1308void OPPROTO op_jmp_label(void)
1309{
1310 GOTO_LABEL_PARAM(1);
2c0262af
FB
1311}
1312
14ce26e7 1313void OPPROTO op_jnz_T0_label(void)
2c0262af
FB
1314{
1315 if (T0)
14ce26e7 1316 GOTO_LABEL_PARAM(1);
39c61f49 1317 FORCE_RET();
14ce26e7
FB
1318}
1319
1320void OPPROTO op_jz_T0_label(void)
1321{
1322 if (!T0)
1323 GOTO_LABEL_PARAM(1);
39c61f49 1324 FORCE_RET();
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1325}
1326
1327/* slow set cases (compute x86 flags) */
1328void OPPROTO op_seto_T0_cc(void)
1329{
1330 int eflags;
1331 eflags = cc_table[CC_OP].compute_all();
1332 T0 = (eflags >> 11) & 1;
1333}
1334
1335void OPPROTO op_setb_T0_cc(void)
1336{
1337 T0 = cc_table[CC_OP].compute_c();
1338}
1339
1340void OPPROTO op_setz_T0_cc(void)
1341{
1342 int eflags;
1343 eflags = cc_table[CC_OP].compute_all();
1344 T0 = (eflags >> 6) & 1;
1345}
1346
1347void OPPROTO op_setbe_T0_cc(void)
1348{
1349 int eflags;
1350 eflags = cc_table[CC_OP].compute_all();
1351 T0 = (eflags & (CC_Z | CC_C)) != 0;
1352}
1353
1354void OPPROTO op_sets_T0_cc(void)
1355{
1356 int eflags;
1357 eflags = cc_table[CC_OP].compute_all();
1358 T0 = (eflags >> 7) & 1;
1359}
1360
1361void OPPROTO op_setp_T0_cc(void)
1362{
1363 int eflags;
1364 eflags = cc_table[CC_OP].compute_all();
1365 T0 = (eflags >> 2) & 1;
1366}
1367
1368void OPPROTO op_setl_T0_cc(void)
1369{
1370 int eflags;
1371 eflags = cc_table[CC_OP].compute_all();
1372 T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1373}
1374
1375void OPPROTO op_setle_T0_cc(void)
1376{
1377 int eflags;
1378 eflags = cc_table[CC_OP].compute_all();
1379 T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1380}
1381
1382void OPPROTO op_xor_T0_1(void)
1383{
1384 T0 ^= 1;
1385}
1386
1387void OPPROTO op_set_cc_op(void)
1388{
1389 CC_OP = PARAM1;
1390}
1391
0b9dc5e4
FB
1392void OPPROTO op_mov_T0_cc(void)
1393{
1394 T0 = cc_table[CC_OP].compute_all();
1395}
1396
4136f33c 1397/* XXX: clear VIF/VIP in all ops ? */
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1398
1399void OPPROTO op_movl_eflags_T0(void)
1400{
4b7aba51 1401 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
2c0262af
FB
1402}
1403
1404void OPPROTO op_movw_eflags_T0(void)
1405{
4b7aba51 1406 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
4136f33c
FB
1407}
1408
1409void OPPROTO op_movl_eflags_T0_io(void)
1410{
4b7aba51 1411 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
4136f33c
FB
1412}
1413
1414void OPPROTO op_movw_eflags_T0_io(void)
1415{
4b7aba51 1416 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
2c0262af
FB
1417}
1418
1419void OPPROTO op_movl_eflags_T0_cpl0(void)
1420{
4b7aba51 1421 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
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FB
1422}
1423
1424void OPPROTO op_movw_eflags_T0_cpl0(void)
1425{
4b7aba51 1426 load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
2c0262af
FB
1427}
1428
1429#if 0
1430/* vm86plus version */
1431void OPPROTO op_movw_eflags_T0_vm(void)
1432{
1433 int eflags;
1434 eflags = T0;
1435 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1436 DF = 1 - (2 * ((eflags >> 10) & 1));
1437 /* we also update some system flags as in user mode */
1438 env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1439 (eflags & FL_UPDATE_MASK16);
1440 if (eflags & IF_MASK) {
1441 env->eflags |= VIF_MASK;
1442 if (env->eflags & VIP_MASK) {
1443 EIP = PARAM1;
1444 raise_exception(EXCP0D_GPF);
1445 }
1446 }
1447 FORCE_RET();
1448}
1449
1450void OPPROTO op_movl_eflags_T0_vm(void)
1451{
1452 int eflags;
1453 eflags = T0;
1454 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1455 DF = 1 - (2 * ((eflags >> 10) & 1));
1456 /* we also update some system flags as in user mode */
1457 env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1458 (eflags & FL_UPDATE_MASK32);
1459 if (eflags & IF_MASK) {
1460 env->eflags |= VIF_MASK;
1461 if (env->eflags & VIP_MASK) {
1462 EIP = PARAM1;
1463 raise_exception(EXCP0D_GPF);
1464 }
1465 }
1466 FORCE_RET();
1467}
1468#endif
1469
1470/* XXX: compute only O flag */
1471void OPPROTO op_movb_eflags_T0(void)
1472{
1473 int of;
1474 of = cc_table[CC_OP].compute_all() & CC_O;
1475 CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1476}
1477
1478void OPPROTO op_movl_T0_eflags(void)
1479{
1480 int eflags;
1481 eflags = cc_table[CC_OP].compute_all();
1482 eflags |= (DF & DF_MASK);
1483 eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1484 T0 = eflags;
1485}
1486
1487/* vm86plus version */
1488#if 0
1489void OPPROTO op_movl_T0_eflags_vm(void)
1490{
1491 int eflags;
1492 eflags = cc_table[CC_OP].compute_all();
1493 eflags |= (DF & DF_MASK);
1494 eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1495 if (env->eflags & VIF_MASK)
1496 eflags |= IF_MASK;
1497 T0 = eflags;
1498}
1499#endif
1500
1501void OPPROTO op_cld(void)
1502{
1503 DF = 1;
1504}
1505
1506void OPPROTO op_std(void)
1507{
1508 DF = -1;
1509}
1510
1511void OPPROTO op_clc(void)
1512{
1513 int eflags;
1514 eflags = cc_table[CC_OP].compute_all();
1515 eflags &= ~CC_C;
1516 CC_SRC = eflags;
1517}
1518
1519void OPPROTO op_stc(void)
1520{
1521 int eflags;
1522 eflags = cc_table[CC_OP].compute_all();
1523 eflags |= CC_C;
1524 CC_SRC = eflags;
1525}
1526
1527void OPPROTO op_cmc(void)
1528{
1529 int eflags;
1530 eflags = cc_table[CC_OP].compute_all();
1531 eflags ^= CC_C;
1532 CC_SRC = eflags;
1533}
1534
1535void OPPROTO op_salc(void)
1536{
1537 int cf;
1538 cf = cc_table[CC_OP].compute_c();
1539 EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1540}
1541
1542static int compute_all_eflags(void)
1543{
1544 return CC_SRC;
1545}
1546
1547static int compute_c_eflags(void)
1548{
1549 return CC_SRC & CC_C;
1550}
1551
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1552CCTable cc_table[CC_OP_NB] = {
1553 [CC_OP_DYNAMIC] = { /* should never happen */ },
1554
1555 [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1556
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1557 [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1558 [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1559 [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
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1560
1561 [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1562 [CC_OP_ADDW] = { compute_all_addw, compute_c_addw },
1563 [CC_OP_ADDL] = { compute_all_addl, compute_c_addl },
1564
1565 [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1566 [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw },
1567 [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl },
1568
1569 [CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
1570 [CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
1571 [CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
1572
1573 [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
1574 [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
1575 [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
1576
1577 [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1578 [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1579 [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1580
1581 [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1582 [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1583 [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1584
1585 [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1586 [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1587 [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1588
1589 [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1590 [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1591 [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1592
1593 [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1594 [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1595 [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
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1596
1597#ifdef TARGET_X86_64
1598 [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1599
1600 [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq },
1601
1602 [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
1603
1604 [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
1605
1606 [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
1607
1608 [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1609
1610 [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1611
1612 [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1613
1614 [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1615
1616 [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1617#endif
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1618};
1619
1620/* floating point support. Some of the code for complicated x87
1621 functions comes from the LGPL'ed x86 emulator found in the Willows
1622 TWIN windows emulator. */
1623
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1624/* fp load FT0 */
1625
1626void OPPROTO op_flds_FT0_A0(void)
1627{
1628#ifdef USE_FP_CONVERT
14ce26e7 1629 FP_CONVERT.i32 = ldl(A0);
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1630 FT0 = FP_CONVERT.f;
1631#else
14ce26e7 1632 FT0 = ldfl(A0);
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1633#endif
1634}
1635
1636void OPPROTO op_fldl_FT0_A0(void)
1637{
1638#ifdef USE_FP_CONVERT
14ce26e7 1639 FP_CONVERT.i64 = ldq(A0);
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1640 FT0 = FP_CONVERT.d;
1641#else
14ce26e7 1642 FT0 = ldfq(A0);
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1643#endif
1644}
1645
1646/* helpers are needed to avoid static constant reference. XXX: find a better way */
1647#ifdef USE_INT_TO_FLOAT_HELPERS
1648
1649void helper_fild_FT0_A0(void)
1650{
14ce26e7 1651 FT0 = (CPU86_LDouble)ldsw(A0);
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1652}
1653
1654void helper_fildl_FT0_A0(void)
1655{
14ce26e7 1656 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1657}
1658
1659void helper_fildll_FT0_A0(void)
1660{
14ce26e7 1661 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1662}
1663
1664void OPPROTO op_fild_FT0_A0(void)
1665{
1666 helper_fild_FT0_A0();
1667}
1668
1669void OPPROTO op_fildl_FT0_A0(void)
1670{
1671 helper_fildl_FT0_A0();
1672}
1673
1674void OPPROTO op_fildll_FT0_A0(void)
1675{
1676 helper_fildll_FT0_A0();
1677}
1678
1679#else
1680
1681void OPPROTO op_fild_FT0_A0(void)
1682{
1683#ifdef USE_FP_CONVERT
14ce26e7 1684 FP_CONVERT.i32 = ldsw(A0);
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1685 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1686#else
14ce26e7 1687 FT0 = (CPU86_LDouble)ldsw(A0);
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1688#endif
1689}
1690
1691void OPPROTO op_fildl_FT0_A0(void)
1692{
1693#ifdef USE_FP_CONVERT
14ce26e7 1694 FP_CONVERT.i32 = (int32_t) ldl(A0);
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1695 FT0 = (CPU86_LDouble)FP_CONVERT.i32;
1696#else
14ce26e7 1697 FT0 = (CPU86_LDouble)((int32_t)ldl(A0));
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1698#endif
1699}
1700
1701void OPPROTO op_fildll_FT0_A0(void)
1702{
1703#ifdef USE_FP_CONVERT
14ce26e7 1704 FP_CONVERT.i64 = (int64_t) ldq(A0);
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1705 FT0 = (CPU86_LDouble)FP_CONVERT.i64;
1706#else
14ce26e7 1707 FT0 = (CPU86_LDouble)((int64_t)ldq(A0));
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1708#endif
1709}
1710#endif
1711
1712/* fp load ST0 */
1713
1714void OPPROTO op_flds_ST0_A0(void)
1715{
1716 int new_fpstt;
1717 new_fpstt = (env->fpstt - 1) & 7;
1718#ifdef USE_FP_CONVERT
14ce26e7 1719 FP_CONVERT.i32 = ldl(A0);
664e0f19 1720 env->fpregs[new_fpstt].d = FP_CONVERT.f;
2c0262af 1721#else
664e0f19 1722 env->fpregs[new_fpstt].d = ldfl(A0);
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1723#endif
1724 env->fpstt = new_fpstt;
1725 env->fptags[new_fpstt] = 0; /* validate stack entry */
1726}
1727
1728void OPPROTO op_fldl_ST0_A0(void)
1729{
1730 int new_fpstt;
1731 new_fpstt = (env->fpstt - 1) & 7;
1732#ifdef USE_FP_CONVERT
14ce26e7 1733 FP_CONVERT.i64 = ldq(A0);
664e0f19 1734 env->fpregs[new_fpstt].d = FP_CONVERT.d;
2c0262af 1735#else
664e0f19 1736 env->fpregs[new_fpstt].d = ldfq(A0);
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1737#endif
1738 env->fpstt = new_fpstt;
1739 env->fptags[new_fpstt] = 0; /* validate stack entry */
1740}
1741
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1742void OPPROTO op_fldt_ST0_A0(void)
1743{
1744 helper_fldt_ST0_A0();
1745}
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1746
1747/* helpers are needed to avoid static constant reference. XXX: find a better way */
1748#ifdef USE_INT_TO_FLOAT_HELPERS
1749
1750void helper_fild_ST0_A0(void)
1751{
1752 int new_fpstt;
1753 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1754 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1755 env->fpstt = new_fpstt;
1756 env->fptags[new_fpstt] = 0; /* validate stack entry */
1757}
1758
1759void helper_fildl_ST0_A0(void)
1760{
1761 int new_fpstt;
1762 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1763 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1764 env->fpstt = new_fpstt;
1765 env->fptags[new_fpstt] = 0; /* validate stack entry */
1766}
1767
1768void helper_fildll_ST0_A0(void)
1769{
1770 int new_fpstt;
1771 new_fpstt = (env->fpstt - 1) & 7;
664e0f19 1772 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1773 env->fpstt = new_fpstt;
1774 env->fptags[new_fpstt] = 0; /* validate stack entry */
1775}
1776
1777void OPPROTO op_fild_ST0_A0(void)
1778{
1779 helper_fild_ST0_A0();
1780}
1781
1782void OPPROTO op_fildl_ST0_A0(void)
1783{
1784 helper_fildl_ST0_A0();
1785}
1786
1787void OPPROTO op_fildll_ST0_A0(void)
1788{
1789 helper_fildll_ST0_A0();
1790}
1791
1792#else
1793
1794void OPPROTO op_fild_ST0_A0(void)
1795{
1796 int new_fpstt;
1797 new_fpstt = (env->fpstt - 1) & 7;
1798#ifdef USE_FP_CONVERT
14ce26e7 1799 FP_CONVERT.i32 = ldsw(A0);
664e0f19 1800 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1801#else
664e0f19 1802 env->fpregs[new_fpstt].d = (CPU86_LDouble)ldsw(A0);
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1803#endif
1804 env->fpstt = new_fpstt;
1805 env->fptags[new_fpstt] = 0; /* validate stack entry */
1806}
1807
1808void OPPROTO op_fildl_ST0_A0(void)
1809{
1810 int new_fpstt;
1811 new_fpstt = (env->fpstt - 1) & 7;
1812#ifdef USE_FP_CONVERT
14ce26e7 1813 FP_CONVERT.i32 = (int32_t) ldl(A0);
664e0f19 1814 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i32;
2c0262af 1815#else
664e0f19 1816 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int32_t)ldl(A0));
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1817#endif
1818 env->fpstt = new_fpstt;
1819 env->fptags[new_fpstt] = 0; /* validate stack entry */
1820}
1821
1822void OPPROTO op_fildll_ST0_A0(void)
1823{
1824 int new_fpstt;
1825 new_fpstt = (env->fpstt - 1) & 7;
1826#ifdef USE_FP_CONVERT
14ce26e7 1827 FP_CONVERT.i64 = (int64_t) ldq(A0);
664e0f19 1828 env->fpregs[new_fpstt].d = (CPU86_LDouble)FP_CONVERT.i64;
2c0262af 1829#else
664e0f19 1830 env->fpregs[new_fpstt].d = (CPU86_LDouble)((int64_t)ldq(A0));
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1831#endif
1832 env->fpstt = new_fpstt;
1833 env->fptags[new_fpstt] = 0; /* validate stack entry */
1834}
1835
1836#endif
1837
1838/* fp store */
1839
1840void OPPROTO op_fsts_ST0_A0(void)
1841{
1842#ifdef USE_FP_CONVERT
1843 FP_CONVERT.f = (float)ST0;
14ce26e7 1844 stfl(A0, FP_CONVERT.f);
2c0262af 1845#else
14ce26e7 1846 stfl(A0, (float)ST0);
2c0262af 1847#endif
6eea2b1b 1848 FORCE_RET();
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1849}
1850
1851void OPPROTO op_fstl_ST0_A0(void)
1852{
14ce26e7 1853 stfq(A0, (double)ST0);
6eea2b1b 1854 FORCE_RET();
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1855}
1856
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1857void OPPROTO op_fstt_ST0_A0(void)
1858{
1859 helper_fstt_ST0_A0();
1860}
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1861
1862void OPPROTO op_fist_ST0_A0(void)
1863{
1864#if defined(__sparc__) && !defined(__sparc_v9__)
1865 register CPU86_LDouble d asm("o0");
1866#else
1867 CPU86_LDouble d;
1868#endif
1869 int val;
1870
1871 d = ST0;
7a0e1f41 1872 val = floatx_to_int32(d, &env->fp_status);
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1873 if (val != (int16_t)val)
1874 val = -32768;
14ce26e7 1875 stw(A0, val);
6eea2b1b 1876 FORCE_RET();
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1877}
1878
1879void OPPROTO op_fistl_ST0_A0(void)
1880{
1881#if defined(__sparc__) && !defined(__sparc_v9__)
1882 register CPU86_LDouble d asm("o0");
1883#else
1884 CPU86_LDouble d;
1885#endif
1886 int val;
1887
1888 d = ST0;
7a0e1f41 1889 val = floatx_to_int32(d, &env->fp_status);
14ce26e7 1890 stl(A0, val);
6eea2b1b 1891 FORCE_RET();
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1892}
1893
1894void OPPROTO op_fistll_ST0_A0(void)
1895{
1896#if defined(__sparc__) && !defined(__sparc_v9__)
1897 register CPU86_LDouble d asm("o0");
1898#else
1899 CPU86_LDouble d;
1900#endif
1901 int64_t val;
1902
1903 d = ST0;
7a0e1f41 1904 val = floatx_to_int64(d, &env->fp_status);
14ce26e7 1905 stq(A0, val);
6eea2b1b 1906 FORCE_RET();
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1907}
1908
1909void OPPROTO op_fbld_ST0_A0(void)
1910{
1911 helper_fbld_ST0_A0();
1912}
1913
1914void OPPROTO op_fbst_ST0_A0(void)
1915{
1916 helper_fbst_ST0_A0();
1917}
1918
1919/* FPU move */
1920
1921void OPPROTO op_fpush(void)
1922{
1923 fpush();
1924}
1925
1926void OPPROTO op_fpop(void)
1927{
1928 fpop();
1929}
1930
1931void OPPROTO op_fdecstp(void)
1932{
1933 env->fpstt = (env->fpstt - 1) & 7;
1934 env->fpus &= (~0x4700);
1935}
1936
1937void OPPROTO op_fincstp(void)
1938{
1939 env->fpstt = (env->fpstt + 1) & 7;
1940 env->fpus &= (~0x4700);
1941}
1942
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1943void OPPROTO op_ffree_STN(void)
1944{
1945 env->fptags[(env->fpstt + PARAM1) & 7] = 1;
1946}
1947
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1948void OPPROTO op_fmov_ST0_FT0(void)
1949{
1950 ST0 = FT0;
1951}
1952
1953void OPPROTO op_fmov_FT0_STN(void)
1954{
1955 FT0 = ST(PARAM1);
1956}
1957
1958void OPPROTO op_fmov_ST0_STN(void)
1959{
1960 ST0 = ST(PARAM1);
1961}
1962
1963void OPPROTO op_fmov_STN_ST0(void)
1964{
1965 ST(PARAM1) = ST0;
1966}
1967
1968void OPPROTO op_fxchg_ST0_STN(void)
1969{
1970 CPU86_LDouble tmp;
1971 tmp = ST(PARAM1);
1972 ST(PARAM1) = ST0;
1973 ST0 = tmp;
1974}
1975
1976/* FPU operations */
1977
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1978const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
1979
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1980void OPPROTO op_fcom_ST0_FT0(void)
1981{
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1982 int ret;
1983
1984 ret = floatx_compare(ST0, FT0, &env->fp_status);
1985 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
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1986 FORCE_RET();
1987}
1988
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1989void OPPROTO op_fucom_ST0_FT0(void)
1990{
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1991 int ret;
1992
1993 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
1994 env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
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1995 FORCE_RET();
1996}
1997
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1998const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1999
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2000void OPPROTO op_fcomi_ST0_FT0(void)
2001{
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2002 int eflags;
2003 int ret;
2004
2005 ret = floatx_compare(ST0, FT0, &env->fp_status);
2c0262af 2006 eflags = cc_table[CC_OP].compute_all();
43fb823b 2007 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
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2008 CC_SRC = eflags;
2009 FORCE_RET();
2010}
2011
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2012void OPPROTO op_fucomi_ST0_FT0(void)
2013{
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2014 int eflags;
2015 int ret;
2016
2017 ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
2c0262af 2018 eflags = cc_table[CC_OP].compute_all();
43fb823b 2019 eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
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2020 CC_SRC = eflags;
2021 FORCE_RET();
2022}
2023
80043406
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2024void OPPROTO op_fcmov_ST0_STN_T0(void)
2025{
2026 if (T0) {
2027 ST0 = ST(PARAM1);
2028 }
2029 FORCE_RET();
2030}
2031
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2032void OPPROTO op_fadd_ST0_FT0(void)
2033{
2034 ST0 += FT0;
2035}
2036
2037void OPPROTO op_fmul_ST0_FT0(void)
2038{
2039 ST0 *= FT0;
2040}
2041
2042void OPPROTO op_fsub_ST0_FT0(void)
2043{
2044 ST0 -= FT0;
2045}
2046
2047void OPPROTO op_fsubr_ST0_FT0(void)
2048{
2049 ST0 = FT0 - ST0;
2050}
2051
2052void OPPROTO op_fdiv_ST0_FT0(void)
2053{
2ee73ac3 2054 ST0 = helper_fdiv(ST0, FT0);
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2055}
2056
2057void OPPROTO op_fdivr_ST0_FT0(void)
2058{
2ee73ac3 2059 ST0 = helper_fdiv(FT0, ST0);
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2060}
2061
2062/* fp operations between STN and ST0 */
2063
2064void OPPROTO op_fadd_STN_ST0(void)
2065{
2066 ST(PARAM1) += ST0;
2067}
2068
2069void OPPROTO op_fmul_STN_ST0(void)
2070{
2071 ST(PARAM1) *= ST0;
2072}
2073
2074void OPPROTO op_fsub_STN_ST0(void)
2075{
2076 ST(PARAM1) -= ST0;
2077}
2078
2079void OPPROTO op_fsubr_STN_ST0(void)
2080{
2081 CPU86_LDouble *p;
2082 p = &ST(PARAM1);
2083 *p = ST0 - *p;
2084}
2085
2086void OPPROTO op_fdiv_STN_ST0(void)
2087{
2ee73ac3
FB
2088 CPU86_LDouble *p;
2089 p = &ST(PARAM1);
2090 *p = helper_fdiv(*p, ST0);
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2091}
2092
2093void OPPROTO op_fdivr_STN_ST0(void)
2094{
2095 CPU86_LDouble *p;
2096 p = &ST(PARAM1);
2ee73ac3 2097 *p = helper_fdiv(ST0, *p);
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2098}
2099
2100/* misc FPU operations */
2101void OPPROTO op_fchs_ST0(void)
2102{
7a0e1f41 2103 ST0 = floatx_chs(ST0);
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2104}
2105
2106void OPPROTO op_fabs_ST0(void)
2107{
7a0e1f41 2108 ST0 = floatx_abs(ST0);
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2109}
2110
2111void OPPROTO op_fxam_ST0(void)
2112{
2113 helper_fxam_ST0();
2114}
2115
2116void OPPROTO op_fld1_ST0(void)
2117{
2118 ST0 = f15rk[1];
2119}
2120
2121void OPPROTO op_fldl2t_ST0(void)
2122{
2123 ST0 = f15rk[6];
2124}
2125
2126void OPPROTO op_fldl2e_ST0(void)
2127{
2128 ST0 = f15rk[5];
2129}
2130
2131void OPPROTO op_fldpi_ST0(void)
2132{
2133 ST0 = f15rk[2];
2134}
2135
2136void OPPROTO op_fldlg2_ST0(void)
2137{
2138 ST0 = f15rk[3];
2139}
2140
2141void OPPROTO op_fldln2_ST0(void)
2142{
2143 ST0 = f15rk[4];
2144}
2145
2146void OPPROTO op_fldz_ST0(void)
2147{
2148 ST0 = f15rk[0];
2149}
2150
2151void OPPROTO op_fldz_FT0(void)
2152{
6a8c397d 2153 FT0 = f15rk[0];
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FB
2154}
2155
2156/* associated heplers to reduce generated code length and to simplify
2157 relocation (FP constants are usually stored in .rodata section) */
2158
2159void OPPROTO op_f2xm1(void)
2160{
2161 helper_f2xm1();
2162}
2163
2164void OPPROTO op_fyl2x(void)
2165{
2166 helper_fyl2x();
2167}
2168
2169void OPPROTO op_fptan(void)
2170{
2171 helper_fptan();
2172}
2173
2174void OPPROTO op_fpatan(void)
2175{
2176 helper_fpatan();
2177}
2178
2179void OPPROTO op_fxtract(void)
2180{
2181 helper_fxtract();
2182}
2183
2184void OPPROTO op_fprem1(void)
2185{
2186 helper_fprem1();
2187}
2188
2189
2190void OPPROTO op_fprem(void)
2191{
2192 helper_fprem();
2193}
2194
2195void OPPROTO op_fyl2xp1(void)
2196{
2197 helper_fyl2xp1();
2198}
2199
2200void OPPROTO op_fsqrt(void)
2201{
2202 helper_fsqrt();
2203}
2204
2205void OPPROTO op_fsincos(void)
2206{
2207 helper_fsincos();
2208}
2209
2210void OPPROTO op_frndint(void)
2211{
2212 helper_frndint();
2213}
2214
2215void OPPROTO op_fscale(void)
2216{
2217 helper_fscale();
2218}
2219
2220void OPPROTO op_fsin(void)
2221{
2222 helper_fsin();
2223}
2224
2225void OPPROTO op_fcos(void)
2226{
2227 helper_fcos();
2228}
2229
2230void OPPROTO op_fnstsw_A0(void)
2231{
2232 int fpus;
2233 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2234 stw(A0, fpus);
6eea2b1b 2235 FORCE_RET();
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2236}
2237
2238void OPPROTO op_fnstsw_EAX(void)
2239{
2240 int fpus;
2241 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
14ce26e7 2242 EAX = (EAX & ~0xffff) | fpus;
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FB
2243}
2244
2245void OPPROTO op_fnstcw_A0(void)
2246{
14ce26e7 2247 stw(A0, env->fpuc);
6eea2b1b 2248 FORCE_RET();
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FB
2249}
2250
2251void OPPROTO op_fldcw_A0(void)
2252{
14ce26e7 2253 env->fpuc = lduw(A0);
7a0e1f41 2254 update_fp_status();
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FB
2255}
2256
2257void OPPROTO op_fclex(void)
2258{
2259 env->fpus &= 0x7f00;
2260}
2261
2ee73ac3
FB
2262void OPPROTO op_fwait(void)
2263{
2264 if (env->fpus & FPUS_SE)
2265 fpu_raise_exception();
2266 FORCE_RET();
2267}
2268
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FB
2269void OPPROTO op_fninit(void)
2270{
2271 env->fpus = 0;
2272 env->fpstt = 0;
2273 env->fpuc = 0x37f;
2274 env->fptags[0] = 1;
2275 env->fptags[1] = 1;
2276 env->fptags[2] = 1;
2277 env->fptags[3] = 1;
2278 env->fptags[4] = 1;
2279 env->fptags[5] = 1;
2280 env->fptags[6] = 1;
2281 env->fptags[7] = 1;
2282}
2283
2284void OPPROTO op_fnstenv_A0(void)
2285{
14ce26e7 2286 helper_fstenv(A0, PARAM1);
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FB
2287}
2288
2289void OPPROTO op_fldenv_A0(void)
2290{
14ce26e7 2291 helper_fldenv(A0, PARAM1);
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FB
2292}
2293
2294void OPPROTO op_fnsave_A0(void)
2295{
14ce26e7 2296 helper_fsave(A0, PARAM1);
2c0262af
FB
2297}
2298
2299void OPPROTO op_frstor_A0(void)
2300{
14ce26e7 2301 helper_frstor(A0, PARAM1);
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FB
2302}
2303
2304/* threading support */
2305void OPPROTO op_lock(void)
2306{
2307 cpu_lock();
2308}
2309
2310void OPPROTO op_unlock(void)
2311{
2312 cpu_unlock();
2313}
2314
14ce26e7
FB
2315/* SSE support */
2316static inline void memcpy16(void *d, void *s)
2317{
2318 ((uint32_t *)d)[0] = ((uint32_t *)s)[0];
2319 ((uint32_t *)d)[1] = ((uint32_t *)s)[1];
2320 ((uint32_t *)d)[2] = ((uint32_t *)s)[2];
2321 ((uint32_t *)d)[3] = ((uint32_t *)s)[3];
2322}
2323
2324void OPPROTO op_movo(void)
2325{
2326 /* XXX: badly generated code */
2327 XMMReg *d, *s;
2328 d = (XMMReg *)((char *)env + PARAM1);
2329 s = (XMMReg *)((char *)env + PARAM2);
2330 memcpy16(d, s);
2331}
2332
664e0f19
FB
2333void OPPROTO op_movq(void)
2334{
2335 uint64_t *d, *s;
2336 d = (uint64_t *)((char *)env + PARAM1);
2337 s = (uint64_t *)((char *)env + PARAM2);
2338 *d = *s;
2339}
2340
2341void OPPROTO op_movl(void)
2342{
2343 uint32_t *d, *s;
2344 d = (uint32_t *)((char *)env + PARAM1);
2345 s = (uint32_t *)((char *)env + PARAM2);
2346 *d = *s;
2347}
2348
2349void OPPROTO op_movq_env_0(void)
2350{
2351 uint64_t *d;
2352 d = (uint64_t *)((char *)env + PARAM1);
2353 *d = 0;
2354}
2355
14ce26e7
FB
2356void OPPROTO op_fxsave_A0(void)
2357{
2358 helper_fxsave(A0, PARAM1);
2359}
2360
2361void OPPROTO op_fxrstor_A0(void)
2362{
2363 helper_fxrstor(A0, PARAM1);
2364}
664e0f19
FB
2365
2366/* XXX: optimize by storing fptt and fptags in the static cpu state */
2367void OPPROTO op_enter_mmx(void)
2368{
2369 env->fpstt = 0;
2370 *(uint32_t *)(env->fptags) = 0;
2371 *(uint32_t *)(env->fptags + 4) = 0;
2372}
2373
2374void OPPROTO op_emms(void)
2375{
2376 /* set to empty state */
2377 *(uint32_t *)(env->fptags) = 0x01010101;
2378 *(uint32_t *)(env->fptags + 4) = 0x01010101;
2379}
2380
2381#define SHIFT 0
2382#include "ops_sse.h"
2383
2384#define SHIFT 1
2385#include "ops_sse.h"
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