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6d262dcb SS |
1 | /* |
2 | * SmartFusion2 SOM starter kit(from Emcraft) emulation. | |
3 | * | |
4 | * Copyright (c) 2017 Subbaraya Sundeep <[email protected]> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | #include "qemu/osdep.h" | |
26 | #include "qapi/error.h" | |
27 | #include "qemu/error-report.h" | |
28 | #include "hw/boards.h" | |
29 | #include "hw/arm/arm.h" | |
30 | #include "exec/address-spaces.h" | |
31 | #include "qemu/cutils.h" | |
32 | #include "hw/arm/msf2-soc.h" | |
33 | #include "cpu.h" | |
34 | ||
35 | #define DDR_BASE_ADDRESS 0xA0000000 | |
36 | #define DDR_SIZE (64 * M_BYTE) | |
37 | ||
38 | #define M2S010_ENVM_SIZE (256 * K_BYTE) | |
39 | #define M2S010_ESRAM_SIZE (64 * K_BYTE) | |
40 | ||
41 | static void emcraft_sf2_s2s010_init(MachineState *machine) | |
42 | { | |
43 | DeviceState *dev; | |
44 | DeviceState *spi_flash; | |
45 | MSF2State *soc; | |
46 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
47 | DriveInfo *dinfo = drive_get_next(IF_MTD); | |
48 | qemu_irq cs_line; | |
49 | SSIBus *spi_bus; | |
50 | MemoryRegion *sysmem = get_system_memory(); | |
51 | MemoryRegion *ddr = g_new(MemoryRegion, 1); | |
52 | ||
53 | if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { | |
54 | error_report("This board can only be used with CPU %s", | |
55 | mc->default_cpu_type); | |
56 | } | |
57 | ||
58 | memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE, | |
59 | &error_fatal); | |
60 | memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); | |
61 | ||
62 | dev = qdev_create(NULL, TYPE_MSF2_SOC); | |
63 | qdev_prop_set_string(dev, "part-name", "M2S010"); | |
64 | qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type); | |
65 | ||
66 | qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE); | |
67 | qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE); | |
68 | ||
69 | /* | |
70 | * CPU clock and peripheral clocks(APB0, APB1)are configurable | |
71 | * in Libero. CPU clock is divided by APB0 and APB1 divisors for | |
72 | * peripherals. Emcraft's SoM kit comes with these settings by default. | |
73 | */ | |
74 | qdev_prop_set_uint32(dev, "m3clk", 142 * 1000000); | |
75 | qdev_prop_set_uint32(dev, "apb0div", 2); | |
76 | qdev_prop_set_uint32(dev, "apb1div", 2); | |
77 | ||
78 | object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); | |
79 | ||
80 | soc = MSF2_SOC(dev); | |
81 | ||
82 | /* Attach SPI flash to SPI0 controller */ | |
83 | spi_bus = (SSIBus *)qdev_get_child_bus(dev, "spi0"); | |
84 | spi_flash = ssi_create_slave_no_init(spi_bus, "s25sl12801"); | |
85 | qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1); | |
86 | if (dinfo) { | |
87 | qdev_prop_set_drive(spi_flash, "drive", blk_by_legacy_dinfo(dinfo), | |
88 | &error_fatal); | |
89 | } | |
90 | qdev_init_nofail(spi_flash); | |
91 | cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0); | |
92 | sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line); | |
93 | ||
94 | armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, | |
95 | soc->envm_size); | |
96 | } | |
97 | ||
98 | static void emcraft_sf2_machine_init(MachineClass *mc) | |
99 | { | |
100 | mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)"; | |
101 | mc->init = emcraft_sf2_s2s010_init; | |
102 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); | |
103 | } | |
104 | ||
105 | DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) |