[qemu.git] / target-i386 / machine.c

#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/pc.h"
#include "hw/isa.h"

#include "exec-all.h"

void register_machines(void)
{
    qemu_register_machine(&pc_machine);
    qemu_register_machine(&isapc_machine);
}

static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
{
    qemu_put_be32(f, dt->selector);
    qemu_put_betl(f, dt->base);
    qemu_put_be32(f, dt->limit);
    qemu_put_be32(f, dt->flags);
}

static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
{
    dt->selector = qemu_get_be32(f);
    dt->base = qemu_get_betl(f);
    dt->limit = qemu_get_be32(f);
    dt->flags = qemu_get_be32(f);
}

void cpu_save(QEMUFile *f, void *opaque)
{
    CPUState *env = opaque;
    uint16_t fptag, fpus, fpuc, fpregs_format;
    uint32_t hflags;
    int32_t a20_mask;
    int i;

    for(i = 0; i < CPU_NB_REGS; i++)
        qemu_put_betls(f, &env->regs[i]);
    qemu_put_betls(f, &env->eip);
    qemu_put_betls(f, &env->eflags);
    hflags = env->hflags; /* XXX: suppress most of the redundant hflags */
    qemu_put_be32s(f, &hflags);

    /* FPU */
    fpuc = env->fpuc;
    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
    fptag = 0;
    for(i = 0; i < 8; i++) {
        fptag |= ((!env->fptags[i]) << i);
    }

    qemu_put_be16s(f, &fpuc);
    qemu_put_be16s(f, &fpus);
    qemu_put_be16s(f, &fptag);

#ifdef USE_X86LDOUBLE
    fpregs_format = 0;
#else
    fpregs_format = 1;
#endif
    qemu_put_be16s(f, &fpregs_format);

    for(i = 0; i < 8; i++) {
#ifdef USE_X86LDOUBLE
        {
            uint64_t mant;
            uint16_t exp;
            /* we save the real CPU data (in case of MMX usage only 'mant'
               contains the MMX register */
            cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
            qemu_put_be64(f, mant);
            qemu_put_be16(f, exp);
        }
#else
        /* if we use doubles for float emulation, we save the doubles to
           avoid losing information in case of MMX usage. It can give
           problems if the image is restored on a CPU where long
           doubles are used instead. */
        qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
#endif
    }

    for(i = 0; i < 6; i++)
        cpu_put_seg(f, &env->segs[i]);
    cpu_put_seg(f, &env->ldt);
    cpu_put_seg(f, &env->tr);
    cpu_put_seg(f, &env->gdt);
    cpu_put_seg(f, &env->idt);

    qemu_put_be32s(f, &env->sysenter_cs);
    qemu_put_be32s(f, &env->sysenter_esp);
    qemu_put_be32s(f, &env->sysenter_eip);

    qemu_put_betls(f, &env->cr[0]);
    qemu_put_betls(f, &env->cr[2]);
    qemu_put_betls(f, &env->cr[3]);
    qemu_put_betls(f, &env->cr[4]);

    for(i = 0; i < 8; i++)
        qemu_put_betls(f, &env->dr[i]);

    /* MMU */
    a20_mask = (int32_t) env->a20_mask;
    qemu_put_be32s(f, &a20_mask);

    /* XMM */
    qemu_put_be32s(f, &env->mxcsr);
    for(i = 0; i < CPU_NB_REGS; i++) {
        qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0));
        qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1));
    }

#ifdef TARGET_X86_64
    qemu_put_be64s(f, &env->efer);
    qemu_put_be64s(f, &env->star);
    qemu_put_be64s(f, &env->lstar);
    qemu_put_be64s(f, &env->cstar);
    qemu_put_be64s(f, &env->fmask);
    qemu_put_be64s(f, &env->kernelgsbase);
#endif
    qemu_put_be32s(f, &env->smbase);
}

#ifdef USE_X86LDOUBLE
/* XXX: add that in a FPU generic layer */
union x86_longdouble {
    uint64_t mant;
    uint16_t exp;
};

#define MANTD1(fp)	(fp & ((1LL << 52) - 1))
#define EXPBIAS1 1023
#define EXPD1(fp)	((fp >> 52) & 0x7FF)
#define SIGND1(fp)	((fp >> 32) & 0x80000000)

static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
{
    int e;
    /* mantissa */
    p->mant = (MANTD1(temp) << 11) | (1LL << 63);
    /* exponent + sign */
    e = EXPD1(temp) - EXPBIAS1 + 16383;
    e |= SIGND1(temp) >> 16;
    p->exp = e;
}
#endif

int cpu_load(QEMUFile *f, void *opaque, int version_id)
{
    CPUState *env = opaque;
    int i, guess_mmx;
    uint32_t hflags;
    uint16_t fpus, fpuc, fptag, fpregs_format;
    int32_t a20_mask;

    if (version_id != 3 && version_id != 4)
        return -EINVAL;
    for(i = 0; i < CPU_NB_REGS; i++)
        qemu_get_betls(f, &env->regs[i]);
    qemu_get_betls(f, &env->eip);
    qemu_get_betls(f, &env->eflags);
    qemu_get_be32s(f, &hflags);

    qemu_get_be16s(f, &fpuc);
    qemu_get_be16s(f, &fpus);
    qemu_get_be16s(f, &fptag);
    qemu_get_be16s(f, &fpregs_format);

    /* NOTE: we cannot always restore the FPU state if the image come
       from a host with a different 'USE_X86LDOUBLE' define. We guess
       if we are in an MMX state to restore correctly in that case. */
    guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0);
    for(i = 0; i < 8; i++) {
        uint64_t mant;
        uint16_t exp;

        switch(fpregs_format) {
        case 0:
            mant = qemu_get_be64(f);
            exp = qemu_get_be16(f);
#ifdef USE_X86LDOUBLE
            env->fpregs[i].d = cpu_set_fp80(mant, exp);
#else
            /* difficult case */
            if (guess_mmx)
                env->fpregs[i].mmx.MMX_Q(0) = mant;
            else
                env->fpregs[i].d = cpu_set_fp80(mant, exp);
#endif
            break;
        case 1:
            mant = qemu_get_be64(f);
#ifdef USE_X86LDOUBLE
            {
                union x86_longdouble *p;
                /* difficult case */
                p = (void *)&env->fpregs[i];
                if (guess_mmx) {
                    p->mant = mant;
                    p->exp = 0xffff;
                } else {
                    fp64_to_fp80(p, mant);
                }
            }
#else
            env->fpregs[i].mmx.MMX_Q(0) = mant;
#endif
            break;
        default:
            return -EINVAL;
        }
    }

    env->fpuc = fpuc;
    /* XXX: restore FPU round state */
    env->fpstt = (fpus >> 11) & 7;
    env->fpus = fpus & ~0x3800;
    fptag ^= 0xff;
    for(i = 0; i < 8; i++) {
        env->fptags[i] = (fptag >> i) & 1;
    }

    for(i = 0; i < 6; i++)
        cpu_get_seg(f, &env->segs[i]);
    cpu_get_seg(f, &env->ldt);
    cpu_get_seg(f, &env->tr);
    cpu_get_seg(f, &env->gdt);
    cpu_get_seg(f, &env->idt);

    qemu_get_be32s(f, &env->sysenter_cs);
    qemu_get_be32s(f, &env->sysenter_esp);
    qemu_get_be32s(f, &env->sysenter_eip);

    qemu_get_betls(f, &env->cr[0]);
    qemu_get_betls(f, &env->cr[2]);
    qemu_get_betls(f, &env->cr[3]);
    qemu_get_betls(f, &env->cr[4]);

    for(i = 0; i < 8; i++)
        qemu_get_betls(f, &env->dr[i]);

    /* MMU */
    qemu_get_be32s(f, &a20_mask);
    env->a20_mask = a20_mask;

    qemu_get_be32s(f, &env->mxcsr);
    for(i = 0; i < CPU_NB_REGS; i++) {
        qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0));
        qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1));
    }

#ifdef TARGET_X86_64
    qemu_get_be64s(f, &env->efer);
    qemu_get_be64s(f, &env->star);
    qemu_get_be64s(f, &env->lstar);
    qemu_get_be64s(f, &env->cstar);
    qemu_get_be64s(f, &env->fmask);
    qemu_get_be64s(f, &env->kernelgsbase);
#endif
    if (version_id >= 4)
        qemu_get_be32s(f, &env->smbase);

    /* XXX: compute hflags from scratch, except for CPL and IIF */
    env->hflags = hflags;
    tlb_flush(env, 1);
    return 0;
}
Commit	Line	Data
8dd3dca3 AJ	1	#include "hw/hw.h"
	2	#include "hw/boards.h"
	3	#include "hw/pc.h"
	4	#include "hw/isa.h"
	5
	6	#include "exec-all.h"
	7
	8	void register_machines(void)
	9	{
	10	qemu_register_machine(&pc_machine);
	11	qemu_register_machine(&isapc_machine);
	12	}
	13
	14	static void cpu_put_seg(QEMUFile f, SegmentCache dt)
	15	{
	16	qemu_put_be32(f, dt->selector);
	17	qemu_put_betl(f, dt->base);
	18	qemu_put_be32(f, dt->limit);
	19	qemu_put_be32(f, dt->flags);
	20	}
	21
	22	static void cpu_get_seg(QEMUFile f, SegmentCache dt)
	23	{
	24	dt->selector = qemu_get_be32(f);
	25	dt->base = qemu_get_betl(f);
	26	dt->limit = qemu_get_be32(f);
	27	dt->flags = qemu_get_be32(f);
	28	}
	29
	30	void cpu_save(QEMUFile f, void opaque)
	31	{
	32	CPUState *env = opaque;
	33	uint16_t fptag, fpus, fpuc, fpregs_format;
	34	uint32_t hflags;
7caa33f7	35	int32_t a20_mask;
8dd3dca3 AJ	36	int i;
	37
	38	for(i = 0; i < CPU_NB_REGS; i++)
	39	qemu_put_betls(f, &env->regs[i]);
	40	qemu_put_betls(f, &env->eip);
	41	qemu_put_betls(f, &env->eflags);
	42	hflags = env->hflags; /* XXX: suppress most of the redundant hflags */
	43	qemu_put_be32s(f, &hflags);
	44
	45	/* FPU */
	46	fpuc = env->fpuc;
	47	fpus = (env->fpus & ~0x3800) \| (env->fpstt & 0x7) << 11;
	48	fptag = 0;
	49	for(i = 0; i < 8; i++) {
	50	fptag \|= ((!env->fptags[i]) << i);
	51	}
	52
	53	qemu_put_be16s(f, &fpuc);
	54	qemu_put_be16s(f, &fpus);
	55	qemu_put_be16s(f, &fptag);
	56
	57	#ifdef USE_X86LDOUBLE
	58	fpregs_format = 0;
	59	#else
	60	fpregs_format = 1;
	61	#endif
	62	qemu_put_be16s(f, &fpregs_format);
	63
	64	for(i = 0; i < 8; i++) {
	65	#ifdef USE_X86LDOUBLE
	66	{
	67	uint64_t mant;
	68	uint16_t exp;
	69	/* we save the real CPU data (in case of MMX usage only 'mant'
	70	contains the MMX register */
	71	cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
	72	qemu_put_be64(f, mant);
	73	qemu_put_be16(f, exp);
	74	}
	75	#else
	76	/* if we use doubles for float emulation, we save the doubles to
	77	avoid losing information in case of MMX usage. It can give
	78	problems if the image is restored on a CPU where long
	79	doubles are used instead. */
	80	qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
	81	#endif
	82	}
	83
	84	for(i = 0; i < 6; i++)
	85	cpu_put_seg(f, &env->segs[i]);
	86	cpu_put_seg(f, &env->ldt);
	87	cpu_put_seg(f, &env->tr);
	88	cpu_put_seg(f, &env->gdt);
	89	cpu_put_seg(f, &env->idt);
	90
	91	qemu_put_be32s(f, &env->sysenter_cs);
	92	qemu_put_be32s(f, &env->sysenter_esp);
	93	qemu_put_be32s(f, &env->sysenter_eip);
	94
	95	qemu_put_betls(f, &env->cr[0]);
	96	qemu_put_betls(f, &env->cr[2]);
	97	qemu_put_betls(f, &env->cr[3]);
	98	qemu_put_betls(f, &env->cr[4]);
	99
100	for(i = 0; i < 8; i++)
101	qemu_put_betls(f, &env->dr[i]);
102
103	/* MMU */
7caa33f7 AJ	104	a20_mask = (int32_t) env->a20_mask;
7caa33f7 AJ	105	qemu_put_be32s(f, &a20_mask);
8dd3dca3 AJ	106
	107	/* XMM */
	108	qemu_put_be32s(f, &env->mxcsr);
	109	for(i = 0; i < CPU_NB_REGS; i++) {
	110	qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0));
	111	qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1));
	112	}
	113
	114	#ifdef TARGET_X86_64
	115	qemu_put_be64s(f, &env->efer);
	116	qemu_put_be64s(f, &env->star);
	117	qemu_put_be64s(f, &env->lstar);
	118	qemu_put_be64s(f, &env->cstar);
	119	qemu_put_be64s(f, &env->fmask);
	120	qemu_put_be64s(f, &env->kernelgsbase);
	121	#endif
	122	qemu_put_be32s(f, &env->smbase);
	123	}
	124
	125	#ifdef USE_X86LDOUBLE
	126	/* XXX: add that in a FPU generic layer */
	127	union x86_longdouble {
	128	uint64_t mant;
	129	uint16_t exp;
	130	};
	131
	132	#define MANTD1(fp) (fp & ((1LL << 52) - 1))
	133	#define EXPBIAS1 1023
	134	#define EXPD1(fp) ((fp >> 52) & 0x7FF)
	135	#define SIGND1(fp) ((fp >> 32) & 0x80000000)
	136
	137	static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
	138	{
	139	int e;
	140	/* mantissa */
	141	p->mant = (MANTD1(temp) << 11) \| (1LL << 63);
	142	/* exponent + sign */
	143	e = EXPD1(temp) - EXPBIAS1 + 16383;
	144	e \|= SIGND1(temp) >> 16;
	145	p->exp = e;
	146	}
	147	#endif
	148
	149	int cpu_load(QEMUFile f, void opaque, int version_id)
	150	{
	151	CPUState *env = opaque;
	152	int i, guess_mmx;
	153	uint32_t hflags;
	154	uint16_t fpus, fpuc, fptag, fpregs_format;
7caa33f7	155	int32_t a20_mask;
8dd3dca3 AJ	156
	157	if (version_id != 3 && version_id != 4)
	158	return -EINVAL;
	159	for(i = 0; i < CPU_NB_REGS; i++)
	160	qemu_get_betls(f, &env->regs[i]);
	161	qemu_get_betls(f, &env->eip);
	162	qemu_get_betls(f, &env->eflags);
	163	qemu_get_be32s(f, &hflags);
	164
	165	qemu_get_be16s(f, &fpuc);
	166	qemu_get_be16s(f, &fpus);
	167	qemu_get_be16s(f, &fptag);
	168	qemu_get_be16s(f, &fpregs_format);
	169
	170	/* NOTE: we cannot always restore the FPU state if the image come
	171	from a host with a different 'USE_X86LDOUBLE' define. We guess
	172	if we are in an MMX state to restore correctly in that case. */
	173	guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0);
	174	for(i = 0; i < 8; i++) {
	175	uint64_t mant;
	176	uint16_t exp;
	177
	178	switch(fpregs_format) {
	179	case 0:
	180	mant = qemu_get_be64(f);
	181	exp = qemu_get_be16(f);
	182	#ifdef USE_X86LDOUBLE
	183	env->fpregs[i].d = cpu_set_fp80(mant, exp);
	184	#else
	185	/* difficult case */
	186	if (guess_mmx)
	187	env->fpregs[i].mmx.MMX_Q(0) = mant;
	188	else
	189	env->fpregs[i].d = cpu_set_fp80(mant, exp);
	190	#endif
	191	break;
	192	case 1:
	193	mant = qemu_get_be64(f);
	194	#ifdef USE_X86LDOUBLE
	195	{
	196	union x86_longdouble *p;
	197	/* difficult case */
	198	p = (void *)&env->fpregs[i];
	199	if (guess_mmx) {
	200	p->mant = mant;
	201	p->exp = 0xffff;
	202	} else {
	203	fp64_to_fp80(p, mant);
	204	}
	205	}
	206	#else
	207	env->fpregs[i].mmx.MMX_Q(0) = mant;
	208	#endif
	209	break;
	210	default:
	211	return -EINVAL;
	212	}
	213	}
	214
	215	env->fpuc = fpuc;
	216	/* XXX: restore FPU round state */
	217	env->fpstt = (fpus >> 11) & 7;
	218	env->fpus = fpus & ~0x3800;
	219	fptag ^= 0xff;
220	for(i = 0; i < 8; i++) {
221	env->fptags[i] = (fptag >> i) & 1;
222	}
223
224	for(i = 0; i < 6; i++)
225	cpu_get_seg(f, &env->segs[i]);
226	cpu_get_seg(f, &env->ldt);
227	cpu_get_seg(f, &env->tr);
228	cpu_get_seg(f, &env->gdt);
229	cpu_get_seg(f, &env->idt);
230
231	qemu_get_be32s(f, &env->sysenter_cs);
232	qemu_get_be32s(f, &env->sysenter_esp);
233	qemu_get_be32s(f, &env->sysenter_eip);
234
235	qemu_get_betls(f, &env->cr[0]);
236	qemu_get_betls(f, &env->cr[2]);
237	qemu_get_betls(f, &env->cr[3]);
238	qemu_get_betls(f, &env->cr[4]);
239
240	for(i = 0; i < 8; i++)
241	qemu_get_betls(f, &env->dr[i]);
242
243	/* MMU */
7caa33f7 AJ	244	qemu_get_be32s(f, &a20_mask);
7caa33f7 AJ	245	env->a20_mask = a20_mask;
8dd3dca3 AJ	246
	247	qemu_get_be32s(f, &env->mxcsr);
	248	for(i = 0; i < CPU_NB_REGS; i++) {
	249	qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0));
	250	qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1));
	251	}
	252
	253	#ifdef TARGET_X86_64
	254	qemu_get_be64s(f, &env->efer);
	255	qemu_get_be64s(f, &env->star);
	256	qemu_get_be64s(f, &env->lstar);
	257	qemu_get_be64s(f, &env->cstar);
	258	qemu_get_be64s(f, &env->fmask);
	259	qemu_get_be64s(f, &env->kernelgsbase);
	260	#endif
	261	if (version_id >= 4)
	262	qemu_get_be32s(f, &env->smbase);
	263
	264	/* XXX: compute hflags from scratch, except for CPL and IIF */
	265	env->hflags = hflags;
	266	tlb_flush(env, 1);
	267	return 0;
	268	}