[qemu.git] / hw / lm832x.c

/*
 * National Semiconductor LM8322/8323 GPIO keyboard & PWM chips.
 *
 * Copyright (C) 2008 Nokia Corporation
 * Written by Andrzej Zaborowski <[email protected]>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 or
 * (at your option) version 3 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program; if not, see <http://www.gnu.org/licenses/>.
 */

#include "hw/hw.h"
#include "hw/i2c.h"
#include "qemu/timer.h"
#include "ui/console.h"

typedef struct {
    I2CSlave i2c;
    uint8_t i2c_dir;
    uint8_t i2c_cycle;
    uint8_t reg;

    qemu_irq nirq;
    uint16_t model;

    struct {
        qemu_irq out[2];
        int in[2][2];
    } mux;

    uint8_t config;
    uint8_t status;
    uint8_t acttime;
    uint8_t error;
    uint8_t clock;

    struct {
        uint16_t pull;
        uint16_t mask;
        uint16_t dir;
        uint16_t level;
        qemu_irq out[16];
    } gpio;

    struct {
        uint8_t dbnctime;
        uint8_t size;
        uint8_t start;
        uint8_t len;
        uint8_t fifo[16];
    } kbd;

    struct {
        uint16_t file[256];
	uint8_t faddr;
        uint8_t addr[3];
        QEMUTimer *tm[3];
    } pwm;
} LM823KbdState;

#define INT_KEYPAD		(1 << 0)
#define INT_ERROR		(1 << 3)
#define INT_NOINIT		(1 << 4)
#define INT_PWMEND(n)		(1 << (5 + n))

#define ERR_BADPAR		(1 << 0)
#define ERR_CMDUNK		(1 << 1)
#define ERR_KEYOVR		(1 << 2)
#define ERR_FIFOOVR		(1 << 6)

static void lm_kbd_irq_update(LM823KbdState *s)
{
    qemu_set_irq(s->nirq, !s->status);
}

static void lm_kbd_gpio_update(LM823KbdState *s)
{
}

static void lm_kbd_reset(LM823KbdState *s)
{
    s->config = 0x80;
    s->status = INT_NOINIT;
    s->acttime = 125;
    s->kbd.dbnctime = 3;
    s->kbd.size = 0x33;
    s->clock = 0x08;

    lm_kbd_irq_update(s);
    lm_kbd_gpio_update(s);
}

static void lm_kbd_error(LM823KbdState *s, int err)
{
    s->error |= err;
    s->status |= INT_ERROR;
    lm_kbd_irq_update(s);
}

static void lm_kbd_pwm_tick(LM823KbdState *s, int line)
{
}

static void lm_kbd_pwm_start(LM823KbdState *s, int line)
{
    lm_kbd_pwm_tick(s, line);
}

static void lm_kbd_pwm0_tick(void *opaque)
{
    lm_kbd_pwm_tick(opaque, 0);
}
static void lm_kbd_pwm1_tick(void *opaque)
{
    lm_kbd_pwm_tick(opaque, 1);
}
static void lm_kbd_pwm2_tick(void *opaque)
{
    lm_kbd_pwm_tick(opaque, 2);
}

enum {
    LM832x_CMD_READ_ID		= 0x80, /* Read chip ID. */
    LM832x_CMD_WRITE_CFG	= 0x81, /* Set configuration item. */
    LM832x_CMD_READ_INT		= 0x82, /* Get interrupt status. */
    LM832x_CMD_RESET		= 0x83, /* Reset, same as external one */
    LM823x_CMD_WRITE_PULL_DOWN	= 0x84, /* Select GPIO pull-up/down. */
    LM832x_CMD_WRITE_PORT_SEL	= 0x85, /* Select GPIO in/out. */
    LM832x_CMD_WRITE_PORT_STATE	= 0x86, /* Set GPIO pull-up/down. */
    LM832x_CMD_READ_PORT_SEL	= 0x87, /* Get GPIO in/out. */
    LM832x_CMD_READ_PORT_STATE	= 0x88, /* Get GPIO pull-up/down. */
    LM832x_CMD_READ_FIFO	= 0x89, /* Read byte from FIFO. */
    LM832x_CMD_RPT_READ_FIFO	= 0x8a, /* Read FIFO (no increment). */
    LM832x_CMD_SET_ACTIVE	= 0x8b, /* Set active time. */
    LM832x_CMD_READ_ERROR	= 0x8c, /* Get error status. */
    LM832x_CMD_READ_ROTATOR	= 0x8e, /* Read rotator status. */
    LM832x_CMD_SET_DEBOUNCE	= 0x8f, /* Set debouncing time. */
    LM832x_CMD_SET_KEY_SIZE	= 0x90, /* Set keypad size. */
    LM832x_CMD_READ_KEY_SIZE	= 0x91, /* Get keypad size. */
    LM832x_CMD_READ_CFG		= 0x92, /* Get configuration item. */
    LM832x_CMD_WRITE_CLOCK	= 0x93, /* Set clock config. */
    LM832x_CMD_READ_CLOCK	= 0x94, /* Get clock config. */
    LM832x_CMD_PWM_WRITE	= 0x95, /* Write PWM script. */
    LM832x_CMD_PWM_START	= 0x96, /* Start PWM engine. */
    LM832x_CMD_PWM_STOP		= 0x97, /* Stop PWM engine. */
    LM832x_GENERAL_ERROR	= 0xff, /* There was one error.
                                           Previously was represented by -1
                                           This is not a command */
};

#define LM832x_MAX_KPX		8
#define LM832x_MAX_KPY		12

static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte)
{
    int ret;

    switch (reg) {
    case LM832x_CMD_READ_ID:
        ret = 0x0400;
        break;

    case LM832x_CMD_READ_INT:
        ret = s->status;
        if (!(s->status & INT_NOINIT)) {
            s->status = 0;
            lm_kbd_irq_update(s);
        }
        break;

    case LM832x_CMD_READ_PORT_SEL:
        ret = s->gpio.dir;
        break;
    case LM832x_CMD_READ_PORT_STATE:
        ret = s->gpio.mask;
        break;

    case LM832x_CMD_READ_FIFO:
        if (s->kbd.len <= 1)
            return 0x00;

        /* Example response from the two commands after a INT_KEYPAD
         * interrupt caused by the key 0x3c being pressed:
         * RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
         *     READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
         * RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
         *
         * 55 is the code of the key release event serviced in the previous
         * interrupt handling.
         *
         * TODO: find out whether the FIFO is advanced a single character
         * before reading every byte or the whole size of the FIFO at the
         * last LM832x_CMD_READ_FIFO.  This affects LM832x_CMD_RPT_READ_FIFO
         * output in cases where there are more than one event in the FIFO.
         * Assume 0xbc and 0x3c events are in the FIFO:
         * RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9
         *     READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9
         * Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c?
         */
        s->kbd.start ++;
        s->kbd.start &= sizeof(s->kbd.fifo) - 1;
        s->kbd.len --;

        return s->kbd.fifo[s->kbd.start];
    case LM832x_CMD_RPT_READ_FIFO:
        if (byte >= s->kbd.len)
            return 0x00;

        return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)];

    case LM832x_CMD_READ_ERROR:
        return s->error;

    case LM832x_CMD_READ_ROTATOR:
        return 0;

    case LM832x_CMD_READ_KEY_SIZE:
        return s->kbd.size;

    case LM832x_CMD_READ_CFG:
        return s->config & 0xf;

    case LM832x_CMD_READ_CLOCK:
        return (s->clock & 0xfc) | 2;

    default:
        lm_kbd_error(s, ERR_CMDUNK);
        fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
        return 0x00;
    }

    return ret >> (byte << 3);
}

static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
{
    switch (reg) {
    case LM832x_CMD_WRITE_CFG:
        s->config = value;
        /* This must be done whenever s->mux.in is updated (never).  */
        if ((s->config >> 1) & 1)			/* MUX1EN */
            qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]);
        if ((s->config >> 3) & 1)			/* MUX2EN */
            qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]);
        /* TODO: check that this is issued only following the chip reset
         * and not in the middle of operation and that it is followed by
         * the GPIO ports re-resablishing through WRITE_PORT_SEL and
         * WRITE_PORT_STATE (using a timer perhaps) and otherwise output
         * warnings.  */
        s->status = 0;
        lm_kbd_irq_update(s);
        s->kbd.len = 0;
        s->kbd.start = 0;
        s->reg = LM832x_GENERAL_ERROR;
        break;

    case LM832x_CMD_RESET:
        if (value == 0xaa)
            lm_kbd_reset(s);
        else
            lm_kbd_error(s, ERR_BADPAR);
        s->reg = LM832x_GENERAL_ERROR;
        break;

    case LM823x_CMD_WRITE_PULL_DOWN:
        if (!byte)
            s->gpio.pull = value;
        else {
            s->gpio.pull |= value << 8;
            lm_kbd_gpio_update(s);
            s->reg = LM832x_GENERAL_ERROR;
        }
        break;
    case LM832x_CMD_WRITE_PORT_SEL:
        if (!byte)
            s->gpio.dir = value;
        else {
            s->gpio.dir |= value << 8;
            lm_kbd_gpio_update(s);
            s->reg = LM832x_GENERAL_ERROR;
        }
        break;
    case LM832x_CMD_WRITE_PORT_STATE:
        if (!byte)
            s->gpio.mask = value;
        else {
            s->gpio.mask |= value << 8;
            lm_kbd_gpio_update(s);
            s->reg = LM832x_GENERAL_ERROR;
        }
        break;

    case LM832x_CMD_SET_ACTIVE:
        s->acttime = value;
        s->reg = LM832x_GENERAL_ERROR;
        break;

    case LM832x_CMD_SET_DEBOUNCE:
        s->kbd.dbnctime = value;
        s->reg = LM832x_GENERAL_ERROR;
        if (!value)
            lm_kbd_error(s, ERR_BADPAR);
        break;

    case LM832x_CMD_SET_KEY_SIZE:
        s->kbd.size = value;
        s->reg = LM832x_GENERAL_ERROR;
        if (
                        (value & 0xf) < 3 || (value & 0xf) > LM832x_MAX_KPY ||
                        (value >> 4) < 3 || (value >> 4) > LM832x_MAX_KPX)
            lm_kbd_error(s, ERR_BADPAR);
        break;

    case LM832x_CMD_WRITE_CLOCK:
        s->clock = value;
        s->reg = LM832x_GENERAL_ERROR;
        if ((value & 3) && (value & 3) != 3) {
            lm_kbd_error(s, ERR_BADPAR);
            fprintf(stderr, "%s: invalid clock setting in RCPWM\n",
                            __FUNCTION__);
        }
        /* TODO: Validate that the command is only issued once */
        break;

    case LM832x_CMD_PWM_WRITE:
        if (byte == 0) {
            if (!(value & 3) || (value >> 2) > 59) {
                lm_kbd_error(s, ERR_BADPAR);
                s->reg = LM832x_GENERAL_ERROR;
                break;
            }

            s->pwm.faddr = value;
            s->pwm.file[s->pwm.faddr] = 0;
        } else if (byte == 1) {
            s->pwm.file[s->pwm.faddr] |= value << 8;
        } else if (byte == 2) {
            s->pwm.file[s->pwm.faddr] |= value << 0;
            s->reg = LM832x_GENERAL_ERROR;
        }
        break;
    case LM832x_CMD_PWM_START:
        s->reg = LM832x_GENERAL_ERROR;
        if (!(value & 3) || (value >> 2) > 59) {
            lm_kbd_error(s, ERR_BADPAR);
            break;
        }

        s->pwm.addr[(value & 3) - 1] = value >> 2;
        lm_kbd_pwm_start(s, (value & 3) - 1);
        break;
    case LM832x_CMD_PWM_STOP:
        s->reg = LM832x_GENERAL_ERROR;
        if (!(value & 3)) {
            lm_kbd_error(s, ERR_BADPAR);
            break;
        }

        qemu_del_timer(s->pwm.tm[(value & 3) - 1]);
        break;

    case LM832x_GENERAL_ERROR:
        lm_kbd_error(s, ERR_BADPAR);
        break;
    default:
        lm_kbd_error(s, ERR_CMDUNK);
        fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
        break;
    }
}

static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
{
    LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);

    switch (event) {
    case I2C_START_RECV:
    case I2C_START_SEND:
        s->i2c_cycle = 0;
        s->i2c_dir = (event == I2C_START_SEND);
        break;

    default:
        break;
    }
}

static int lm_i2c_rx(I2CSlave *i2c)
{
    LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);

    return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
}

static int lm_i2c_tx(I2CSlave *i2c, uint8_t data)
{
    LM823KbdState *s = (LM823KbdState *) i2c;

    if (!s->i2c_cycle)
        s->reg = data;
    else
        lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data);
    s->i2c_cycle ++;

    return 0;
}

static int lm_kbd_post_load(void *opaque, int version_id)
{
    LM823KbdState *s = opaque;

    lm_kbd_irq_update(s);
    lm_kbd_gpio_update(s);

    return 0;
}

static const VMStateDescription vmstate_lm_kbd = {
    .name = "LM8323",
    .version_id = 0,
    .minimum_version_id = 0,
    .minimum_version_id_old = 0,
    .post_load = lm_kbd_post_load,
    .fields      = (VMStateField []) {
        VMSTATE_I2C_SLAVE(i2c, LM823KbdState),
        VMSTATE_UINT8(i2c_dir, LM823KbdState),
        VMSTATE_UINT8(i2c_cycle, LM823KbdState),
        VMSTATE_UINT8(reg, LM823KbdState),
        VMSTATE_UINT8(config, LM823KbdState),
        VMSTATE_UINT8(status, LM823KbdState),
        VMSTATE_UINT8(acttime, LM823KbdState),
        VMSTATE_UINT8(error, LM823KbdState),
        VMSTATE_UINT8(clock, LM823KbdState),
        VMSTATE_UINT16(gpio.pull, LM823KbdState),
        VMSTATE_UINT16(gpio.mask, LM823KbdState),
        VMSTATE_UINT16(gpio.dir, LM823KbdState),
        VMSTATE_UINT16(gpio.level, LM823KbdState),
        VMSTATE_UINT8(kbd.dbnctime, LM823KbdState),
        VMSTATE_UINT8(kbd.size, LM823KbdState),
        VMSTATE_UINT8(kbd.start, LM823KbdState),
        VMSTATE_UINT8(kbd.len, LM823KbdState),
        VMSTATE_BUFFER(kbd.fifo, LM823KbdState),
        VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256),
        VMSTATE_UINT8(pwm.faddr, LM823KbdState),
        VMSTATE_BUFFER(pwm.addr, LM823KbdState),
        VMSTATE_TIMER_ARRAY(pwm.tm, LM823KbdState, 3),
        VMSTATE_END_OF_LIST()
    }
};


static int lm8323_init(I2CSlave *i2c)
{
    LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);

    s->model = 0x8323;
    s->pwm.tm[0] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm0_tick, s);
    s->pwm.tm[1] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm1_tick, s);
    s->pwm.tm[2] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm2_tick, s);
    qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1);

    lm_kbd_reset(s);

    qemu_register_reset((void *) lm_kbd_reset, s);
    return 0;
}

void lm832x_key_event(DeviceState *dev, int key, int state)
{
    LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, I2C_SLAVE(dev));

    if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
        return;

    if (s->kbd.len >= sizeof(s->kbd.fifo)) {
        lm_kbd_error(s, ERR_FIFOOVR);
        return;
    }

    s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
            key | (state << 7);

    /* We never set ERR_KEYOVR because we support multiple keys fine.  */
    s->status |= INT_KEYPAD;
    lm_kbd_irq_update(s);
}

static void lm8323_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);

    k->init = lm8323_init;
    k->event = lm_i2c_event;
    k->recv = lm_i2c_rx;
    k->send = lm_i2c_tx;
    dc->vmsd = &vmstate_lm_kbd;
}

static const TypeInfo lm8323_info = {
    .name          = "lm8323",
    .parent        = TYPE_I2C_SLAVE,
    .instance_size = sizeof(LM823KbdState),
    .class_init    = lm8323_class_init,
};

static void lm832x_register_types(void)
{
    type_register_static(&lm8323_info);
}

type_init(lm832x_register_types)
Commit	Line	Data
1d4e547b AZ	1	/*
	2	* National Semiconductor LM8322/8323 GPIO keyboard & PWM chips.
	3	*
	4	* Copyright (C) 2008 Nokia Corporation
	5	* Written by Andrzej Zaborowski <[email protected]>
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 or
	10	* (at your option) version 3 of the License.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
fad6cb1a	17	* You should have received a copy of the GNU General Public License along
8167ee88	18	* with this program; if not, see <http://www.gnu.org/licenses/>.
1d4e547b AZ	19	*/
1d4e547b AZ	20
83c9f4ca PB	21	#include "hw/hw.h"
83c9f4ca PB	22	#include "hw/i2c.h"
1de7afc9	23	#include "qemu/timer.h"
28ecbaee	24	#include "ui/console.h"
1d4e547b	25
bc24a225	26	typedef struct {
9e07bdf8	27	I2CSlave i2c;
e69f0602 JQ	28	uint8_t i2c_dir;
	29	uint8_t i2c_cycle;
	30	uint8_t reg;
1d4e547b AZ	31
	32	qemu_irq nirq;
	33	uint16_t model;
	34
	35	struct {
	36	qemu_irq out[2];
	37	int in[2][2];
	38	} mux;
	39
	40	uint8_t config;
	41	uint8_t status;
	42	uint8_t acttime;
	43	uint8_t error;
	44	uint8_t clock;
	45
	46	struct {
	47	uint16_t pull;
	48	uint16_t mask;
	49	uint16_t dir;
	50	uint16_t level;
	51	qemu_irq out[16];
	52	} gpio;
	53
	54	struct {
	55	uint8_t dbnctime;
	56	uint8_t size;
e69f0602 JQ	57	uint8_t start;
e69f0602 JQ	58	uint8_t len;
1d4e547b AZ	59	uint8_t fifo[16];
	60	} kbd;
	61
	62	struct {
	63	uint16_t file[256];
	64	uint8_t faddr;
	65	uint8_t addr[3];
	66	QEMUTimer *tm[3];
	67	} pwm;
bc24a225	68	} LM823KbdState;
1d4e547b AZ	69
	70	#define INT_KEYPAD (1 << 0)
	71	#define INT_ERROR (1 << 3)
	72	#define INT_NOINIT (1 << 4)
	73	#define INT_PWMEND(n) (1 << (5 + n))
	74
	75	#define ERR_BADPAR (1 << 0)
	76	#define ERR_CMDUNK (1 << 1)
	77	#define ERR_KEYOVR (1 << 2)
	78	#define ERR_FIFOOVR (1 << 6)
	79
bc24a225	80	static void lm_kbd_irq_update(LM823KbdState *s)
1d4e547b AZ	81	{
	82	qemu_set_irq(s->nirq, !s->status);
	83	}
	84
bc24a225	85	static void lm_kbd_gpio_update(LM823KbdState *s)
1d4e547b AZ	86	{
	87	}
	88
bc24a225	89	static void lm_kbd_reset(LM823KbdState *s)
1d4e547b AZ	90	{
	91	s->config = 0x80;
	92	s->status = INT_NOINIT;
	93	s->acttime = 125;
	94	s->kbd.dbnctime = 3;
	95	s->kbd.size = 0x33;
	96	s->clock = 0x08;
	97
	98	lm_kbd_irq_update(s);
	99	lm_kbd_gpio_update(s);
	100	}
	101
bc24a225	102	static void lm_kbd_error(LM823KbdState *s, int err)
1d4e547b AZ	103	{
	104	s->error \|= err;
	105	s->status \|= INT_ERROR;
	106	lm_kbd_irq_update(s);
	107	}
	108
bc24a225	109	static void lm_kbd_pwm_tick(LM823KbdState *s, int line)
1d4e547b AZ	110	{
	111	}
	112
bc24a225	113	static void lm_kbd_pwm_start(LM823KbdState *s, int line)
1d4e547b AZ	114	{
	115	lm_kbd_pwm_tick(s, line);
	116	}
	117
	118	static void lm_kbd_pwm0_tick(void *opaque)
	119	{
	120	lm_kbd_pwm_tick(opaque, 0);
	121	}
	122	static void lm_kbd_pwm1_tick(void *opaque)
	123	{
	124	lm_kbd_pwm_tick(opaque, 1);
	125	}
	126	static void lm_kbd_pwm2_tick(void *opaque)
	127	{
	128	lm_kbd_pwm_tick(opaque, 2);
	129	}
	130
	131	enum {
	132	LM832x_CMD_READ_ID = 0x80, /* Read chip ID. */
	133	LM832x_CMD_WRITE_CFG = 0x81, /* Set configuration item. */
	134	LM832x_CMD_READ_INT = 0x82, /* Get interrupt status. */
	135	LM832x_CMD_RESET = 0x83, /* Reset, same as external one */
	136	LM823x_CMD_WRITE_PULL_DOWN = 0x84, /* Select GPIO pull-up/down. */
	137	LM832x_CMD_WRITE_PORT_SEL = 0x85, /* Select GPIO in/out. */
	138	LM832x_CMD_WRITE_PORT_STATE = 0x86, /* Set GPIO pull-up/down. */
	139	LM832x_CMD_READ_PORT_SEL = 0x87, /* Get GPIO in/out. */
	140	LM832x_CMD_READ_PORT_STATE = 0x88, /* Get GPIO pull-up/down. */
	141	LM832x_CMD_READ_FIFO = 0x89, /* Read byte from FIFO. */
	142	LM832x_CMD_RPT_READ_FIFO = 0x8a, /* Read FIFO (no increment). */
	143	LM832x_CMD_SET_ACTIVE = 0x8b, /* Set active time. */
	144	LM832x_CMD_READ_ERROR = 0x8c, /* Get error status. */
	145	LM832x_CMD_READ_ROTATOR = 0x8e, /* Read rotator status. */
	146	LM832x_CMD_SET_DEBOUNCE = 0x8f, /* Set debouncing time. */
	147	LM832x_CMD_SET_KEY_SIZE = 0x90, /* Set keypad size. */
	148	LM832x_CMD_READ_KEY_SIZE = 0x91, /* Get keypad size. */
	149	LM832x_CMD_READ_CFG = 0x92, /* Get configuration item. */
	150	LM832x_CMD_WRITE_CLOCK = 0x93, /* Set clock config. */
	151	LM832x_CMD_READ_CLOCK = 0x94, /* Get clock config. */
	152	LM832x_CMD_PWM_WRITE = 0x95, /* Write PWM script. */
	153	LM832x_CMD_PWM_START = 0x96, /* Start PWM engine. */
	154	LM832x_CMD_PWM_STOP = 0x97, /* Stop PWM engine. */
e69f0602 JQ	155	LM832x_GENERAL_ERROR = 0xff, /* There was one error.
	156	Previously was represented by -1
	157	This is not a command */
1d4e547b AZ	158	};
	159
	160	#define LM832x_MAX_KPX 8
	161	#define LM832x_MAX_KPY 12
	162
bc24a225	163	static uint8_t lm_kbd_read(LM823KbdState *s, int reg, int byte)
1d4e547b AZ	164	{
	165	int ret;
	166
	167	switch (reg) {
	168	case LM832x_CMD_READ_ID:
	169	ret = 0x0400;
	170	break;
	171
	172	case LM832x_CMD_READ_INT:
	173	ret = s->status;
	174	if (!(s->status & INT_NOINIT)) {
	175	s->status = 0;
	176	lm_kbd_irq_update(s);
	177	}
	178	break;
	179
	180	case LM832x_CMD_READ_PORT_SEL:
	181	ret = s->gpio.dir;
	182	break;
	183	case LM832x_CMD_READ_PORT_STATE:
	184	ret = s->gpio.mask;
	185	break;
	186
	187	case LM832x_CMD_READ_FIFO:
	188	if (s->kbd.len <= 1)
	189	return 0x00;
	190
	191	/* Example response from the two commands after a INT_KEYPAD
	192	* interrupt caused by the key 0x3c being pressed:
	193	* RPT_READ_FIFO: 55 bc 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
	194	* READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
	195	* RPT_READ_FIFO: bc 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9 01
	196	*
	197	* 55 is the code of the key release event serviced in the previous
	198	* interrupt handling.
	199	*
	200	* TODO: find out whether the FIFO is advanced a single character
	201	* before reading every byte or the whole size of the FIFO at the
	202	* last LM832x_CMD_READ_FIFO. This affects LM832x_CMD_RPT_READ_FIFO
	203	* output in cases where there are more than one event in the FIFO.
	204	* Assume 0xbc and 0x3c events are in the FIFO:
	205	* RPT_READ_FIFO: 55 bc 3c 00 4e ff 0a 50 08 00 29 d9 08 01 c9
	206	* READ_FIFO: bc 3c 00 00 4e ff 0a 50 08 00 29 d9 08 01 c9
	207	* Does RPT_READ_FIFO now return 0xbc and 0x3c or only 0x3c?
	208	*/
	209	s->kbd.start ++;
	210	s->kbd.start &= sizeof(s->kbd.fifo) - 1;
	211	s->kbd.len --;
	212
	213	return s->kbd.fifo[s->kbd.start];
	214	case LM832x_CMD_RPT_READ_FIFO:
	215	if (byte >= s->kbd.len)
	216	return 0x00;
	217
	218	return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)];
	219
	220	case LM832x_CMD_READ_ERROR:
	221	return s->error;
	222
	223	case LM832x_CMD_READ_ROTATOR:
	224	return 0;
	225
	226	case LM832x_CMD_READ_KEY_SIZE:
	227	return s->kbd.size;
228
229	case LM832x_CMD_READ_CFG:
230	return s->config & 0xf;
231
232	case LM832x_CMD_READ_CLOCK:
233	return (s->clock & 0xfc) \| 2;
234
235	default:
236	lm_kbd_error(s, ERR_CMDUNK);
237	fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
238	return 0x00;
239	}
240
241	return ret >> (byte << 3);
242	}
243
bc24a225	244	static void lm_kbd_write(LM823KbdState *s, int reg, int byte, uint8_t value)
1d4e547b AZ	245	{
	246	switch (reg) {
	247	case LM832x_CMD_WRITE_CFG:
	248	s->config = value;
	249	/* This must be done whenever s->mux.in is updated (never). */
	250	if ((s->config >> 1) & 1) /* MUX1EN */
	251	qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]);
	252	if ((s->config >> 3) & 1) /* MUX2EN */
	253	qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]);
	254	/* TODO: check that this is issued only following the chip reset
	255	* and not in the middle of operation and that it is followed by
	256	* the GPIO ports re-resablishing through WRITE_PORT_SEL and
	257	* WRITE_PORT_STATE (using a timer perhaps) and otherwise output
	258	* warnings. */
	259	s->status = 0;
	260	lm_kbd_irq_update(s);
	261	s->kbd.len = 0;
	262	s->kbd.start = 0;
e69f0602	263	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	264	break;
	265
	266	case LM832x_CMD_RESET:
	267	if (value == 0xaa)
	268	lm_kbd_reset(s);
	269	else
	270	lm_kbd_error(s, ERR_BADPAR);
e69f0602	271	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	272	break;
	273
	274	case LM823x_CMD_WRITE_PULL_DOWN:
	275	if (!byte)
	276	s->gpio.pull = value;
	277	else {
	278	s->gpio.pull \|= value << 8;
	279	lm_kbd_gpio_update(s);
e69f0602	280	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	281	}
	282	break;
	283	case LM832x_CMD_WRITE_PORT_SEL:
	284	if (!byte)
	285	s->gpio.dir = value;
	286	else {
	287	s->gpio.dir \|= value << 8;
	288	lm_kbd_gpio_update(s);
e69f0602	289	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	290	}
	291	break;
	292	case LM832x_CMD_WRITE_PORT_STATE:
	293	if (!byte)
	294	s->gpio.mask = value;
	295	else {
	296	s->gpio.mask \|= value << 8;
	297	lm_kbd_gpio_update(s);
e69f0602	298	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	299	}
	300	break;
	301
	302	case LM832x_CMD_SET_ACTIVE:
	303	s->acttime = value;
e69f0602	304	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	305	break;
	306
	307	case LM832x_CMD_SET_DEBOUNCE:
	308	s->kbd.dbnctime = value;
e69f0602	309	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	310	if (!value)
	311	lm_kbd_error(s, ERR_BADPAR);
	312	break;
	313
	314	case LM832x_CMD_SET_KEY_SIZE:
	315	s->kbd.size = value;
e69f0602	316	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	317	if (
	318	(value & 0xf) < 3 \|\| (value & 0xf) > LM832x_MAX_KPY \|\|
	319	(value >> 4) < 3 \|\| (value >> 4) > LM832x_MAX_KPX)
	320	lm_kbd_error(s, ERR_BADPAR);
	321	break;
	322
	323	case LM832x_CMD_WRITE_CLOCK:
	324	s->clock = value;
e69f0602	325	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	326	if ((value & 3) && (value & 3) != 3) {
	327	lm_kbd_error(s, ERR_BADPAR);
	328	fprintf(stderr, "%s: invalid clock setting in RCPWM\n",
	329	__FUNCTION__);
	330	}
	331	/* TODO: Validate that the command is only issued once */
	332	break;
	333
	334	case LM832x_CMD_PWM_WRITE:
	335	if (byte == 0) {
	336	if (!(value & 3) \|\| (value >> 2) > 59) {
	337	lm_kbd_error(s, ERR_BADPAR);
e69f0602	338	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	339	break;
	340	}
	341
	342	s->pwm.faddr = value;
	343	s->pwm.file[s->pwm.faddr] = 0;
	344	} else if (byte == 1) {
	345	s->pwm.file[s->pwm.faddr] \|= value << 8;
	346	} else if (byte == 2) {
	347	s->pwm.file[s->pwm.faddr] \|= value << 0;
e69f0602	348	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	349	}
	350	break;
	351	case LM832x_CMD_PWM_START:
e69f0602	352	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	353	if (!(value & 3) \|\| (value >> 2) > 59) {
	354	lm_kbd_error(s, ERR_BADPAR);
	355	break;
	356	}
	357
	358	s->pwm.addr[(value & 3) - 1] = value >> 2;
	359	lm_kbd_pwm_start(s, (value & 3) - 1);
	360	break;
	361	case LM832x_CMD_PWM_STOP:
e69f0602	362	s->reg = LM832x_GENERAL_ERROR;
1d4e547b AZ	363	if (!(value & 3)) {
	364	lm_kbd_error(s, ERR_BADPAR);
	365	break;
	366	}
	367
	368	qemu_del_timer(s->pwm.tm[(value & 3) - 1]);
	369	break;
	370
e69f0602	371	case LM832x_GENERAL_ERROR:
1d4e547b AZ	372	lm_kbd_error(s, ERR_BADPAR);
	373	break;
	374	default:
	375	lm_kbd_error(s, ERR_CMDUNK);
	376	fprintf(stderr, "%s: unknown command %02x\n", __FUNCTION__, reg);
	377	break;
	378	}
	379	}
	380
9e07bdf8	381	static void lm_i2c_event(I2CSlave *i2c, enum i2c_event event)
1d4e547b	382	{
2d9401aa	383	LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
1d4e547b AZ	384
	385	switch (event) {
	386	case I2C_START_RECV:
	387	case I2C_START_SEND:
	388	s->i2c_cycle = 0;
	389	s->i2c_dir = (event == I2C_START_SEND);
	390	break;
	391
	392	default:
	393	break;
	394	}
	395	}
	396
9e07bdf8	397	static int lm_i2c_rx(I2CSlave *i2c)
1d4e547b	398	{
2d9401aa	399	LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
1d4e547b AZ	400
	401	return lm_kbd_read(s, s->reg, s->i2c_cycle ++);
	402	}
	403
9e07bdf8	404	static int lm_i2c_tx(I2CSlave *i2c, uint8_t data)
1d4e547b	405	{
bc24a225	406	LM823KbdState s = (LM823KbdState ) i2c;
1d4e547b AZ	407
	408	if (!s->i2c_cycle)
	409	s->reg = data;
	410	else
	411	lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data);
	412	s->i2c_cycle ++;
	413
	414	return 0;
	415	}
	416
aa1e3b28	417	static int lm_kbd_post_load(void *opaque, int version_id)
1d4e547b	418	{
aa1e3b28	419	LM823KbdState *s = opaque;
1d4e547b AZ	420
	421	lm_kbd_irq_update(s);
	422	lm_kbd_gpio_update(s);
	423
	424	return 0;
	425	}
	426
aa1e3b28 JQ	427	static const VMStateDescription vmstate_lm_kbd = {
	428	.name = "LM8323",
	429	.version_id = 0,
	430	.minimum_version_id = 0,
	431	.minimum_version_id_old = 0,
	432	.post_load = lm_kbd_post_load,
	433	.fields = (VMStateField []) {
	434	VMSTATE_I2C_SLAVE(i2c, LM823KbdState),
	435	VMSTATE_UINT8(i2c_dir, LM823KbdState),
	436	VMSTATE_UINT8(i2c_cycle, LM823KbdState),
	437	VMSTATE_UINT8(reg, LM823KbdState),
	438	VMSTATE_UINT8(config, LM823KbdState),
	439	VMSTATE_UINT8(status, LM823KbdState),
	440	VMSTATE_UINT8(acttime, LM823KbdState),
	441	VMSTATE_UINT8(error, LM823KbdState),
	442	VMSTATE_UINT8(clock, LM823KbdState),
	443	VMSTATE_UINT16(gpio.pull, LM823KbdState),
	444	VMSTATE_UINT16(gpio.mask, LM823KbdState),
	445	VMSTATE_UINT16(gpio.dir, LM823KbdState),
	446	VMSTATE_UINT16(gpio.level, LM823KbdState),
	447	VMSTATE_UINT8(kbd.dbnctime, LM823KbdState),
	448	VMSTATE_UINT8(kbd.size, LM823KbdState),
	449	VMSTATE_UINT8(kbd.start, LM823KbdState),
	450	VMSTATE_UINT8(kbd.len, LM823KbdState),
	451	VMSTATE_BUFFER(kbd.fifo, LM823KbdState),
	452	VMSTATE_UINT16_ARRAY(pwm.file, LM823KbdState, 256),
	453	VMSTATE_UINT8(pwm.faddr, LM823KbdState),
	454	VMSTATE_BUFFER(pwm.addr, LM823KbdState),
	455	VMSTATE_TIMER_ARRAY(pwm.tm, LM823KbdState, 3),
	456	VMSTATE_END_OF_LIST()
	457	}
	458	};
	459
	460
9e07bdf8	461	static int lm8323_init(I2CSlave *i2c)
1d4e547b	462	{
2d9401aa	463	LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
1d4e547b	464
1d4e547b	465	s->model = 0x8323;
74475455 PB	466	s->pwm.tm[0] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm0_tick, s);
	467	s->pwm.tm[1] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm1_tick, s);
	468	s->pwm.tm[2] = qemu_new_timer_ns(vm_clock, lm_kbd_pwm2_tick, s);
2d9401aa	469	qdev_init_gpio_out(&i2c->qdev, &s->nirq, 1);
1d4e547b AZ	470
	471	lm_kbd_reset(s);
	472
a08d4367	473	qemu_register_reset((void *) lm_kbd_reset, s);
81a322d4	474	return 0;
1d4e547b AZ	475	}
1d4e547b AZ	476
c4f05c8c	477	void lm832x_key_event(DeviceState *dev, int key, int state)
1d4e547b	478	{
8aae84a1	479	LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, I2C_SLAVE(dev));
1d4e547b AZ	480
	481	if ((s->status & INT_ERROR) && (s->error & ERR_FIFOOVR))
	482	return;
	483
7442511c BS	484	if (s->kbd.len >= sizeof(s->kbd.fifo)) {
	485	lm_kbd_error(s, ERR_FIFOOVR);
	486	return;
	487	}
1d4e547b AZ	488
	489	s->kbd.fifo[(s->kbd.start + s->kbd.len ++) & (sizeof(s->kbd.fifo) - 1)] =
	490	key \| (state << 7);
	491
	492	/* We never set ERR_KEYOVR because we support multiple keys fine. */
	493	s->status \|= INT_KEYPAD;
	494	lm_kbd_irq_update(s);
	495	}
2d9401aa	496
b5ea9327 AL	497	static void lm8323_class_init(ObjectClass klass, void data)
b5ea9327 AL	498	{
39bffca2	499	DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327 AL	500	I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
	501
	502	k->init = lm8323_init;
	503	k->event = lm_i2c_event;
	504	k->recv = lm_i2c_rx;
	505	k->send = lm_i2c_tx;
39bffca2	506	dc->vmsd = &vmstate_lm_kbd;
b5ea9327 AL	507	}
b5ea9327 AL	508
8c43a6f0	509	static const TypeInfo lm8323_info = {
39bffca2 AL	510	.name = "lm8323",
	511	.parent = TYPE_I2C_SLAVE,
	512	.instance_size = sizeof(LM823KbdState),
	513	.class_init = lm8323_class_init,
2d9401aa PB	514	};
2d9401aa PB	515
83f7d43a	516	static void lm832x_register_types(void)
2d9401aa	517	{
39bffca2	518	type_register_static(&lm8323_info);
2d9401aa PB	519	}
2d9401aa PB	520
83f7d43a	521	type_init(lm832x_register_types)