projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 34d97308 TH |
1 | /* |
| 2 | * QEMU USB OHCI Emulation | |
| 3 | * Copyright (c) 2004 Gianni Tedesco | |
| 4 | * Copyright (c) 2006 CodeSourcery | |
| 5 | * Copyright (c) 2006 Openedhand Ltd. | |
| 6 | * | |
| 7 | * This library is free software; you can redistribute it and/or | |
| 8 | * modify it under the terms of the GNU Lesser General Public | |
| 9 | * License as published by the Free Software Foundation; either | |
| 10 | * version 2.1 of the License, or (at your option) any later version. | |
| 11 | * | |
| 12 | * This library is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 15 | * Lesser General Public License for more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU Lesser General Public | |
| 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
| 19 | */ | |
| 20 | ||
| 21 | #ifndef HCD_OHCI_H | |
| 22 | #define HCD_OHCI_H | |
| 23 | ||
| 24 | #include "sysemu/dma.h" | |
| 25 | ||
| 26 | /* Number of Downstream Ports on the root hub: */ | |
| 27 | #define OHCI_MAX_PORTS 15 | |
| 28 | ||
| 29 | typedef struct OHCIPort { | |
| 30 | USBPort port; | |
| 31 | uint32_t ctrl; | |
| 32 | } OHCIPort; | |
| 33 | ||
| 34 | typedef struct OHCIState { | |
| 35 | USBBus bus; | |
| 36 | qemu_irq irq; | |
| 37 | MemoryRegion mem; | |
| 38 | AddressSpace *as; | |
| 39 | uint32_t num_ports; | |
| 40 | const char *name; | |
| 41 | ||
| 42 | QEMUTimer *eof_timer; | |
| 43 | int64_t sof_time; | |
| 44 | ||
| 45 | /* OHCI state */ | |
| 46 | /* Control partition */ | |
| 47 | uint32_t ctl, status; | |
| 48 | uint32_t intr_status; | |
| 49 | uint32_t intr; | |
| 50 | ||
| 51 | /* memory pointer partition */ | |
| 52 | uint32_t hcca; | |
| 53 | uint32_t ctrl_head, ctrl_cur; | |
| 54 | uint32_t bulk_head, bulk_cur; | |
| 55 | uint32_t per_cur; | |
| 56 | uint32_t done; | |
| 57 | int32_t done_count; | |
| 58 | ||
| 59 | /* Frame counter partition */ | |
| 60 | uint16_t fsmps; | |
| 61 | uint8_t fit; | |
| 62 | uint16_t fi; | |
| 63 | uint8_t frt; | |
| 64 | uint16_t frame_number; | |
| 65 | uint16_t padding; | |
| 66 | uint32_t pstart; | |
| 67 | uint32_t lst; | |
| 68 | ||
| 69 | /* Root Hub partition */ | |
| 70 | uint32_t rhdesc_a, rhdesc_b; | |
| 71 | uint32_t rhstatus; | |
| 72 | OHCIPort rhport[OHCI_MAX_PORTS]; | |
| 73 | ||
| 74 | /* PXA27x Non-OHCI events */ | |
| 75 | uint32_t hstatus; | |
| 76 | uint32_t hmask; | |
| 77 | uint32_t hreset; | |
| 78 | uint32_t htest; | |
| 79 | ||
| 80 | /* SM501 local memory offset */ | |
| 81 | dma_addr_t localmem_base; | |
| 82 | ||
| 83 | /* Active packets. */ | |
| 84 | uint32_t old_ctl; | |
| 85 | USBPacket usb_packet; | |
| 86 | uint8_t usb_buf[8192]; | |
| 87 | uint32_t async_td; | |
| 88 | bool async_complete; | |
| 89 | ||
| 90 | void (*ohci_die)(struct OHCIState *ohci); | |
| 91 | } OHCIState; | |
| 92 | ||
| 93 | extern const VMStateDescription vmstate_ohci_state; | |
| 94 | ||
| 95 | void usb_ohci_init(OHCIState *ohci, DeviceState *dev, uint32_t num_ports, | |
| 96 | dma_addr_t localmem_base, char *masterbus, | |
| 97 | uint32_t firstport, AddressSpace *as, | |
| 98 | void (*ohci_die_fn)(struct OHCIState *), Error **errp); | |
| 99 | void ohci_bus_stop(OHCIState *ohci); | |
| 100 | void ohci_stop_endpoints(OHCIState *ohci); | |
| 101 | void ohci_hard_reset(OHCIState *ohci); | |
| 102 | void ohci_sysbus_die(struct OHCIState *ohci); | |
| 103 | ||
| 104 | #endif |