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tcg/i386: optimize and $0xff(ff), reg
[qemu.git] / tcg / i386 / tcg-target.c
CommitLineData
c896fe29
FB		 1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
d4a9eb1f
BS		 24
25#ifndef NDEBUG
26static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
c896fe29
FB		 27 "%eax",
28 "%ecx",
29 "%edx",
30 "%ebx",
31 "%esp",
32 "%ebp",
33 "%esi",
34 "%edi",
35};
d4a9eb1f 36#endif
c896fe29 37
d4a9eb1f 38static const int tcg_target_reg_alloc_order[] = {
c896fe29
FB		 39 TCG_REG_EAX,
40 TCG_REG_EDX,
41 TCG_REG_ECX,
42 TCG_REG_EBX,
43 TCG_REG_ESI,
44 TCG_REG_EDI,
45 TCG_REG_EBP,
c896fe29
FB		 46};
47
d4a9eb1f
BS		 48static const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX };
49static const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX };
c896fe29 50
b03cce8e
FB		 51static uint8_t *tb_ret_addr;
52
c896fe29 53static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 54 tcg_target_long value, tcg_target_long addend)
c896fe29 55{
f54b3f92 56 value += addend;
c896fe29
FB		 57 switch(type) {
58 case R_386_32:
59 *(uint32_t *)code_ptr = value;
60 break;
61 case R_386_PC32:
62 *(uint32_t *)code_ptr = value - (long)code_ptr;
63 break;
64 default:
65 tcg_abort();
66 }
67}
68
69/* maximum number of register used for input function arguments */
70static inline int tcg_target_get_call_iarg_regs_count(int flags)
71{
72 flags &= TCG_CALL_TYPE_MASK;
73 switch(flags) {
74 case TCG_CALL_TYPE_STD:
75 return 0;
76 case TCG_CALL_TYPE_REGPARM_1:
77 case TCG_CALL_TYPE_REGPARM_2:
78 case TCG_CALL_TYPE_REGPARM:
79 return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
80 default:
81 tcg_abort();
82 }
83}
84
85/* parse target specific constraints */
d4a9eb1f 86static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
c896fe29
FB		 87{
88 const char *ct_str;
89
90 ct_str = *pct_str;
91 switch(ct_str[0]) {
92 case 'a':
93 ct->ct |= TCG_CT_REG;
94 tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX);
95 break;
96 case 'b':
97 ct->ct |= TCG_CT_REG;
98 tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX);
99 break;
100 case 'c':
101 ct->ct |= TCG_CT_REG;
102 tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX);
103 break;
104 case 'd':
105 ct->ct |= TCG_CT_REG;
106 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX);
107 break;
108 case 'S':
109 ct->ct |= TCG_CT_REG;
110 tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI);
111 break;
112 case 'D':
113 ct->ct |= TCG_CT_REG;
114 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI);
115 break;
116 case 'q':
117 ct->ct |= TCG_CT_REG;
118 tcg_regset_set32(ct->u.regs, 0, 0xf);
119 break;
120 case 'r':
121 ct->ct |= TCG_CT_REG;
122 tcg_regset_set32(ct->u.regs, 0, 0xff);
123 break;
124
125 /* qemu_ld/st address constraint */
126 case 'L':
127 ct->ct |= TCG_CT_REG;
128 tcg_regset_set32(ct->u.regs, 0, 0xff);
129 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX);
130 tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX);
131 break;
132 default:
133 return -1;
134 }
135 ct_str++;
136 *pct_str = ct_str;
137 return 0;
138}
139
140/* test if a constant matches the constraint */
141static inline int tcg_target_const_match(tcg_target_long val,
142 const TCGArgConstraint *arg_ct)
143{
144 int ct;
145 ct = arg_ct->ct;
146 if (ct & TCG_CT_CONST)
147 return 1;
148 else
149 return 0;
150}
151
152#define ARITH_ADD 0
153#define ARITH_OR 1
154#define ARITH_ADC 2
155#define ARITH_SBB 3
156#define ARITH_AND 4
157#define ARITH_SUB 5
158#define ARITH_XOR 6
159#define ARITH_CMP 7
160
9619376c
AJ		 161#define SHIFT_ROL 0
162#define SHIFT_ROR 1
c896fe29
FB		 163#define SHIFT_SHL 4
164#define SHIFT_SHR 5
165#define SHIFT_SAR 7
166
167#define JCC_JMP (-1)
168#define JCC_JO 0x0
169#define JCC_JNO 0x1
170#define JCC_JB 0x2
171#define JCC_JAE 0x3
172#define JCC_JE 0x4
173#define JCC_JNE 0x5
174#define JCC_JBE 0x6
175#define JCC_JA 0x7
176#define JCC_JS 0x8
177#define JCC_JNS 0x9
178#define JCC_JP 0xa
179#define JCC_JNP 0xb
180#define JCC_JL 0xc
181#define JCC_JGE 0xd
182#define JCC_JLE 0xe
183#define JCC_JG 0xf
184
185#define P_EXT 0x100 /* 0x0f opcode prefix */
186
187static const uint8_t tcg_cond_to_jcc[10] = {
188 [TCG_COND_EQ] = JCC_JE,
189 [TCG_COND_NE] = JCC_JNE,
190 [TCG_COND_LT] = JCC_JL,
191 [TCG_COND_GE] = JCC_JGE,
192 [TCG_COND_LE] = JCC_JLE,
193 [TCG_COND_GT] = JCC_JG,
194 [TCG_COND_LTU] = JCC_JB,
195 [TCG_COND_GEU] = JCC_JAE,
196 [TCG_COND_LEU] = JCC_JBE,
197 [TCG_COND_GTU] = JCC_JA,
198};
199
200static inline void tcg_out_opc(TCGContext *s, int opc)
201{
202 if (opc & P_EXT)
203 tcg_out8(s, 0x0f);
204 tcg_out8(s, opc);
205}
206
207static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
208{
209 tcg_out_opc(s, opc);
210 tcg_out8(s, 0xc0 | (r << 3) | rm);
211}
212
213/* rm == -1 means no register index */
214static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
215 int32_t offset)
216{
217 tcg_out_opc(s, opc);
218 if (rm == -1) {
219 tcg_out8(s, 0x05 | (r << 3));
220 tcg_out32(s, offset);
221 } else if (offset == 0 && rm != TCG_REG_EBP) {
222 if (rm == TCG_REG_ESP) {
223 tcg_out8(s, 0x04 | (r << 3));
224 tcg_out8(s, 0x24);
225 } else {
226 tcg_out8(s, 0x00 | (r << 3) | rm);
227 }
228 } else if ((int8_t)offset == offset) {
229 if (rm == TCG_REG_ESP) {
230 tcg_out8(s, 0x44 | (r << 3));
231 tcg_out8(s, 0x24);
232 } else {
233 tcg_out8(s, 0x40 | (r << 3) | rm);
234 }
235 tcg_out8(s, offset);
236 } else {
237 if (rm == TCG_REG_ESP) {
238 tcg_out8(s, 0x84 | (r << 3));
239 tcg_out8(s, 0x24);
240 } else {
241 tcg_out8(s, 0x80 | (r << 3) | rm);
242 }
243 tcg_out32(s, offset);
244 }
245}
246
247static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
248{
249 if (arg != ret)
250 tcg_out_modrm(s, 0x8b, ret, arg);
251}
252
253static inline void tcg_out_movi(TCGContext *s, TCGType type,
254 int ret, int32_t arg)
255{
256 if (arg == 0) {
257 /* xor r0,r0 */
258 tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret);
259 } else {
260 tcg_out8(s, 0xb8 + ret);
261 tcg_out32(s, arg);
262 }
263}
264
e4d5434c
BS		 265static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
266 int arg1, tcg_target_long arg2)
c896fe29
FB		 267{
268 /* movl */
269 tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2);
270}
271
e4d5434c
BS		 272static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
273 int arg1, tcg_target_long arg2)
c896fe29
FB		 274{
275 /* movl */
276 tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
277}
278
279static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
280{
281 if (val == (int8_t)val) {
282 tcg_out_modrm(s, 0x83, c, r0);
283 tcg_out8(s, val);
b70650cb
AJ		 284 } else if (c == ARITH_AND && val == 0xffu && r0 < 4) {
285 /* movzbl */
286 tcg_out_modrm(s, 0xb6 | P_EXT, r0, r0);
287 } else if (c == ARITH_AND && val == 0xffffu) {
288 /* movzwl */
289 tcg_out_modrm(s, 0xb7 | P_EXT, r0, r0);
c896fe29
FB		 290 } else {
291 tcg_out_modrm(s, 0x81, c, r0);
292 tcg_out32(s, val);
293 }
294}
295
3e9a474e 296static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
c896fe29
FB		 297{
298 if (val != 0)
299 tgen_arithi(s, ARITH_ADD, reg, val);
300}
301
302static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
303{
304 int32_t val, val1;
305 TCGLabel *l = &s->labels[label_index];
306
307 if (l->has_value) {
308 val = l->u.value - (tcg_target_long)s->code_ptr;
309 val1 = val - 2;
310 if ((int8_t)val1 == val1) {
311 if (opc == -1)
312 tcg_out8(s, 0xeb);
313 else
314 tcg_out8(s, 0x70 + opc);
315 tcg_out8(s, val1);
316 } else {
317 if (opc == -1) {
318 tcg_out8(s, 0xe9);
319 tcg_out32(s, val - 5);
320 } else {
321 tcg_out8(s, 0x0f);
322 tcg_out8(s, 0x80 + opc);
323 tcg_out32(s, val - 6);
324 }
325 }
326 } else {
327 if (opc == -1) {
328 tcg_out8(s, 0xe9);
329 } else {
330 tcg_out8(s, 0x0f);
331 tcg_out8(s, 0x80 + opc);
332 }
333 tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
623e265c 334 s->code_ptr += 4;
c896fe29
FB		 335 }
336}
337
338static void tcg_out_brcond(TCGContext *s, int cond,
339 TCGArg arg1, TCGArg arg2, int const_arg2,
340 int label_index)
341{
c896fe29
FB		 342 if (const_arg2) {
343 if (arg2 == 0) {
c896fe29
FB		 344 /* test r, r */
345 tcg_out_modrm(s, 0x85, arg1, arg1);
c896fe29 346 } else {
c896fe29 347 tgen_arithi(s, ARITH_CMP, arg1, arg2);
c896fe29
FB		 348 }
349 } else {
bb210e78 350 tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
c896fe29 351 }
affa3264 352 tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
c896fe29
FB		 353}
354
355/* XXX: we implement it at the target level to avoid having to
356 handle cross basic blocks temporaries */
357static void tcg_out_brcond2(TCGContext *s,
358 const TCGArg *args, const int *const_args)
359{
360 int label_next;
361 label_next = gen_new_label();
362 switch(args[4]) {
363 case TCG_COND_EQ:
364 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next);
365 tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]);
366 break;
367 case TCG_COND_NE:
368 tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]);
bb210e78 369 tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]);
c896fe29
FB		 370 break;
371 case TCG_COND_LT:
372 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
affa3264 373 tcg_out_jxx(s, JCC_JNE, label_next);
d643ccca 374 tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
c896fe29
FB		 375 break;
376 case TCG_COND_LE:
377 tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
affa3264 378 tcg_out_jxx(s, JCC_JNE, label_next);
d643ccca 379 tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
c896fe29
FB		 380 break;
381 case TCG_COND_GT:
382 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
affa3264 383 tcg_out_jxx(s, JCC_JNE, label_next);
d643ccca 384 tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
c896fe29
FB		 385 break;
386 case TCG_COND_GE:
387 tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
affa3264 388 tcg_out_jxx(s, JCC_JNE, label_next);
d643ccca 389 tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
c896fe29
FB		 390 break;
391 case TCG_COND_LTU:
392 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
affa3264 393 tcg_out_jxx(s, JCC_JNE, label_next);
c896fe29
FB		 394 tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
395 break;
396 case TCG_COND_LEU:
397 tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
affa3264 398 tcg_out_jxx(s, JCC_JNE, label_next);
c896fe29
FB		 399 tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
400 break;
401 case TCG_COND_GTU:
402 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
affa3264 403 tcg_out_jxx(s, JCC_JNE, label_next);
c896fe29
FB		 404 tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
405 break;
406 case TCG_COND_GEU:
407 tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
affa3264 408 tcg_out_jxx(s, JCC_JNE, label_next);
c896fe29
FB		 409 tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
410 break;
411 default:
412 tcg_abort();
413 }
414 tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
415}
416
417#if defined(CONFIG_SOFTMMU)
79383c9c
BS		 418
419#include "../../softmmu_defs.h"
c896fe29
FB		 420
421static void *qemu_ld_helpers[4] = {
422 __ldb_mmu,
423 __ldw_mmu,
424 __ldl_mmu,
425 __ldq_mmu,
426};
427
428static void *qemu_st_helpers[4] = {
429 __stb_mmu,
430 __stw_mmu,
431 __stl_mmu,
432 __stq_mmu,
433};
434#endif
435
379f6698
PB		 436#ifndef CONFIG_USER_ONLY
437#define GUEST_BASE 0
438#endif
439
c896fe29
FB		 440/* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
441 EAX. It will be useful once fixed registers globals are less
442 common. */
443static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
444 int opc)
445{
446 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
447#if defined(CONFIG_SOFTMMU)
448 uint8_t *label1_ptr, *label2_ptr;
449#endif
450#if TARGET_LONG_BITS == 64
451#if defined(CONFIG_SOFTMMU)
452 uint8_t *label3_ptr;
453#endif
454 int addr_reg2;
455#endif
456
457 data_reg = *args++;
458 if (opc == 3)
459 data_reg2 = *args++;
460 else
461 data_reg2 = 0;
462 addr_reg = *args++;
463#if TARGET_LONG_BITS == 64
464 addr_reg2 = *args++;
465#endif
466 mem_index = *args;
467 s_bits = opc & 3;
468
469 r0 = TCG_REG_EAX;
470 r1 = TCG_REG_EDX;
471
472#if defined(CONFIG_SOFTMMU)
473 tcg_out_mov(s, r1, addr_reg);
474
475 tcg_out_mov(s, r0, addr_reg);
476
477 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
478 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
479
480 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
481 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
482
483 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
484 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
485
486 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
487 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
488 tcg_out8(s, (5 << 3) | r1);
489 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
490
491 /* cmp 0(r1), r0 */
492 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
493
494 tcg_out_mov(s, r0, addr_reg);
495
496#if TARGET_LONG_BITS == 32
497 /* je label1 */
498 tcg_out8(s, 0x70 + JCC_JE);
499 label1_ptr = s->code_ptr;
500 s->code_ptr++;
501#else
502 /* jne label3 */
503 tcg_out8(s, 0x70 + JCC_JNE);
504 label3_ptr = s->code_ptr;
505 s->code_ptr++;
506
507 /* cmp 4(r1), addr_reg2 */
508 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
509
510 /* je label1 */
511 tcg_out8(s, 0x70 + JCC_JE);
512 label1_ptr = s->code_ptr;
513 s->code_ptr++;
514
515 /* label3: */
516 *label3_ptr = s->code_ptr - label3_ptr - 1;
517#endif
518
519 /* XXX: move that code at the end of the TB */
520#if TARGET_LONG_BITS == 32
521 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
522#else
523 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
524 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
525#endif
526 tcg_out8(s, 0xe8);
527 tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] -
528 (tcg_target_long)s->code_ptr - 4);
529
530 switch(opc) {
531 case 0 | 4:
532 /* movsbl */
533 tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX);
534 break;
535 case 1 | 4:
536 /* movswl */
537 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX);
538 break;
539 case 0:
9db3ba4d
AJ		 540 /* movzbl */
541 tcg_out_modrm(s, 0xb6 | P_EXT, data_reg, TCG_REG_EAX);
542 break;
c896fe29 543 case 1:
9db3ba4d
AJ		 544 /* movzwl */
545 tcg_out_modrm(s, 0xb7 | P_EXT, data_reg, TCG_REG_EAX);
546 break;
c896fe29
FB		 547 case 2:
548 default:
549 tcg_out_mov(s, data_reg, TCG_REG_EAX);
550 break;
551 case 3:
552 if (data_reg == TCG_REG_EDX) {
553 tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
554 tcg_out_mov(s, data_reg2, TCG_REG_EAX);
555 } else {
556 tcg_out_mov(s, data_reg, TCG_REG_EAX);
557 tcg_out_mov(s, data_reg2, TCG_REG_EDX);
558 }
559 break;
560 }
561
562 /* jmp label2 */
563 tcg_out8(s, 0xeb);
564 label2_ptr = s->code_ptr;
565 s->code_ptr++;
566
567 /* label1: */
568 *label1_ptr = s->code_ptr - label1_ptr - 1;
569
570 /* add x(r1), r0 */
571 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
572 offsetof(CPUTLBEntry, addr_read));
573#else
574 r0 = addr_reg;
575#endif
576
577#ifdef TARGET_WORDS_BIGENDIAN
578 bswap = 1;
579#else
580 bswap = 0;
581#endif
582 switch(opc) {
583 case 0:
584 /* movzbl */
379f6698 585 tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, GUEST_BASE);
c896fe29
FB		 586 break;
587 case 0 | 4:
588 /* movsbl */
379f6698 589 tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, GUEST_BASE);
c896fe29
FB		 590 break;
591 case 1:
592 /* movzwl */
379f6698 593 tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, GUEST_BASE);
c896fe29
FB		 594 if (bswap) {
595 /* rolw $8, data_reg */
596 tcg_out8(s, 0x66);
597 tcg_out_modrm(s, 0xc1, 0, data_reg);
598 tcg_out8(s, 8);
599 }
600 break;
601 case 1 | 4:
602 /* movswl */
379f6698 603 tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, GUEST_BASE);
c896fe29
FB		 604 if (bswap) {
605 /* rolw $8, data_reg */
606 tcg_out8(s, 0x66);
607 tcg_out_modrm(s, 0xc1, 0, data_reg);
608 tcg_out8(s, 8);
609
610 /* movswl data_reg, data_reg */
611 tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg);
612 }
613 break;
614 case 2:
615 /* movl (r0), data_reg */
379f6698 616 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, GUEST_BASE);
c896fe29
FB		 617 if (bswap) {
618 /* bswap */
619 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
620 }
621 break;
622 case 3:
623 /* XXX: could be nicer */
624 if (r0 == data_reg) {
625 r1 = TCG_REG_EDX;
626 if (r1 == data_reg)
627 r1 = TCG_REG_EAX;
628 tcg_out_mov(s, r1, r0);
629 r0 = r1;
630 }
631 if (!bswap) {
379f6698 632 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, GUEST_BASE);
adea8197 633 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, GUEST_BASE + 4);
c896fe29 634 } else {
379f6698 635 tcg_out_modrm_offset(s, 0x8b, data_reg, r0, GUEST_BASE + 4);
c896fe29
FB		 636 tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
637
379f6698 638 tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, GUEST_BASE);
c896fe29
FB		 639 /* bswap */
640 tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT);
641 }
642 break;
643 default:
644 tcg_abort();
645 }
646
647#if defined(CONFIG_SOFTMMU)
648 /* label2: */
649 *label2_ptr = s->code_ptr - label2_ptr - 1;
650#endif
651}
652
653
654static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
655 int opc)
656{
657 int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
658#if defined(CONFIG_SOFTMMU)
659 uint8_t *label1_ptr, *label2_ptr;
660#endif
661#if TARGET_LONG_BITS == 64
662#if defined(CONFIG_SOFTMMU)
663 uint8_t *label3_ptr;
664#endif
665 int addr_reg2;
666#endif
667
668 data_reg = *args++;
669 if (opc == 3)
670 data_reg2 = *args++;
671 else
672 data_reg2 = 0;
673 addr_reg = *args++;
674#if TARGET_LONG_BITS == 64
675 addr_reg2 = *args++;
676#endif
677 mem_index = *args;
678
679 s_bits = opc;
680
681 r0 = TCG_REG_EAX;
682 r1 = TCG_REG_EDX;
683
684#if defined(CONFIG_SOFTMMU)
685 tcg_out_mov(s, r1, addr_reg);
686
687 tcg_out_mov(s, r0, addr_reg);
688
689 tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
690 tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
691
692 tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
693 tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
694
695 tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
696 tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
697
698 tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
699 tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
700 tcg_out8(s, (5 << 3) | r1);
701 tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
702
703 /* cmp 0(r1), r0 */
704 tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
705
706 tcg_out_mov(s, r0, addr_reg);
707
708#if TARGET_LONG_BITS == 32
709 /* je label1 */
710 tcg_out8(s, 0x70 + JCC_JE);
711 label1_ptr = s->code_ptr;
712 s->code_ptr++;
713#else
714 /* jne label3 */
715 tcg_out8(s, 0x70 + JCC_JNE);
716 label3_ptr = s->code_ptr;
717 s->code_ptr++;
718
719 /* cmp 4(r1), addr_reg2 */
720 tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
721
722 /* je label1 */
723 tcg_out8(s, 0x70 + JCC_JE);
724 label1_ptr = s->code_ptr;
725 s->code_ptr++;
726
727 /* label3: */
728 *label3_ptr = s->code_ptr - label3_ptr - 1;
729#endif
730
731 /* XXX: move that code at the end of the TB */
732#if TARGET_LONG_BITS == 32
733 if (opc == 3) {
734 tcg_out_mov(s, TCG_REG_EDX, data_reg);
735 tcg_out_mov(s, TCG_REG_ECX, data_reg2);
736 tcg_out8(s, 0x6a); /* push Ib */
737 tcg_out8(s, mem_index);
738 tcg_out8(s, 0xe8);
739 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
740 (tcg_target_long)s->code_ptr - 4);
741 tcg_out_addi(s, TCG_REG_ESP, 4);
742 } else {
743 switch(opc) {
744 case 0:
745 /* movzbl */
746 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg);
747 break;
748 case 1:
749 /* movzwl */
750 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
751 break;
752 case 2:
753 tcg_out_mov(s, TCG_REG_EDX, data_reg);
754 break;
755 }
756 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
757 tcg_out8(s, 0xe8);
758 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
759 (tcg_target_long)s->code_ptr - 4);
760 }
761#else
762 if (opc == 3) {
763 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
764 tcg_out8(s, 0x6a); /* push Ib */
765 tcg_out8(s, mem_index);
766 tcg_out_opc(s, 0x50 + data_reg2); /* push */
767 tcg_out_opc(s, 0x50 + data_reg); /* push */
768 tcg_out8(s, 0xe8);
769 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
770 (tcg_target_long)s->code_ptr - 4);
771 tcg_out_addi(s, TCG_REG_ESP, 12);
772 } else {
773 tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
774 switch(opc) {
775 case 0:
776 /* movzbl */
777 tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg);
778 break;
779 case 1:
780 /* movzwl */
781 tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
782 break;
783 case 2:
784 tcg_out_mov(s, TCG_REG_ECX, data_reg);
785 break;
786 }
787 tcg_out8(s, 0x6a); /* push Ib */
788 tcg_out8(s, mem_index);
789 tcg_out8(s, 0xe8);
790 tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] -
791 (tcg_target_long)s->code_ptr - 4);
792 tcg_out_addi(s, TCG_REG_ESP, 4);
793 }
794#endif
795
796 /* jmp label2 */
797 tcg_out8(s, 0xeb);
798 label2_ptr = s->code_ptr;
799 s->code_ptr++;
800
801 /* label1: */
802 *label1_ptr = s->code_ptr - label1_ptr - 1;
803
804 /* add x(r1), r0 */
805 tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) -
806 offsetof(CPUTLBEntry, addr_write));
807#else
808 r0 = addr_reg;
809#endif
810
811#ifdef TARGET_WORDS_BIGENDIAN
812 bswap = 1;
813#else
814 bswap = 0;
815#endif
816 switch(opc) {
817 case 0:
818 /* movb */
379f6698 819 tcg_out_modrm_offset(s, 0x88, data_reg, r0, GUEST_BASE);
c896fe29
FB		 820 break;
821 case 1:
822 if (bswap) {
823 tcg_out_mov(s, r1, data_reg);
824 tcg_out8(s, 0x66); /* rolw $8, %ecx */
825 tcg_out_modrm(s, 0xc1, 0, r1);
826 tcg_out8(s, 8);
827 data_reg = r1;
828 }
829 /* movw */
830 tcg_out8(s, 0x66);
379f6698 831 tcg_out_modrm_offset(s, 0x89, data_reg, r0, GUEST_BASE);
c896fe29
FB		 832 break;
833 case 2:
834 if (bswap) {
835 tcg_out_mov(s, r1, data_reg);
836 /* bswap data_reg */
837 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
838 data_reg = r1;
839 }
840 /* movl */
379f6698 841 tcg_out_modrm_offset(s, 0x89, data_reg, r0, GUEST_BASE);
c896fe29
FB		 842 break;
843 case 3:
844 if (bswap) {
845 tcg_out_mov(s, r1, data_reg2);
846 /* bswap data_reg */
847 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
379f6698 848 tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE);
c896fe29
FB		 849 tcg_out_mov(s, r1, data_reg);
850 /* bswap data_reg */
851 tcg_out_opc(s, (0xc8 + r1) | P_EXT);
379f6698 852 tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE + 4);
c896fe29 853 } else {
379f6698
PB		 854 tcg_out_modrm_offset(s, 0x89, data_reg, r0, GUEST_BASE);
855 tcg_out_modrm_offset(s, 0x89, data_reg2, r0, GUEST_BASE + 4);
c896fe29
FB		 856 }
857 break;
858 default:
859 tcg_abort();
860 }
861
862#if defined(CONFIG_SOFTMMU)
863 /* label2: */
864 *label2_ptr = s->code_ptr - label2_ptr - 1;
865#endif
866}
867
868static inline void tcg_out_op(TCGContext *s, int opc,
869 const TCGArg *args, const int *const_args)
870{
871 int c;
872
873 switch(opc) {
874 case INDEX_op_exit_tb:
875 tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]);
b03cce8e
FB		 876 tcg_out8(s, 0xe9); /* jmp tb_ret_addr */
877 tcg_out32(s, tb_ret_addr - s->code_ptr - 4);
c896fe29
FB		 878 break;
879 case INDEX_op_goto_tb:
880 if (s->tb_jmp_offset) {
881 /* direct jump method */
882 tcg_out8(s, 0xe9); /* jmp im */
883 s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
884 tcg_out32(s, 0);
885 } else {
886 /* indirect jump method */
887 /* jmp Ev */
888 tcg_out_modrm_offset(s, 0xff, 4, -1,
889 (tcg_target_long)(s->tb_next + args[0]));
890 }
891 s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
892 break;
893 case INDEX_op_call:
894 if (const_args[0]) {
895 tcg_out8(s, 0xe8);
896 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
897 } else {
898 tcg_out_modrm(s, 0xff, 2, args[0]);
899 }
900 break;
901 case INDEX_op_jmp:
902 if (const_args[0]) {
903 tcg_out8(s, 0xe9);
904 tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
905 } else {
906 tcg_out_modrm(s, 0xff, 4, args[0]);
907 }
908 break;
909 case INDEX_op_br:
910 tcg_out_jxx(s, JCC_JMP, args[0]);
911 break;
912 case INDEX_op_movi_i32:
913 tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
914 break;
915 case INDEX_op_ld8u_i32:
916 /* movzbl */
917 tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
918 break;
919 case INDEX_op_ld8s_i32:
920 /* movsbl */
921 tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
922 break;
923 case INDEX_op_ld16u_i32:
924 /* movzwl */
925 tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
926 break;
927 case INDEX_op_ld16s_i32:
928 /* movswl */
929 tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
930 break;
931 case INDEX_op_ld_i32:
932 /* movl */
933 tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
934 break;
935 case INDEX_op_st8_i32:
936 /* movb */
937 tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]);
938 break;
939 case INDEX_op_st16_i32:
940 /* movw */
941 tcg_out8(s, 0x66);
942 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
943 break;
944 case INDEX_op_st_i32:
945 /* movl */
946 tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
947 break;
948 case INDEX_op_sub_i32:
949 c = ARITH_SUB;
950 goto gen_arith;
951 case INDEX_op_and_i32:
952 c = ARITH_AND;
953 goto gen_arith;
954 case INDEX_op_or_i32:
955 c = ARITH_OR;
956 goto gen_arith;
957 case INDEX_op_xor_i32:
958 c = ARITH_XOR;
959 goto gen_arith;
960 case INDEX_op_add_i32:
961 c = ARITH_ADD;
962 gen_arith:
963 if (const_args[2]) {
964 tgen_arithi(s, c, args[0], args[2]);
965 } else {
966 tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
967 }
968 break;
969 case INDEX_op_mul_i32:
970 if (const_args[2]) {
971 int32_t val;
972 val = args[2];
973 if (val == (int8_t)val) {
974 tcg_out_modrm(s, 0x6b, args[0], args[0]);
975 tcg_out8(s, val);
976 } else {
977 tcg_out_modrm(s, 0x69, args[0], args[0]);
978 tcg_out32(s, val);
979 }
980 } else {
981 tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
982 }
983 break;
984 case INDEX_op_mulu2_i32:
985 tcg_out_modrm(s, 0xf7, 4, args[3]);
986 break;
987 case INDEX_op_div2_i32:
988 tcg_out_modrm(s, 0xf7, 7, args[4]);
989 break;
990 case INDEX_op_divu2_i32:
991 tcg_out_modrm(s, 0xf7, 6, args[4]);
992 break;
993 case INDEX_op_shl_i32:
994 c = SHIFT_SHL;
995 gen_shift32:
996 if (const_args[2]) {
997 if (args[2] == 1) {
998 tcg_out_modrm(s, 0xd1, c, args[0]);
999 } else {
1000 tcg_out_modrm(s, 0xc1, c, args[0]);
1001 tcg_out8(s, args[2]);
1002 }
1003 } else {
1004 tcg_out_modrm(s, 0xd3, c, args[0]);
1005 }
1006 break;
1007 case INDEX_op_shr_i32:
1008 c = SHIFT_SHR;
1009 goto gen_shift32;
1010 case INDEX_op_sar_i32:
1011 c = SHIFT_SAR;
1012 goto gen_shift32;
9619376c
AJ		 1013 case INDEX_op_rotl_i32:
1014 c = SHIFT_ROL;
1015 goto gen_shift32;
1016 case INDEX_op_rotr_i32:
1017 c = SHIFT_ROR;
1018 goto gen_shift32;
1019
c896fe29
FB		 1020 case INDEX_op_add2_i32:
1021 if (const_args[4])
1022 tgen_arithi(s, ARITH_ADD, args[0], args[4]);
1023 else
1024 tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
1025 if (const_args[5])
1026 tgen_arithi(s, ARITH_ADC, args[1], args[5]);
1027 else
1028 tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
1029 break;
1030 case INDEX_op_sub2_i32:
1031 if (const_args[4])
1032 tgen_arithi(s, ARITH_SUB, args[0], args[4]);
1033 else
1034 tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
1035 if (const_args[5])
1036 tgen_arithi(s, ARITH_SBB, args[1], args[5]);
1037 else
1038 tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
1039 break;
1040 case INDEX_op_brcond_i32:
1041 tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
1042 break;
1043 case INDEX_op_brcond2_i32:
1044 tcg_out_brcond2(s, args, const_args);
1045 break;
1046
5d40cd63
AJ		 1047 case INDEX_op_bswap16_i32:
1048 tcg_out8(s, 0x66);
1049 tcg_out_modrm(s, 0xc1, SHIFT_ROL, args[0]);
1050 tcg_out8(s, 8);
1051 break;
66896cb8 1052 case INDEX_op_bswap32_i32:
9619376c
AJ		 1053 tcg_out_opc(s, (0xc8 + args[0]) | P_EXT);
1054 break;
1055
1056 case INDEX_op_neg_i32:
1057 tcg_out_modrm(s, 0xf7, 3, args[0]);
1058 break;
1059
1060 case INDEX_op_not_i32:
1061 tcg_out_modrm(s, 0xf7, 2, args[0]);
1062 break;
1063
1064 case INDEX_op_ext8s_i32:
1065 tcg_out_modrm(s, 0xbe | P_EXT, args[0], args[1]);
1066 break;
1067 case INDEX_op_ext16s_i32:
1068 tcg_out_modrm(s, 0xbf | P_EXT, args[0], args[1]);
1069 break;
1070
c896fe29
FB		 1071 case INDEX_op_qemu_ld8u:
1072 tcg_out_qemu_ld(s, args, 0);
1073 break;
1074 case INDEX_op_qemu_ld8s:
1075 tcg_out_qemu_ld(s, args, 0 | 4);
1076 break;
1077 case INDEX_op_qemu_ld16u:
1078 tcg_out_qemu_ld(s, args, 1);
1079 break;
1080 case INDEX_op_qemu_ld16s:
1081 tcg_out_qemu_ld(s, args, 1 | 4);
1082 break;
1083 case INDEX_op_qemu_ld32u:
1084 tcg_out_qemu_ld(s, args, 2);
1085 break;
1086 case INDEX_op_qemu_ld64:
1087 tcg_out_qemu_ld(s, args, 3);
1088 break;
1089
1090 case INDEX_op_qemu_st8:
1091 tcg_out_qemu_st(s, args, 0);
1092 break;
1093 case INDEX_op_qemu_st16:
1094 tcg_out_qemu_st(s, args, 1);
1095 break;
1096 case INDEX_op_qemu_st32:
1097 tcg_out_qemu_st(s, args, 2);
1098 break;
1099 case INDEX_op_qemu_st64:
1100 tcg_out_qemu_st(s, args, 3);
1101 break;
1102
1103 default:
1104 tcg_abort();
1105 }
1106}
1107
1108static const TCGTargetOpDef x86_op_defs[] = {
1109 { INDEX_op_exit_tb, { } },
1110 { INDEX_op_goto_tb, { } },
1111 { INDEX_op_call, { "ri" } },
1112 { INDEX_op_jmp, { "ri" } },
1113 { INDEX_op_br, { } },
1114 { INDEX_op_mov_i32, { "r", "r" } },
1115 { INDEX_op_movi_i32, { "r" } },
1116 { INDEX_op_ld8u_i32, { "r", "r" } },
1117 { INDEX_op_ld8s_i32, { "r", "r" } },
1118 { INDEX_op_ld16u_i32, { "r", "r" } },
1119 { INDEX_op_ld16s_i32, { "r", "r" } },
1120 { INDEX_op_ld_i32, { "r", "r" } },
1121 { INDEX_op_st8_i32, { "q", "r" } },
1122 { INDEX_op_st16_i32, { "r", "r" } },
1123 { INDEX_op_st_i32, { "r", "r" } },
1124
1125 { INDEX_op_add_i32, { "r", "0", "ri" } },
1126 { INDEX_op_sub_i32, { "r", "0", "ri" } },
1127 { INDEX_op_mul_i32, { "r", "0", "ri" } },
1128 { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
1129 { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1130 { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1131 { INDEX_op_and_i32, { "r", "0", "ri" } },
1132 { INDEX_op_or_i32, { "r", "0", "ri" } },
1133 { INDEX_op_xor_i32, { "r", "0", "ri" } },
1134
1135 { INDEX_op_shl_i32, { "r", "0", "ci" } },
1136 { INDEX_op_shr_i32, { "r", "0", "ci" } },
1137 { INDEX_op_sar_i32, { "r", "0", "ci" } },
9619376c
AJ		 1138 { INDEX_op_sar_i32, { "r", "0", "ci" } },
1139 { INDEX_op_rotl_i32, { "r", "0", "ci" } },
1140 { INDEX_op_rotr_i32, { "r", "0", "ci" } },
c896fe29
FB		 1141
1142 { INDEX_op_brcond_i32, { "r", "ri" } },
1143
1144 { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1145 { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1146 { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1147
5d40cd63 1148 { INDEX_op_bswap16_i32, { "r", "0" } },
66896cb8 1149 { INDEX_op_bswap32_i32, { "r", "0" } },
9619376c
AJ		 1150
1151 { INDEX_op_neg_i32, { "r", "0" } },
1152
1153 { INDEX_op_not_i32, { "r", "0" } },
1154
1155 { INDEX_op_ext8s_i32, { "r", "q" } },
1156 { INDEX_op_ext16s_i32, { "r", "r" } },
1157
c896fe29
FB		 1158#if TARGET_LONG_BITS == 32
1159 { INDEX_op_qemu_ld8u, { "r", "L" } },
1160 { INDEX_op_qemu_ld8s, { "r", "L" } },
1161 { INDEX_op_qemu_ld16u, { "r", "L" } },
1162 { INDEX_op_qemu_ld16s, { "r", "L" } },
1163 { INDEX_op_qemu_ld32u, { "r", "L" } },
1164 { INDEX_op_qemu_ld64, { "r", "r", "L" } },
1165
1166 { INDEX_op_qemu_st8, { "cb", "L" } },
1167 { INDEX_op_qemu_st16, { "L", "L" } },
1168 { INDEX_op_qemu_st32, { "L", "L" } },
1169 { INDEX_op_qemu_st64, { "L", "L", "L" } },
1170#else
1171 { INDEX_op_qemu_ld8u, { "r", "L", "L" } },
1172 { INDEX_op_qemu_ld8s, { "r", "L", "L" } },
1173 { INDEX_op_qemu_ld16u, { "r", "L", "L" } },
1174 { INDEX_op_qemu_ld16s, { "r", "L", "L" } },
1175 { INDEX_op_qemu_ld32u, { "r", "L", "L" } },
1176 { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } },
1177
1178 { INDEX_op_qemu_st8, { "cb", "L", "L" } },
1179 { INDEX_op_qemu_st16, { "L", "L", "L" } },
1180 { INDEX_op_qemu_st32, { "L", "L", "L" } },
1181 { INDEX_op_qemu_st64, { "L", "L", "L", "L" } },
1182#endif
1183 { -1 },
1184};
1185
b03cce8e
FB		 1186static int tcg_target_callee_save_regs[] = {
1187 /* TCG_REG_EBP, */ /* currently used for the global env, so no
1188 need to save */
1189 TCG_REG_EBX,
1190 TCG_REG_ESI,
1191 TCG_REG_EDI,
1192};
1193
1194static inline void tcg_out_push(TCGContext *s, int reg)
1195{
1196 tcg_out_opc(s, 0x50 + reg);
1197}
1198
1199static inline void tcg_out_pop(TCGContext *s, int reg)
1200{
1201 tcg_out_opc(s, 0x58 + reg);
1202}
1203
1204/* Generate global QEMU prologue and epilogue code */
1205void tcg_target_qemu_prologue(TCGContext *s)
1206{
1207 int i, frame_size, push_size, stack_addend;
1208
1209 /* TB prologue */
1210 /* save all callee saved registers */
1211 for(i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) {
1212 tcg_out_push(s, tcg_target_callee_save_regs[i]);
1213 }
1214 /* reserve some stack space */
1215 push_size = 4 + ARRAY_SIZE(tcg_target_callee_save_regs) * 4;
1216 frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE;
1217 frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) &
1218 ~(TCG_TARGET_STACK_ALIGN - 1);
1219 stack_addend = frame_size - push_size;
1220 tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
1221
1222 tcg_out_modrm(s, 0xff, 4, TCG_REG_EAX); /* jmp *%eax */
1223
1224 /* TB epilogue */
1225 tb_ret_addr = s->code_ptr;
1226 tcg_out_addi(s, TCG_REG_ESP, stack_addend);
1227 for(i = ARRAY_SIZE(tcg_target_callee_save_regs) - 1; i >= 0; i--) {
1228 tcg_out_pop(s, tcg_target_callee_save_regs[i]);
1229 }
1230 tcg_out8(s, 0xc3); /* ret */
1231}
1232
c896fe29
FB		 1233void tcg_target_init(TCGContext *s)
1234{
1235 /* fail safe */
1236 if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1237 tcg_abort();
1238
1239 tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);
1240 tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1241 (1 << TCG_REG_EAX) |
1242 (1 << TCG_REG_EDX) |
1243 (1 << TCG_REG_ECX));
1244
1245 tcg_regset_clear(s->reserved_regs);
1246 tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
1247
1248 tcg_add_target_add_op_defs(x86_op_defs);
1249}
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