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9ee6e8bb PB |
1 | /* |
2 | * ARM RealView Emulation Baseboard Interrupt Controller | |
3 | * | |
4 | * Copyright (c) 2006-2007 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GPL. |
9ee6e8bb PB |
8 | */ |
9 | ||
fe7e8758 | 10 | #include "sysbus.h" |
9ee6e8bb | 11 | |
9ee6e8bb PB |
12 | #define NCPU 1 |
13 | ||
14 | /* Only a single "CPU" interface is present. */ | |
15 | static inline int | |
16 | gic_get_current_cpu(void) | |
17 | { | |
18 | return 0; | |
19 | } | |
20 | ||
21 | #include "arm_gic.c" | |
22 | ||
fe7e8758 PB |
23 | typedef struct { |
24 | gic_state gic; | |
755c0802 | 25 | MemoryRegion container; |
fe7e8758 PB |
26 | } RealViewGICState; |
27 | ||
755c0802 | 28 | static void realview_gic_map_setup(RealViewGICState *s) |
9ee6e8bb | 29 | { |
755c0802 | 30 | memory_region_init(&s->container, "realview-gic-container", 0x2000); |
c3ffa595 | 31 | memory_region_add_subregion(&s->container, 0, &s->gic.cpuiomem[0]); |
755c0802 | 32 | memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem); |
fe7e8758 PB |
33 | } |
34 | ||
81a322d4 | 35 | static int realview_gic_init(SysBusDevice *dev) |
fe7e8758 PB |
36 | { |
37 | RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev); | |
9ee6e8bb | 38 | |
a32134aa ML |
39 | /* The GICs on the RealView boards have a fixed nonconfigurable |
40 | * number of interrupt lines, so we don't need to expose this as | |
41 | * a qdev property. | |
42 | */ | |
43 | gic_init(&s->gic, 96); | |
755c0802 | 44 | realview_gic_map_setup(s); |
750ecd44 | 45 | sysbus_init_mmio(dev, &s->container); |
81a322d4 | 46 | return 0; |
9ee6e8bb | 47 | } |
fe7e8758 PB |
48 | |
49 | static void realview_gic_register_devices(void) | |
50 | { | |
51 | sysbus_register_dev("realview_gic", sizeof(RealViewGICState), | |
52 | realview_gic_init); | |
53 | } | |
54 | ||
55 | device_init(realview_gic_register_devices) |