[qemu.git] / include / hw / virtio / virtio-gpu.h

/*
 * Virtio GPU Device
 *
 * Copyright Red Hat, Inc. 2013-2014
 *
 * Authors:
 *     Dave Airlie <[email protected]>
 *     Gerd Hoffmann <[email protected]>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.
 * See the COPYING file in the top-level directory.
 */

#ifndef _QEMU_VIRTIO_VGA_H
#define _QEMU_VIRTIO_VGA_H

#include "qemu/queue.h"
#include "ui/qemu-pixman.h"
#include "ui/console.h"
#include "hw/virtio/virtio.h"
#include "hw/pci/pci.h"

#include "standard-headers/linux/virtio_gpu.h"
#define TYPE_VIRTIO_GPU "virtio-gpu-device"
#define VIRTIO_GPU(obj)                                        \
        OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)

#define VIRTIO_ID_GPU 16

#define VIRTIO_GPU_MAX_SCANOUT 4

struct virtio_gpu_simple_resource {
    uint32_t resource_id;
    uint32_t width;
    uint32_t height;
    uint32_t format;
    struct iovec *iov;
    unsigned int iov_cnt;
    uint32_t scanout_bitmask;
    pixman_image_t *image;
    QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
};

struct virtio_gpu_scanout {
    QemuConsole *con;
    DisplaySurface *ds;
    uint32_t width, height;
    int x, y;
    int invalidate;
    uint32_t resource_id;
    QEMUCursor *current_cursor;
};

struct virtio_gpu_requested_state {
    uint32_t width, height;
    int x, y;
};

struct virtio_gpu_conf {
    uint32_t max_outputs;
};

struct virtio_gpu_ctrl_command {
    VirtQueueElement elem;
    VirtQueue *vq;
    struct virtio_gpu_ctrl_hdr cmd_hdr;
    uint32_t error;
    bool finished;
    QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
};

typedef struct VirtIOGPU {
    VirtIODevice parent_obj;

    QEMUBH *ctrl_bh;
    QEMUBH *cursor_bh;
    VirtQueue *ctrl_vq;
    VirtQueue *cursor_vq;

    int enable;

    int config_size;
    DeviceState *qdev;

    QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
    QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;

    struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
    struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];

    struct virtio_gpu_conf conf;
    int enabled_output_bitmask;
    struct virtio_gpu_config virtio_config;

    QEMUTimer *fence_poll;
    QEMUTimer *print_stats;

    struct {
        uint32_t inflight;
        uint32_t max_inflight;
        uint32_t requests;
        uint32_t req_3d;
        uint32_t bytes_3d;
    } stats;
} VirtIOGPU;

extern const GraphicHwOps virtio_gpu_ops;

/* to share between PCI and VGA */
#define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state)               \
    DEFINE_PROP_BIT("ioeventfd", _state, flags,                \
                    VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
    DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)

#define VIRTIO_GPU_FILL_CMD(out) do {                                   \
        size_t s;                                                       \
        s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
                       &out, sizeof(out));                              \
        if (s != sizeof(out)) {                                         \
            qemu_log_mask(LOG_GUEST_ERROR,                              \
                          "%s: command size incorrect %zu vs %zu\n",    \
                          __func__, s, sizeof(out));                    \
            return;                                                     \
        }                                                               \
    } while (0)

/* virtio-gpu.c */
void virtio_gpu_ctrl_response(VirtIOGPU *g,
                              struct virtio_gpu_ctrl_command *cmd,
                              struct virtio_gpu_ctrl_hdr *resp,
                              size_t resp_len);
void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
                                     struct virtio_gpu_ctrl_command *cmd,
                                     enum virtio_gpu_ctrl_type type);
void virtio_gpu_get_display_info(VirtIOGPU *g,
                                 struct virtio_gpu_ctrl_command *cmd);
int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
                                  struct virtio_gpu_ctrl_command *cmd,
                                  struct iovec **iov);
void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);

#endif
Commit	Line	Data
62232bf4 GH	1	/*
	2	* Virtio GPU Device
	3	*
	4	* Copyright Red Hat, Inc. 2013-2014
	5	*
	6	* Authors:
	7	* Dave Airlie <[email protected]>
	8	* Gerd Hoffmann <[email protected]>
	9	*
	10	* This work is licensed under the terms of the GNU GPL, version 2.
	11	* See the COPYING file in the top-level directory.
	12	*/
	13
	14	#ifndef _QEMU_VIRTIO_VGA_H
	15	#define _QEMU_VIRTIO_VGA_H
	16
	17	#include "qemu/queue.h"
	18	#include "ui/qemu-pixman.h"
	19	#include "ui/console.h"
	20	#include "hw/virtio/virtio.h"
	21	#include "hw/pci/pci.h"
	22
	23	#include "standard-headers/linux/virtio_gpu.h"
	24	#define TYPE_VIRTIO_GPU "virtio-gpu-device"
	25	#define VIRTIO_GPU(obj) \
	26	OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
	27
	28	#define VIRTIO_ID_GPU 16
	29
	30	#define VIRTIO_GPU_MAX_SCANOUT 4
	31
	32	struct virtio_gpu_simple_resource {
	33	uint32_t resource_id;
	34	uint32_t width;
	35	uint32_t height;
	36	uint32_t format;
	37	struct iovec *iov;
	38	unsigned int iov_cnt;
	39	uint32_t scanout_bitmask;
	40	pixman_image_t *image;
	41	QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
	42	};
	43
	44	struct virtio_gpu_scanout {
	45	QemuConsole *con;
	46	DisplaySurface *ds;
	47	uint32_t width, height;
	48	int x, y;
	49	int invalidate;
	50	uint32_t resource_id;
	51	QEMUCursor *current_cursor;
	52	};
	53
	54	struct virtio_gpu_requested_state {
	55	uint32_t width, height;
	56	int x, y;
	57	};
	58
	59	struct virtio_gpu_conf {
	60	uint32_t max_outputs;
	61	};
	62
	63	struct virtio_gpu_ctrl_command {
	64	VirtQueueElement elem;
65	VirtQueue *vq;
66	struct virtio_gpu_ctrl_hdr cmd_hdr;
67	uint32_t error;
68	bool finished;
69	QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
70	};
71
72	typedef struct VirtIOGPU {
73	VirtIODevice parent_obj;
74
75	QEMUBH *ctrl_bh;
76	QEMUBH *cursor_bh;
77	VirtQueue *ctrl_vq;
78	VirtQueue *cursor_vq;
79
80	int enable;
81
82	int config_size;
83	DeviceState *qdev;
84
85	QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
86	QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
87
88	struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUT];
89	struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUT];
90
91	struct virtio_gpu_conf conf;
92	int enabled_output_bitmask;
93	struct virtio_gpu_config virtio_config;
94
95	QEMUTimer *fence_poll;
96	QEMUTimer *print_stats;
97
98	struct {
99	uint32_t inflight;
100	uint32_t max_inflight;
101	uint32_t requests;
102	uint32_t req_3d;
103	uint32_t bytes_3d;
104	} stats;
105	} VirtIOGPU;
106
107	extern const GraphicHwOps virtio_gpu_ops;
108
109	/* to share between PCI and VGA */
110	#define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state) \
111	DEFINE_PROP_BIT("ioeventfd", _state, flags, \
112	VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
113	DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)
114
62232bf4 GH	115	#define VIRTIO_GPU_FILL_CMD(out) do { \
	116	size_t s; \
	117	s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
	118	&out, sizeof(out)); \
	119	if (s != sizeof(out)) { \
	120	qemu_log_mask(LOG_GUEST_ERROR, \
	121	"%s: command size incorrect %zu vs %zu\n", \
	122	__func__, s, sizeof(out)); \
	123	return; \
	124	} \
	125	} while (0)
	126
	127	/* virtio-gpu.c */
	128	void virtio_gpu_ctrl_response(VirtIOGPU *g,
	129	struct virtio_gpu_ctrl_command *cmd,
	130	struct virtio_gpu_ctrl_hdr *resp,
	131	size_t resp_len);
	132	void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
	133	struct virtio_gpu_ctrl_command *cmd,
	134	enum virtio_gpu_ctrl_type type);
	135	void virtio_gpu_get_display_info(VirtIOGPU *g,
	136	struct virtio_gpu_ctrl_command *cmd);
	137	int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
	138	struct virtio_gpu_ctrl_command *cmd,
	139	struct iovec **iov);
	140	void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);
	141
	142	#endif