[qemu.git] / target-i386 / svm.h

#ifndef __SVM_H
#define __SVM_H

#define TLB_CONTROL_DO_NOTHING 0
#define TLB_CONTROL_FLUSH_ALL_ASID 1

#define V_TPR_MASK 0x0f

#define V_IRQ_SHIFT 8
#define V_IRQ_MASK (1 << V_IRQ_SHIFT)

#define V_INTR_PRIO_SHIFT 16
#define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)

#define V_IGN_TPR_SHIFT 20
#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)

#define V_INTR_MASKING_SHIFT 24
#define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)

#define SVM_INTERRUPT_SHADOW_MASK 1

#define SVM_IOIO_STR_SHIFT 2
#define SVM_IOIO_REP_SHIFT 3
#define SVM_IOIO_SIZE_SHIFT 4
#define SVM_IOIO_ASIZE_SHIFT 7

#define SVM_IOIO_TYPE_MASK 1
#define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)
#define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)
#define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)
#define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)

#define SVM_EVTINJ_VEC_MASK 0xff

#define SVM_EVTINJ_TYPE_SHIFT 8
#define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)

#define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
#define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)
#define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)
#define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)

#define SVM_EVTINJ_VALID (1 << 31)
#define SVM_EVTINJ_VALID_ERR (1 << 11)

#define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK

#define	SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
#define	SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
#define	SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT
#define	SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT

#define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID
#define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR

#define	SVM_EXIT_READ_CR0 	0x000
#define	SVM_EXIT_READ_CR3 	0x003
#define	SVM_EXIT_READ_CR4 	0x004
#define	SVM_EXIT_READ_CR8 	0x008
#define	SVM_EXIT_WRITE_CR0 	0x010
#define	SVM_EXIT_WRITE_CR3 	0x013
#define	SVM_EXIT_WRITE_CR4 	0x014
#define	SVM_EXIT_WRITE_CR8 	0x018
#define	SVM_EXIT_READ_DR0 	0x020
#define	SVM_EXIT_READ_DR1 	0x021
#define	SVM_EXIT_READ_DR2 	0x022
#define	SVM_EXIT_READ_DR3 	0x023
#define	SVM_EXIT_READ_DR4 	0x024
#define	SVM_EXIT_READ_DR5 	0x025
#define	SVM_EXIT_READ_DR6 	0x026
#define	SVM_EXIT_READ_DR7 	0x027
#define	SVM_EXIT_WRITE_DR0 	0x030
#define	SVM_EXIT_WRITE_DR1 	0x031
#define	SVM_EXIT_WRITE_DR2 	0x032
#define	SVM_EXIT_WRITE_DR3 	0x033
#define	SVM_EXIT_WRITE_DR4 	0x034
#define	SVM_EXIT_WRITE_DR5 	0x035
#define	SVM_EXIT_WRITE_DR6 	0x036
#define	SVM_EXIT_WRITE_DR7 	0x037
#define SVM_EXIT_EXCP_BASE      0x040
#define SVM_EXIT_INTR		0x060
#define SVM_EXIT_NMI		0x061
#define SVM_EXIT_SMI		0x062
#define SVM_EXIT_INIT		0x063
#define SVM_EXIT_VINTR		0x064
#define SVM_EXIT_CR0_SEL_WRITE	0x065
#define SVM_EXIT_IDTR_READ	0x066
#define SVM_EXIT_GDTR_READ	0x067
#define SVM_EXIT_LDTR_READ	0x068
#define SVM_EXIT_TR_READ	0x069
#define SVM_EXIT_IDTR_WRITE	0x06a
#define SVM_EXIT_GDTR_WRITE	0x06b
#define SVM_EXIT_LDTR_WRITE	0x06c
#define SVM_EXIT_TR_WRITE	0x06d
#define SVM_EXIT_RDTSC		0x06e
#define SVM_EXIT_RDPMC		0x06f
#define SVM_EXIT_PUSHF		0x070
#define SVM_EXIT_POPF		0x071
#define SVM_EXIT_CPUID		0x072
#define SVM_EXIT_RSM		0x073
#define SVM_EXIT_IRET		0x074
#define SVM_EXIT_SWINT		0x075
#define SVM_EXIT_INVD		0x076
#define SVM_EXIT_PAUSE		0x077
#define SVM_EXIT_HLT		0x078
#define SVM_EXIT_INVLPG		0x079
#define SVM_EXIT_INVLPGA	0x07a
#define SVM_EXIT_IOIO		0x07b
#define SVM_EXIT_MSR		0x07c
#define SVM_EXIT_TASK_SWITCH	0x07d
#define SVM_EXIT_FERR_FREEZE	0x07e
#define SVM_EXIT_SHUTDOWN	0x07f
#define SVM_EXIT_VMRUN		0x080
#define SVM_EXIT_VMMCALL	0x081
#define SVM_EXIT_VMLOAD		0x082
#define SVM_EXIT_VMSAVE		0x083
#define SVM_EXIT_STGI		0x084
#define SVM_EXIT_CLGI		0x085
#define SVM_EXIT_SKINIT		0x086
#define SVM_EXIT_RDTSCP		0x087
#define SVM_EXIT_ICEBP		0x088
#define SVM_EXIT_WBINVD		0x089
/* only included in documentation, maybe wrong */
#define SVM_EXIT_MONITOR	0x08a
#define SVM_EXIT_MWAIT		0x08b
#define SVM_EXIT_NPF  		0x400

#define SVM_EXIT_ERR		-1

#define SVM_CR0_SELECTIVE_MASK (1 << 3 | 1) /* TS and MP */

struct QEMU_PACKED vmcb_control_area {
	uint16_t intercept_cr_read;
	uint16_t intercept_cr_write;
	uint16_t intercept_dr_read;
	uint16_t intercept_dr_write;
	uint32_t intercept_exceptions;
	uint64_t intercept;
	uint8_t reserved_1[44];
	uint64_t iopm_base_pa;
	uint64_t msrpm_base_pa;
	uint64_t tsc_offset;
	uint32_t asid;
	uint8_t tlb_ctl;
	uint8_t reserved_2[3];
	uint32_t int_ctl;
	uint32_t int_vector;
	uint32_t int_state;
	uint8_t reserved_3[4];
	uint64_t exit_code;
	uint64_t exit_info_1;
	uint64_t exit_info_2;
	uint32_t exit_int_info;
	uint32_t exit_int_info_err;
	uint64_t nested_ctl;
	uint8_t reserved_4[16];
	uint32_t event_inj;
	uint32_t event_inj_err;
	uint64_t nested_cr3;
	uint64_t lbr_ctl;
	uint8_t reserved_5[832];
};

struct QEMU_PACKED vmcb_seg {
	uint16_t selector;
	uint16_t attrib;
	uint32_t limit;
	uint64_t base;
};

struct QEMU_PACKED vmcb_save_area {
	struct vmcb_seg es;
	struct vmcb_seg cs;
	struct vmcb_seg ss;
	struct vmcb_seg ds;
	struct vmcb_seg fs;
	struct vmcb_seg gs;
	struct vmcb_seg gdtr;
	struct vmcb_seg ldtr;
	struct vmcb_seg idtr;
	struct vmcb_seg tr;
	uint8_t reserved_1[43];
	uint8_t cpl;
	uint8_t reserved_2[4];
	uint64_t efer;
	uint8_t reserved_3[112];
	uint64_t cr4;
	uint64_t cr3;
	uint64_t cr0;
	uint64_t dr7;
	uint64_t dr6;
	uint64_t rflags;
	uint64_t rip;
	uint8_t reserved_4[88];
	uint64_t rsp;
	uint8_t reserved_5[24];
	uint64_t rax;
	uint64_t star;
	uint64_t lstar;
	uint64_t cstar;
	uint64_t sfmask;
	uint64_t kernel_gs_base;
	uint64_t sysenter_cs;
	uint64_t sysenter_esp;
	uint64_t sysenter_eip;
	uint64_t cr2;
	uint8_t reserved_6[32];
	uint64_t g_pat;
	uint64_t dbgctl;
	uint64_t br_from;
	uint64_t br_to;
	uint64_t last_excp_from;
	uint64_t last_excp_to;
};

struct QEMU_PACKED vmcb {
	struct vmcb_control_area control;
	struct vmcb_save_area save;
};

#endif
Commit	Line	Data
239fbd86 TS	1	#ifndef __SVM_H
	2	#define __SVM_H
	3
239fbd86 TS	4	#define TLB_CONTROL_DO_NOTHING 0
	5	#define TLB_CONTROL_FLUSH_ALL_ASID 1
	6
	7	#define V_TPR_MASK 0x0f
	8
	9	#define V_IRQ_SHIFT 8
	10	#define V_IRQ_MASK (1 << V_IRQ_SHIFT)
	11
	12	#define V_INTR_PRIO_SHIFT 16
	13	#define V_INTR_PRIO_MASK (0x0f << V_INTR_PRIO_SHIFT)
	14
	15	#define V_IGN_TPR_SHIFT 20
	16	#define V_IGN_TPR_MASK (1 << V_IGN_TPR_SHIFT)
	17
	18	#define V_INTR_MASKING_SHIFT 24
	19	#define V_INTR_MASKING_MASK (1 << V_INTR_MASKING_SHIFT)
	20
	21	#define SVM_INTERRUPT_SHADOW_MASK 1
	22
	23	#define SVM_IOIO_STR_SHIFT 2
	24	#define SVM_IOIO_REP_SHIFT 3
	25	#define SVM_IOIO_SIZE_SHIFT 4
	26	#define SVM_IOIO_ASIZE_SHIFT 7
	27
	28	#define SVM_IOIO_TYPE_MASK 1
	29	#define SVM_IOIO_STR_MASK (1 << SVM_IOIO_STR_SHIFT)
	30	#define SVM_IOIO_REP_MASK (1 << SVM_IOIO_REP_SHIFT)
	31	#define SVM_IOIO_SIZE_MASK (7 << SVM_IOIO_SIZE_SHIFT)
	32	#define SVM_IOIO_ASIZE_MASK (7 << SVM_IOIO_ASIZE_SHIFT)
	33
239fbd86 TS	34	#define SVM_EVTINJ_VEC_MASK 0xff
	35
	36	#define SVM_EVTINJ_TYPE_SHIFT 8
	37	#define SVM_EVTINJ_TYPE_MASK (7 << SVM_EVTINJ_TYPE_SHIFT)
	38
	39	#define SVM_EVTINJ_TYPE_INTR (0 << SVM_EVTINJ_TYPE_SHIFT)
	40	#define SVM_EVTINJ_TYPE_NMI (2 << SVM_EVTINJ_TYPE_SHIFT)
	41	#define SVM_EVTINJ_TYPE_EXEPT (3 << SVM_EVTINJ_TYPE_SHIFT)
	42	#define SVM_EVTINJ_TYPE_SOFT (4 << SVM_EVTINJ_TYPE_SHIFT)
	43
	44	#define SVM_EVTINJ_VALID (1 << 31)
	45	#define SVM_EVTINJ_VALID_ERR (1 << 11)
	46
	47	#define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK
	48
	49	#define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
	50	#define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
	51	#define SVM_EXITINTINFO_TYPE_EXEPT SVM_EVTINJ_TYPE_EXEPT
	52	#define SVM_EXITINTINFO_TYPE_SOFT SVM_EVTINJ_TYPE_SOFT
	53
	54	#define SVM_EXITINTINFO_VALID SVM_EVTINJ_VALID
	55	#define SVM_EXITINTINFO_VALID_ERR SVM_EVTINJ_VALID_ERR
	56
	57	#define SVM_EXIT_READ_CR0 0x000
	58	#define SVM_EXIT_READ_CR3 0x003
	59	#define SVM_EXIT_READ_CR4 0x004
	60	#define SVM_EXIT_READ_CR8 0x008
	61	#define SVM_EXIT_WRITE_CR0 0x010
	62	#define SVM_EXIT_WRITE_CR3 0x013
	63	#define SVM_EXIT_WRITE_CR4 0x014
	64	#define SVM_EXIT_WRITE_CR8 0x018
	65	#define SVM_EXIT_READ_DR0 0x020
	66	#define SVM_EXIT_READ_DR1 0x021
	67	#define SVM_EXIT_READ_DR2 0x022
	68	#define SVM_EXIT_READ_DR3 0x023
	69	#define SVM_EXIT_READ_DR4 0x024
	70	#define SVM_EXIT_READ_DR5 0x025
	71	#define SVM_EXIT_READ_DR6 0x026
	72	#define SVM_EXIT_READ_DR7 0x027
	73	#define SVM_EXIT_WRITE_DR0 0x030
	74	#define SVM_EXIT_WRITE_DR1 0x031
	75	#define SVM_EXIT_WRITE_DR2 0x032
	76	#define SVM_EXIT_WRITE_DR3 0x033
	77	#define SVM_EXIT_WRITE_DR4 0x034
	78	#define SVM_EXIT_WRITE_DR5 0x035
	79	#define SVM_EXIT_WRITE_DR6 0x036
	80	#define SVM_EXIT_WRITE_DR7 0x037
	81	#define SVM_EXIT_EXCP_BASE 0x040
	82	#define SVM_EXIT_INTR 0x060
	83	#define SVM_EXIT_NMI 0x061
	84	#define SVM_EXIT_SMI 0x062
	85	#define SVM_EXIT_INIT 0x063
	86	#define SVM_EXIT_VINTR 0x064
	87	#define SVM_EXIT_CR0_SEL_WRITE 0x065
	88	#define SVM_EXIT_IDTR_READ 0x066
	89	#define SVM_EXIT_GDTR_READ 0x067
	90	#define SVM_EXIT_LDTR_READ 0x068
	91	#define SVM_EXIT_TR_READ 0x069
	92	#define SVM_EXIT_IDTR_WRITE 0x06a
	93	#define SVM_EXIT_GDTR_WRITE 0x06b
	94	#define SVM_EXIT_LDTR_WRITE 0x06c
	95	#define SVM_EXIT_TR_WRITE 0x06d
	96	#define SVM_EXIT_RDTSC 0x06e
	97	#define SVM_EXIT_RDPMC 0x06f
98	#define SVM_EXIT_PUSHF 0x070
99	#define SVM_EXIT_POPF 0x071
100	#define SVM_EXIT_CPUID 0x072
101	#define SVM_EXIT_RSM 0x073
102	#define SVM_EXIT_IRET 0x074
103	#define SVM_EXIT_SWINT 0x075
104	#define SVM_EXIT_INVD 0x076
105	#define SVM_EXIT_PAUSE 0x077
106	#define SVM_EXIT_HLT 0x078
107	#define SVM_EXIT_INVLPG 0x079
108	#define SVM_EXIT_INVLPGA 0x07a
109	#define SVM_EXIT_IOIO 0x07b
110	#define SVM_EXIT_MSR 0x07c
111	#define SVM_EXIT_TASK_SWITCH 0x07d
112	#define SVM_EXIT_FERR_FREEZE 0x07e
113	#define SVM_EXIT_SHUTDOWN 0x07f
114	#define SVM_EXIT_VMRUN 0x080
115	#define SVM_EXIT_VMMCALL 0x081
116	#define SVM_EXIT_VMLOAD 0x082
117	#define SVM_EXIT_VMSAVE 0x083
118	#define SVM_EXIT_STGI 0x084
119	#define SVM_EXIT_CLGI 0x085
120	#define SVM_EXIT_SKINIT 0x086
121	#define SVM_EXIT_RDTSCP 0x087
122	#define SVM_EXIT_ICEBP 0x088
123	#define SVM_EXIT_WBINVD 0x089
124	/* only included in documentation, maybe wrong */
125	#define SVM_EXIT_MONITOR 0x08a
126	#define SVM_EXIT_MWAIT 0x08b
127	#define SVM_EXIT_NPF 0x400
128
129	#define SVM_EXIT_ERR -1
130
131	#define SVM_CR0_SELECTIVE_MASK (1 << 3 \| 1) /* TS and MP */
132
541dc0d4	133	struct QEMU_PACKED vmcb_control_area {
872929aa FB	134	uint16_t intercept_cr_read;
	135	uint16_t intercept_cr_write;
	136	uint16_t intercept_dr_read;
	137	uint16_t intercept_dr_write;
	138	uint32_t intercept_exceptions;
	139	uint64_t intercept;
	140	uint8_t reserved_1[44];
	141	uint64_t iopm_base_pa;
	142	uint64_t msrpm_base_pa;
	143	uint64_t tsc_offset;
	144	uint32_t asid;
	145	uint8_t tlb_ctl;
	146	uint8_t reserved_2[3];
	147	uint32_t int_ctl;
	148	uint32_t int_vector;
	149	uint32_t int_state;
	150	uint8_t reserved_3[4];
	151	uint64_t exit_code;
	152	uint64_t exit_info_1;
	153	uint64_t exit_info_2;
	154	uint32_t exit_int_info;
	155	uint32_t exit_int_info_err;
	156	uint64_t nested_ctl;
	157	uint8_t reserved_4[16];
	158	uint32_t event_inj;
	159	uint32_t event_inj_err;
	160	uint64_t nested_cr3;
	161	uint64_t lbr_ctl;
	162	uint8_t reserved_5[832];
	163	};
239fbd86	164
541dc0d4	165	struct QEMU_PACKED vmcb_seg {
872929aa FB	166	uint16_t selector;
	167	uint16_t attrib;
	168	uint32_t limit;
	169	uint64_t base;
	170	};
239fbd86	171
541dc0d4	172	struct QEMU_PACKED vmcb_save_area {
872929aa FB	173	struct vmcb_seg es;
	174	struct vmcb_seg cs;
	175	struct vmcb_seg ss;
	176	struct vmcb_seg ds;
	177	struct vmcb_seg fs;
	178	struct vmcb_seg gs;
	179	struct vmcb_seg gdtr;
	180	struct vmcb_seg ldtr;
	181	struct vmcb_seg idtr;
	182	struct vmcb_seg tr;
	183	uint8_t reserved_1[43];
	184	uint8_t cpl;
	185	uint8_t reserved_2[4];
	186	uint64_t efer;
	187	uint8_t reserved_3[112];
	188	uint64_t cr4;
	189	uint64_t cr3;
	190	uint64_t cr0;
	191	uint64_t dr7;
	192	uint64_t dr6;
	193	uint64_t rflags;
	194	uint64_t rip;
	195	uint8_t reserved_4[88];
	196	uint64_t rsp;
	197	uint8_t reserved_5[24];
	198	uint64_t rax;
	199	uint64_t star;
	200	uint64_t lstar;
	201	uint64_t cstar;
	202	uint64_t sfmask;
	203	uint64_t kernel_gs_base;
	204	uint64_t sysenter_cs;
	205	uint64_t sysenter_esp;
	206	uint64_t sysenter_eip;
	207	uint64_t cr2;
db620f46	208	uint8_t reserved_6[32];
872929aa FB	209	uint64_t g_pat;
	210	uint64_t dbgctl;
	211	uint64_t br_from;
	212	uint64_t br_to;
	213	uint64_t last_excp_from;
	214	uint64_t last_excp_to;
	215	};
239fbd86	216
541dc0d4	217	struct QEMU_PACKED vmcb {
872929aa FB	218	struct vmcb_control_area control;
	219	struct vmcb_save_area save;
	220	};
239fbd86 TS	221
239fbd86 TS	222	#endif