dac write index register is r/w - CR1D access fix (Volker Ruppert)
[qemu.git] / hw / sb16.c
CommitLineData
27503323
FB
1/*
2 * QEMU Soundblaster 16 emulation
3 *
4 * Copyright (c) 2003 Vassili Karpov (malc)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
27503323
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24#include "vl.h"
25
26#define MIN(a, b) ((a)>(b)?(b):(a))
27#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
28
d329a6fb
FB
29#define log(...) do { \
30 fprintf (stderr, "sb16: " __VA_ARGS__); \
31 fputc ('\n', stderr); \
32} while (0)
27503323 33
bc0b1dc1 34/* #define DEBUG_SB16 */
27503323
FB
35#ifdef DEBUG_SB16
36#define lwarn(...) fprintf (stderr, "sb16: " __VA_ARGS__)
37#define linfo(...) fprintf (stderr, "sb16: " __VA_ARGS__)
38#define ldebug(...) fprintf (stderr, "sb16: " __VA_ARGS__)
39#else
40#define lwarn(...)
41#define linfo(...)
42#define ldebug(...)
43#endif
44
45#define IO_READ_PROTO(name) \
7d977de7 46 uint32_t name (void *opaque, uint32_t nport)
27503323 47#define IO_WRITE_PROTO(name) \
7d977de7 48 void name (void *opaque, uint32_t nport, uint32_t val)
27503323 49
d329a6fb
FB
50static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
51
27503323
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52static struct {
53 int ver_lo;
54 int ver_hi;
55 int irq;
56 int dma;
57 int hdma;
58 int port;
59 int mix_block;
bc0b1dc1 60} sb = {5, 4, 5, 1, 5, 0x220, -1};
27503323
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61
62static int mix_block, noirq;
63
5e2a6443 64typedef struct SB16State {
27503323
FB
65 int in_index;
66 int out_data_len;
67 int fmt_stereo;
68 int fmt_signed;
69 int fmt_bits;
70 int dma_auto;
71 int dma_buffer_size;
72 int fifo;
73 int freq;
74 int time_const;
75 int speaker;
76 int needed_bytes;
77 int cmd;
78 int dma_pos;
79 int use_hdma;
80
81 int v2x6;
82
83 uint8_t in_data[10];
d329a6fb 84 uint8_t out_data[50];
27503323
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85
86 int left_till_irq;
27503323 87
5e2a6443
FB
88 /* mixer state */
89 int mixer_nreg;
202a456a 90 uint8_t mixer_regs[256];
5e2a6443 91} SB16State;
27503323 92
5e2a6443
FB
93/* XXX: suppress that and use a context */
94static struct SB16State dsp;
27503323 95
5e2a6443
FB
96static void log_dsp (SB16State *dsp)
97{
27503323 98 linfo ("%c:%c:%d:%c:dmabuf=%d:pos=%d:freq=%d:timeconst=%d:speaker=%d\n",
5e2a6443
FB
99 dsp->fmt_stereo ? 'S' : 'M',
100 dsp->fmt_signed ? 'S' : 'U',
101 dsp->fmt_bits,
102 dsp->dma_auto ? 'a' : 's',
103 dsp->dma_buffer_size,
104 dsp->dma_pos,
105 dsp->freq,
106 dsp->time_const,
107 dsp->speaker);
27503323
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108}
109
110static void control (int hold)
111{
112 linfo ("%d high %d\n", hold, dsp.use_hdma);
113 if (hold) {
114 if (dsp.use_hdma)
115 DMA_hold_DREQ (sb.hdma);
116 else
117 DMA_hold_DREQ (sb.dma);
118 }
119 else {
120 if (dsp.use_hdma)
121 DMA_release_DREQ (sb.hdma);
122 else
123 DMA_release_DREQ (sb.dma);
124 }
125}
126
127static void dma_cmd (uint8_t cmd, uint8_t d0, int dma_len)
128{
129 int bps;
130 audfmt_e fmt;
131
132 dsp.use_hdma = cmd < 0xc0;
133 dsp.fifo = (cmd >> 1) & 1;
134 dsp.dma_auto = (cmd >> 2) & 1;
135
136 switch (cmd >> 4) {
137 case 11:
138 dsp.fmt_bits = 16;
139 break;
140
141 case 12:
142 dsp.fmt_bits = 8;
143 break;
144 }
145
146 dsp.fmt_signed = (d0 >> 4) & 1;
147 dsp.fmt_stereo = (d0 >> 5) & 1;
148
149 if (-1 != dsp.time_const) {
150 int tmp;
151
152 tmp = 256 - dsp.time_const;
153 dsp.freq = (1000000 + (tmp / 2)) / tmp;
154 }
155 bps = 1 << (16 == dsp.fmt_bits);
156
157 if (-1 != dma_len)
158 dsp.dma_buffer_size = (dma_len + 1) * bps;
159
160 linfo ("frequency %d, stereo %d, signed %d, bits %d, size %d, auto %d\n",
161 dsp.freq, dsp.fmt_stereo, dsp.fmt_signed, dsp.fmt_bits,
162 dsp.dma_buffer_size, dsp.dma_auto);
163
164 if (16 == dsp.fmt_bits) {
165 if (dsp.fmt_signed) {
166 fmt = AUD_FMT_S16;
167 }
168 else {
169 fmt = AUD_FMT_U16;
170 }
171 }
172 else {
173 if (dsp.fmt_signed) {
174 fmt = AUD_FMT_S8;
175 }
176 else {
177 fmt = AUD_FMT_U8;
178 }
179 }
180
181 dsp.dma_pos = 0;
182 dsp.left_till_irq = dsp.dma_buffer_size;
183
184 if (sb.mix_block) {
185 mix_block = sb.mix_block;
186 }
187 else {
188 int align;
189
190 align = bps << dsp.fmt_stereo;
191 mix_block = ((dsp.freq * align) / 100) & ~(align - 1);
192 }
193
194 AUD_reset (dsp.freq, 1 << dsp.fmt_stereo, fmt);
195 control (1);
196 dsp.speaker = 1;
197}
198
202a456a
FB
199static inline void dsp_out_data(SB16State *dsp, int val)
200{
201 if (dsp->out_data_len < sizeof(dsp->out_data))
202 dsp->out_data[dsp->out_data_len++] = val;
203}
204
5e2a6443 205static void command (SB16State *dsp, uint8_t cmd)
27503323 206{
27503323
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207 linfo ("%#x\n", cmd);
208
209 if (cmd > 0xaf && cmd < 0xd0) {
210 if (cmd & 8)
211 goto error;
212
213 switch (cmd >> 4) {
214 case 11:
215 case 12:
216 break;
217 default:
5e2a6443 218 log("%#x wrong bits", cmd);
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219 goto error;
220 }
5e2a6443 221 dsp->needed_bytes = 3;
27503323
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222 }
223 else {
224 switch (cmd) {
bc0b1dc1
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225 case 0x00:
226 case 0x03:
227 case 0xe7:
228 /* IMS uses those when probing for sound devices */
229 return;
230
d329a6fb
FB
231 case 0x04:
232 dsp->needed_bytes = 1;
233 break;
234
235 case 0x05:
236 case 0x0e:
237 dsp->needed_bytes = 2;
238 break;
239
240 case 0x0f:
241 dsp->needed_bytes = 1;
242 dsp_out_data (dsp, 0);
243 break;
244
27503323 245 case 0x10:
5e2a6443 246 dsp->needed_bytes = 1;
27503323
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247 break;
248
249 case 0x14:
5e2a6443
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250 dsp->needed_bytes = 2;
251 dsp->dma_buffer_size = 0;
27503323
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252 break;
253
254 case 0x20:
202a456a 255 dsp_out_data(dsp, 0xff);
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256 break;
257
258 case 0x35:
259 lwarn ("MIDI commands not implemented\n");
260 break;
261
262 case 0x40:
5e2a6443
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263 dsp->freq = -1;
264 dsp->time_const = -1;
265 dsp->needed_bytes = 1;
27503323
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266 break;
267
268 case 0x41:
269 case 0x42:
5e2a6443
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270 dsp->freq = -1;
271 dsp->time_const = -1;
272 dsp->needed_bytes = 2;
27503323
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273 break;
274
275 case 0x47: /* Continue Auto-Initialize DMA 16bit */
276 break;
277
278 case 0x48:
5e2a6443 279 dsp->needed_bytes = 2;
27503323
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280 break;
281
282 case 0x27: /* ????????? */
283 case 0x4e:
284 return;
285
286 case 0x80:
5e2a6443 287 cmd = -1;
27503323
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288 break;
289
290 case 0x90:
291 case 0x91:
292 {
293 uint8_t d0;
294
295 d0 = 4;
d329a6fb
FB
296 /* if (dsp->fmt_signed) d0 |= 16; */
297 /* if (dsp->fmt_stereo) d0 |= 32; */
27503323 298 dma_cmd (cmd == 0x90 ? 0xc4 : 0xc0, d0, -1);
5e2a6443 299 cmd = -1;
27503323
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300 break;
301 }
302
303 case 0xd0: /* XXX */
304 control (0);
305 return;
306
307 case 0xd1:
5e2a6443 308 dsp->speaker = 1;
27503323
FB
309 break;
310
311 case 0xd3:
5e2a6443 312 dsp->speaker = 0;
27503323
FB
313 return;
314
315 case 0xd4:
316 control (1);
317 break;
318
319 case 0xd5:
320 control (0);
321 break;
322
323 case 0xd6:
324 control (1);
325 break;
326
327 case 0xd9:
328 control (0);
5e2a6443 329 dsp->dma_auto = 0;
27503323
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330 return;
331
332 case 0xda:
333 control (0);
5e2a6443 334 dsp->dma_auto = 0;
27503323
FB
335 break;
336
337 case 0xe0:
5e2a6443 338 dsp->needed_bytes = 1;
27503323
FB
339 break;
340
341 case 0xe1:
202a456a
FB
342 dsp_out_data(dsp, sb.ver_lo);
343 dsp_out_data(dsp, sb.ver_hi);
27503323
FB
344 return;
345
d329a6fb
FB
346 case 0xe3:
347 {
348 int i;
349 for (i = sizeof (e3) - 1; i >= 0; --i)
350 dsp_out_data (dsp, e3[i]);
351 return;
352 }
353
27503323 354 case 0xf2:
202a456a 355 dsp_out_data(dsp, 0xaa);
5e2a6443 356 dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80];
27503323
FB
357 pic_set_irq (sb.irq, 1);
358 return;
359
360 default:
5e2a6443 361 log("%#x is unknown", cmd);
27503323
FB
362 goto error;
363 }
364 }
5e2a6443 365 dsp->cmd = cmd;
27503323
FB
366 return;
367
368 error:
27503323
FB
369 return;
370}
371
5e2a6443 372static void complete (SB16State *dsp)
27503323
FB
373{
374 linfo ("complete command %#x, in_index %d, needed_bytes %d\n",
5e2a6443 375 dsp->cmd, dsp->in_index, dsp->needed_bytes);
27503323 376
5e2a6443 377 if (dsp->cmd > 0xaf && dsp->cmd < 0xd0) {
27503323
FB
378 int d0, d1, d2;
379
5e2a6443
FB
380 d0 = dsp->in_data[0];
381 d1 = dsp->in_data[1];
382 d2 = dsp->in_data[2];
27503323
FB
383
384 ldebug ("d0 = %d, d1 = %d, d2 = %d\n",
385 d0, d1, d2);
5e2a6443 386 dma_cmd (dsp->cmd, d0, d1 + (d2 << 8));
27503323
FB
387 }
388 else {
5e2a6443 389 switch (dsp->cmd) {
d329a6fb
FB
390 case 0x05:
391 case 0x04:
392 case 0x0e:
393 case 0x0f:
394 break;
27503323
FB
395
396 case 0x10:
397 break;
398
399 case 0x14:
400 {
401 int d0, d1;
402 int save_left;
403 int save_pos;
404
5e2a6443
FB
405 d0 = dsp->in_data[0];
406 d1 = dsp->in_data[1];
27503323 407
5e2a6443
FB
408 save_left = dsp->left_till_irq;
409 save_pos = dsp->dma_pos;
27503323 410 dma_cmd (0xc0, 0, d0 + (d1 << 8));
5e2a6443
FB
411 dsp->left_till_irq = save_left;
412 dsp->dma_pos = save_pos;
27503323
FB
413
414 linfo ("set buffer size data[%d, %d] %d pos %d\n",
5e2a6443 415 d0, d1, dsp->dma_buffer_size, dsp->dma_pos);
27503323
FB
416 break;
417 }
418
419 case 0x40:
5e2a6443
FB
420 dsp->time_const = dsp->in_data[0];
421 linfo ("set time const %d\n", dsp->time_const);
27503323
FB
422 break;
423
424 case 0x41:
425 case 0x42:
5e2a6443 426 dsp->freq = dsp->in_data[1] + (dsp->in_data[0] << 8);
27503323 427 linfo ("set freq %#x, %#x = %d\n",
5e2a6443 428 dsp->in_data[1], dsp->in_data[0], dsp->freq);
27503323
FB
429 break;
430
431 case 0x48:
5e2a6443 432 dsp->dma_buffer_size = dsp->in_data[1] + (dsp->in_data[0] << 8);
27503323 433 linfo ("set dma len %#x, %#x = %d\n",
5e2a6443 434 dsp->in_data[1], dsp->in_data[0], dsp->dma_buffer_size);
27503323
FB
435 break;
436
437 case 0xe0:
202a456a 438 dsp->out_data_len = 0;
5e2a6443 439 linfo ("data = %#x\n", dsp->in_data[0]);
202a456a 440 dsp_out_data(dsp, dsp->in_data[0] ^ 0xff);
27503323
FB
441 break;
442
443 default:
5e2a6443
FB
444 log ("unrecognized command %#x", dsp->cmd);
445 return;
27503323
FB
446 }
447 }
448
5e2a6443 449 dsp->cmd = -1;
27503323 450 return;
27503323
FB
451}
452
453static IO_WRITE_PROTO (dsp_write)
454{
5e2a6443 455 SB16State *dsp = opaque;
27503323
FB
456 int iport;
457
458 iport = nport - sb.port;
459
d329a6fb 460 ldebug ("write %#x %#x\n", nport, iport);
27503323
FB
461 switch (iport) {
462 case 0x6:
d329a6fb 463 control (0);
27503323 464 if (0 == val)
5e2a6443
FB
465 dsp->v2x6 = 0;
466 else if ((1 == val) && (0 == dsp->v2x6)) {
467 dsp->v2x6 = 1;
202a456a 468 dsp_out_data(dsp, 0xaa);
27503323
FB
469 }
470 else
5e2a6443 471 dsp->v2x6 = ~0;
27503323
FB
472 break;
473
474 case 0xc: /* write data or command | write status */
5e2a6443
FB
475 if (0 == dsp->needed_bytes) {
476 command (dsp, val);
477 if (0 == dsp->needed_bytes) {
478 log_dsp (dsp);
27503323
FB
479 }
480 }
481 else {
5e2a6443
FB
482 dsp->in_data[dsp->in_index++] = val;
483 if (dsp->in_index == dsp->needed_bytes) {
484 dsp->needed_bytes = 0;
485 dsp->in_index = 0;
486 complete (dsp);
487 log_dsp (dsp);
27503323
FB
488 }
489 }
490 break;
491
492 default:
5e2a6443
FB
493 log ("(nport=%#x, val=%#x)", nport, val);
494 break;
27503323
FB
495 }
496}
497
498static IO_READ_PROTO (dsp_read)
499{
5e2a6443 500 SB16State *dsp = opaque;
27503323
FB
501 int iport, retval;
502
27503323
FB
503 iport = nport - sb.port;
504
505 switch (iport) {
506
507 case 0x6: /* reset */
508 return 0;
509
510 case 0xa: /* read data */
5e2a6443
FB
511 if (dsp->out_data_len) {
512 retval = dsp->out_data[--dsp->out_data_len];
513 } else {
d329a6fb 514 log("empty output buffer");
27503323 515 goto error;
27503323
FB
516 }
517 break;
518
519 case 0xc: /* 0 can write */
520 retval = 0;
521 break;
522
523 case 0xd: /* timer interrupt clear */
d329a6fb 524 log("timer interrupt clear");
27503323
FB
525 goto error;
526
527 case 0xe: /* data available status | irq 8 ack */
bc0b1dc1
FB
528 /* XXX drop pic irq line here? */
529 ldebug ("8 ack\n");
5e2a6443
FB
530 retval = (0 == dsp->out_data_len) ? 0 : 0x80;
531 dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80];
bc0b1dc1 532 pic_set_irq (sb.irq, 0);
27503323
FB
533 break;
534
535 case 0xf: /* irq 16 ack */
bc0b1dc1 536 /* XXX drop pic irq line here? */
27503323 537 ldebug ("16 ack\n");
bc0b1dc1 538 retval = 0xff;
5e2a6443 539 dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80];
bc0b1dc1 540 pic_set_irq (sb.irq, 0);
27503323
FB
541 break;
542
543 default:
544 goto error;
545 }
546
547 if ((0xc != iport) && (0xe != iport)) {
bc0b1dc1
FB
548 ldebug ("nport=%#x iport %#x = %#x\n",
549 nport, iport, retval);
27503323
FB
550 }
551
552 return retval;
553
554 error:
5e2a6443 555 return 0;
27503323
FB
556}
557
558static IO_WRITE_PROTO(mixer_write_indexb)
559{
5e2a6443 560 SB16State *dsp = opaque;
202a456a 561 dsp->mixer_nreg = val;
27503323
FB
562}
563
564static IO_WRITE_PROTO(mixer_write_datab)
565{
5e2a6443 566 SB16State *dsp = opaque;
202a456a
FB
567
568 if (dsp->mixer_nreg > 0x83)
569 return;
5e2a6443 570 dsp->mixer_regs[dsp->mixer_nreg] = val;
27503323
FB
571}
572
573static IO_WRITE_PROTO(mixer_write_indexw)
574{
7d977de7
FB
575 mixer_write_indexb (opaque, nport, val & 0xff);
576 mixer_write_datab (opaque, nport, (val >> 8) & 0xff);
27503323
FB
577}
578
579static IO_READ_PROTO(mixer_read)
580{
5e2a6443
FB
581 SB16State *dsp = opaque;
582 return dsp->mixer_regs[dsp->mixer_nreg];
27503323
FB
583}
584
585void SB16_run (void)
586{
587 if (0 == dsp.speaker)
588 return;
589
590 AUD_run ();
591}
592
593static int write_audio (uint32_t addr, int len, int size)
594{
595 int temp, net;
f9e92e97 596 uint8_t tmpbuf[4096];
27503323
FB
597
598 temp = size;
599
600 net = 0;
601
602 while (temp) {
603 int left_till_end;
604 int to_copy;
605 int copied;
606
607 left_till_end = len - dsp.dma_pos;
608
609 to_copy = MIN (temp, left_till_end);
f9e92e97
FB
610 if (to_copy > sizeof(tmpbuf))
611 to_copy = sizeof(tmpbuf);
612 cpu_physical_memory_read(addr + dsp.dma_pos, tmpbuf, to_copy);
613 copied = AUD_write (tmpbuf, to_copy);
27503323
FB
614
615 temp -= copied;
616 dsp.dma_pos += copied;
617
618 if (dsp.dma_pos == len) {
619 dsp.dma_pos = 0;
620 }
621
622 net += copied;
623
624 if (copied != to_copy)
625 return net;
626 }
627
628 return net;
629}
630
f9e92e97 631static int SB_read_DMA (void *opaque, target_ulong addr, int size)
27503323 632{
5e2a6443 633 SB16State *dsp = opaque;
27503323
FB
634 int free, till, copy, written;
635
5e2a6443 636 if (0 == dsp->speaker)
27503323
FB
637 return 0;
638
5e2a6443
FB
639 if (dsp->left_till_irq < 0) {
640 dsp->left_till_irq += dsp->dma_buffer_size;
641 return dsp->dma_pos;
27503323
FB
642 }
643
644 free = AUD_get_free ();
645
646 if ((free <= 0) || (0 == size)) {
5e2a6443 647 return dsp->dma_pos;
27503323
FB
648 }
649
650 if (mix_block > 0) {
651 copy = MIN (free, mix_block);
652 }
653 else {
654 copy = free;
655 }
656
5e2a6443 657 till = dsp->left_till_irq;
27503323
FB
658
659 ldebug ("addr:%#010x free:%d till:%d size:%d\n",
660 addr, free, till, size);
27503323 661 if (till <= copy) {
5e2a6443 662 if (0 == dsp->dma_auto) {
27503323
FB
663 copy = till;
664 }
665 }
666
667 written = write_audio (addr, size, copy);
5e2a6443 668 dsp->left_till_irq -= written;
27503323
FB
669 AUD_adjust_estimate (free - written);
670
5e2a6443
FB
671 if (dsp->left_till_irq <= 0) {
672 dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80];
bc0b1dc1
FB
673 if (0 == noirq) {
674 ldebug ("request irq\n");
f9e92e97 675 pic_set_irq(sb.irq, 1);
bc0b1dc1 676 }
27503323 677
5e2a6443 678 if (0 == dsp->dma_auto) {
27503323
FB
679 control (0);
680 }
681 }
682
683 ldebug ("pos %5d free %5d size %5d till % 5d copy %5d dma size %5d\n",
5e2a6443
FB
684 dsp->dma_pos, free, size, dsp->left_till_irq, copy,
685 dsp->dma_buffer_size);
27503323 686
5e2a6443
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687 if (dsp->left_till_irq <= 0) {
688 dsp->left_till_irq += dsp->dma_buffer_size;
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689 }
690
5e2a6443 691 return dsp->dma_pos;
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692}
693
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694static int magic_of_irq (int irq)
695{
696 switch (irq) {
697 case 2:
698 return 1;
699 case 5:
700 return 2;
701 case 7:
702 return 4;
703 case 10:
704 return 8;
705 default:
d329a6fb 706 log ("bad irq %d", irq);
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707 return 2;
708 }
709}
710
202a456a 711#if 0
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712static int irq_of_magic (int magic)
713{
714 switch (magic) {
715 case 1:
716 return 2;
717 case 2:
718 return 5;
719 case 4:
720 return 7;
721 case 8:
722 return 10;
723 default:
d329a6fb 724 log ("bad irq magic %d", magic);
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725 return 2;
726 }
727}
202a456a 728#endif
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729
730void SB16_init (void)
731{
5e2a6443 732 SB16State *s = &dsp;
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733 int i;
734 static const uint8_t dsp_write_ports[] = {0x6, 0xc};
735 static const uint8_t dsp_read_ports[] = {0x6, 0xa, 0xc, 0xd, 0xe, 0xf};
736
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737 memset(s->mixer_regs, 0xff, sizeof(s->mixer_regs));
738
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739 s->mixer_regs[0x0e] = ~0;
740 s->mixer_regs[0x80] = magic_of_irq (sb.irq);
741 s->mixer_regs[0x81] = 0x20 | (sb.dma << 1);
27503323 742
27503323 743 for (i = 0x30; i < 0x48; i++) {
5e2a6443 744 s->mixer_regs[i] = 0x20;
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745 }
746
747 for (i = 0; i < LENOFA (dsp_write_ports); i++) {
5e2a6443 748 register_ioport_write (sb.port + dsp_write_ports[i], 1, 1, dsp_write, s);
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749 }
750
751 for (i = 0; i < LENOFA (dsp_read_ports); i++) {
5e2a6443 752 register_ioport_read (sb.port + dsp_read_ports[i], 1, 1, dsp_read, s);
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753 }
754
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755 register_ioport_write (sb.port + 0x4, 1, 1, mixer_write_indexb, s);
756 register_ioport_write (sb.port + 0x4, 1, 2, mixer_write_indexw, s);
757 register_ioport_read (sb.port + 0x5, 1, 1, mixer_read, s);
758 register_ioport_write (sb.port + 0x5, 1, 1, mixer_write_datab, s);
27503323 759
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760 DMA_register_channel (sb.hdma, SB_read_DMA, s);
761 DMA_register_channel (sb.dma, SB_read_DMA, s);
27503323 762}
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