[qemu.git] / hw / virtex_ml507.c

/*
 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
 *
 * Copyright (c) 2010 Edgar E. Iglesias.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include "sysbus.h"
#include "hw.h"
#include "pc.h"
#include "net.h"
#include "flash.h"
#include "sysemu.h"
#include "devices.h"
#include "boards.h"
#include "device_tree.h"
#include "loader.h"
#include "elf.h"
#include "qemu-log.h"
#include "exec-memory.h"

#include "ppc.h"
#include "ppc4xx.h"
#include "ppc405.h"

#include "blockdev.h"
#include "xilinx.h"

#define EPAPR_MAGIC    (0x45504150)
#define FLASH_SIZE     (16 * 1024 * 1024)

static struct boot_info
{
    uint32_t bootstrap_pc;
    uint32_t cmdline;
    uint32_t fdt;
    uint32_t ima_size;
    void *vfdt;
} boot_info;

/* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
static void mmubooke_create_initial_mapping(CPUPPCState *env,
                                     target_ulong va,
                                     target_phys_addr_t pa)
{
    ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];

    tlb->attr = 0;
    tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
    tlb->size = 1 << 31; /* up to 0x80000000  */
    tlb->EPN = va & TARGET_PAGE_MASK;
    tlb->RPN = pa & TARGET_PAGE_MASK;
    tlb->PID = 0;

    tlb = &env->tlb.tlbe[1];
    tlb->attr = 0;
    tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
    tlb->size = 1 << 31; /* up to 0xffffffff  */
    tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
    tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
    tlb->PID = 0;
}

static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_size,
                                      int do_init,
                                      const char *cpu_model,
                                      uint32_t sysclk)
{
    PowerPCCPU *cpu;
    CPUPPCState *env;
    qemu_irq *irqs;

    cpu = cpu_ppc_init(cpu_model);
    if (cpu == NULL) {
        fprintf(stderr, "Unable to initialize CPU!\n");
        exit(1);
    }
    env = &cpu->env;

    ppc_booke_timers_init(env, sysclk, 0/* no flags */);

    ppc_dcr_init(env, NULL, NULL);

    /* interrupt controller */
    irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
    irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
    irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
    ppcuic_init(env, irqs, 0x0C0, 0, 1);
    return cpu;
}

static void main_cpu_reset(void *opaque)
{
    PowerPCCPU *cpu = opaque;
    CPUPPCState *env = &cpu->env;
    struct boot_info *bi = env->load_info;

    cpu_reset(CPU(cpu));
    /* Linux Kernel Parameters (passing device tree):
       *   r3: pointer to the fdt
       *   r4: 0
       *   r5: 0
       *   r6: epapr magic
       *   r7: size of IMA in bytes
       *   r8: 0
       *   r9: 0
    */
    env->gpr[1] = (16<<20) - 8;
    /* Provide a device-tree.  */
    env->gpr[3] = bi->fdt;
    env->nip = bi->bootstrap_pc;

    /* Create a mapping for the kernel.  */
    mmubooke_create_initial_mapping(env, 0, 0);
    env->gpr[6] = tswap32(EPAPR_MAGIC);
    env->gpr[7] = bi->ima_size;
}

#define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
static int xilinx_load_device_tree(target_phys_addr_t addr,
                                      uint32_t ramsize,
                                      target_phys_addr_t initrd_base,
                                      target_phys_addr_t initrd_size,
                                      const char *kernel_cmdline)
{
    char *path;
    int fdt_size;
#ifdef CONFIG_FDT
    void *fdt;
    int r;

    /* Try the local "ppc.dtb" override.  */
    fdt = load_device_tree("ppc.dtb", &fdt_size);
    if (!fdt) {
        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
        if (path) {
            fdt = load_device_tree(path, &fdt_size);
            g_free(path);
        }
        if (!fdt) {
            return 0;
        }
    }

    r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
    if (r < 0)
        fprintf(stderr, "couldn't set /chosen/bootargs\n");
    cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
#else
    /* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
       to the kernel.  */
    fdt_size = load_image_targphys("ppc.dtb", addr, 0x10000);
    if (fdt_size < 0) {
        path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
        if (path) {
            fdt_size = load_image_targphys(path, addr, 0x10000);
            g_free(path);
        }
    }

    if (kernel_cmdline) {
        fprintf(stderr,
                "Warning: missing libfdt, cannot pass cmdline to kernel!\n");
    }
#endif
    return fdt_size;
}

static void virtex_init(ram_addr_t ram_size,
                        const char *boot_device,
                        const char *kernel_filename,
                        const char *kernel_cmdline,
                        const char *initrd_filename, const char *cpu_model)
{
    MemoryRegion *address_space_mem = get_system_memory();
    DeviceState *dev;
    PowerPCCPU *cpu;
    CPUPPCState *env;
    target_phys_addr_t ram_base = 0;
    DriveInfo *dinfo;
    MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
    qemu_irq irq[32], *cpu_irq;
    int kernel_size;
    int i;

    /* init CPUs */
    if (cpu_model == NULL) {
        cpu_model = "440-Xilinx";
    }

    cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
    env = &cpu->env;
    qemu_register_reset(main_cpu_reset, cpu);

    memory_region_init_ram(phys_ram, "ram", ram_size);
    vmstate_register_ram_global(phys_ram);
    memory_region_add_subregion(address_space_mem, ram_base, phys_ram);

    dinfo = drive_get(IF_PFLASH, 0, 0);
    pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
                          dinfo ? dinfo->bdrv : NULL, (64 * 1024),
                          FLASH_SIZE >> 16,
                          1, 0x89, 0x18, 0x0000, 0x0, 1);

    cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
    dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0);
    for (i = 0; i < 32; i++) {
        irq[i] = qdev_get_gpio_in(dev, i);
    }

    serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
                   serial_hds[0], DEVICE_LITTLE_ENDIAN);

    /* 2 timers at irq 2 @ 62 Mhz.  */
    xilinx_timer_create(0x83c00000, irq[3], 0, 62 * 1000000);

    if (kernel_filename) {
        uint64_t entry, low, high;
        target_phys_addr_t boot_offset;

        /* Boots a kernel elf binary.  */
        kernel_size = load_elf(kernel_filename, NULL, NULL,
                               &entry, &low, &high, 1, ELF_MACHINE, 0);
        boot_info.bootstrap_pc = entry & 0x00ffffff;

        if (kernel_size < 0) {
            boot_offset = 0x1200000;
            /* If we failed loading ELF's try a raw image.  */
            kernel_size = load_image_targphys(kernel_filename,
                                              boot_offset,
                                              ram_size);
            boot_info.bootstrap_pc = boot_offset;
            high = boot_info.bootstrap_pc + kernel_size + 8192;
        }

        boot_info.ima_size = kernel_size;

        /* Provide a device-tree.  */
        boot_info.fdt = high + (8192 * 2);
        boot_info.fdt &= ~8191;
        xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline);
    }
    env->load_info = &boot_info;
}

static QEMUMachine virtex_machine = {
    .name = "virtex-ml507",
    .desc = "Xilinx Virtex ML507 reference design",
    .init = virtex_init,
};

static void virtex_machine_init(void)
{
    qemu_register_machine(&virtex_machine);
}

machine_init(virtex_machine_init);
Commit	Line	Data
2c50e26e EI	1	/*
	2	* Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
	3	*
	4	* Copyright (c) 2010 Edgar E. Iglesias.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#include "sysbus.h"
	26	#include "hw.h"
	27	#include "pc.h"
	28	#include "net.h"
	29	#include "flash.h"
	30	#include "sysemu.h"
	31	#include "devices.h"
	32	#include "boards.h"
	33	#include "device_tree.h"
	34	#include "loader.h"
	35	#include "elf.h"
	36	#include "qemu-log.h"
39186d8a	37	#include "exec-memory.h"
2c50e26e EI	38
	39	#include "ppc.h"
	40	#include "ppc4xx.h"
2c50e26e EI	41	#include "ppc405.h"
	42
	43	#include "blockdev.h"
	44	#include "xilinx.h"
	45
	46	#define EPAPR_MAGIC (0x45504150)
	47	#define FLASH_SIZE (16 * 1024 * 1024)
	48
	49	static struct boot_info
	50	{
	51	uint32_t bootstrap_pc;
	52	uint32_t cmdline;
	53	uint32_t fdt;
	54	uint32_t ima_size;
	55	void *vfdt;
	56	} boot_info;
	57
	58	/* Create reset TLB entries for BookE, spanning the 32bit addr space. */
e2684c0b	59	static void mmubooke_create_initial_mapping(CPUPPCState *env,
2c50e26e EI	60	target_ulong va,
	61	target_phys_addr_t pa)
	62	{
1c53accc	63	ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
2c50e26e EI	64
	65	tlb->attr = 0;
	66	tlb->prot = PAGE_VALID \| ((PAGE_READ \| PAGE_WRITE \| PAGE_EXEC) << 4);
	67	tlb->size = 1 << 31; /* up to 0x80000000 */
	68	tlb->EPN = va & TARGET_PAGE_MASK;
	69	tlb->RPN = pa & TARGET_PAGE_MASK;
	70	tlb->PID = 0;
	71
1c53accc	72	tlb = &env->tlb.tlbe[1];
2c50e26e EI	73	tlb->attr = 0;
	74	tlb->prot = PAGE_VALID \| ((PAGE_READ \| PAGE_WRITE \| PAGE_EXEC) << 4);
	75	tlb->size = 1 << 31; /* up to 0xffffffff */
	76	tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
	77	tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
	78	tlb->PID = 0;
	79	}
	80
68281699 AF	81	static PowerPCCPU ppc440_init_xilinx(ram_addr_t ram_size,
	82	int do_init,
	83	const char *cpu_model,
	84	uint32_t sysclk)
2c50e26e	85	{
d1d4938b	86	PowerPCCPU *cpu;
e2684c0b	87	CPUPPCState *env;
2c50e26e EI	88	qemu_irq *irqs;
2c50e26e EI	89
d1d4938b AF	90	cpu = cpu_ppc_init(cpu_model);
d1d4938b AF	91	if (cpu == NULL) {
2c50e26e EI	92	fprintf(stderr, "Unable to initialize CPU!\n");
	93	exit(1);
	94	}
d1d4938b	95	env = &cpu->env;
2c50e26e	96
ddd1055b	97	ppc_booke_timers_init(env, sysclk, 0/* no flags */);
2c50e26e EI	98
	99	ppc_dcr_init(env, NULL, NULL);
	100
	101	/* interrupt controller */
7267c094	102	irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB);
2c50e26e EI	103	irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT];
2c50e26e EI	104	irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT];
49a2942d	105	ppcuic_init(env, irqs, 0x0C0, 0, 1);
68281699	106	return cpu;
2c50e26e EI	107	}
	108
	109	static void main_cpu_reset(void *opaque)
	110	{
f8031482 AF	111	PowerPCCPU *cpu = opaque;
f8031482 AF	112	CPUPPCState *env = &cpu->env;
2c50e26e EI	113	struct boot_info *bi = env->load_info;
2c50e26e EI	114
f8031482	115	cpu_reset(CPU(cpu));
2c50e26e EI	116	/* Linux Kernel Parameters (passing device tree):
	117	* r3: pointer to the fdt
	118	* r4: 0
	119	* r5: 0
	120	* r6: epapr magic
	121	* r7: size of IMA in bytes
	122	* r8: 0
	123	* r9: 0
	124	*/
	125	env->gpr[1] = (16<<20) - 8;
	126	/* Provide a device-tree. */
	127	env->gpr[3] = bi->fdt;
	128	env->nip = bi->bootstrap_pc;
	129
	130	/* Create a mapping for the kernel. */
	131	mmubooke_create_initial_mapping(env, 0, 0);
	132	env->gpr[6] = tswap32(EPAPR_MAGIC);
	133	env->gpr[7] = bi->ima_size;
	134	}
	135
	136	#define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
	137	static int xilinx_load_device_tree(target_phys_addr_t addr,
	138	uint32_t ramsize,
	139	target_phys_addr_t initrd_base,
	140	target_phys_addr_t initrd_size,
	141	const char *kernel_cmdline)
	142	{
	143	char *path;
	144	int fdt_size;
	145	#ifdef CONFIG_FDT
	146	void *fdt;
	147	int r;
	148
	149	/* Try the local "ppc.dtb" override. */
	150	fdt = load_device_tree("ppc.dtb", &fdt_size);
	151	if (!fdt) {
	152	path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
	153	if (path) {
	154	fdt = load_device_tree(path, &fdt_size);
7267c094	155	g_free(path);
2c50e26e	156	}
3b2e3dc9	157	if (!fdt) {
2c50e26e	158	return 0;
3b2e3dc9	159	}
2c50e26e EI	160	}
	161
	162	r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline);
	163	if (r < 0)
	164	fprintf(stderr, "couldn't set /chosen/bootargs\n");
	165	cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
	166	#else
	167	/* We lack libfdt so we cannot manipulate the fdt. Just pass on the blob
	168	to the kernel. */
	169	fdt_size = load_image_targphys("ppc.dtb", addr, 0x10000);
	170	if (fdt_size < 0) {
	171	path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
	172	if (path) {
	173	fdt_size = load_image_targphys(path, addr, 0x10000);
7267c094	174	g_free(path);
2c50e26e EI	175	}
	176	}
	177
	178	if (kernel_cmdline) {
	179	fprintf(stderr,
	180	"Warning: missing libfdt, cannot pass cmdline to kernel!\n");
	181	}
	182	#endif
	183	return fdt_size;
	184	}
	185
	186	static void virtex_init(ram_addr_t ram_size,
	187	const char *boot_device,
	188	const char *kernel_filename,
	189	const char *kernel_cmdline,
	190	const char initrd_filename, const char cpu_model)
	191	{
39186d8a	192	MemoryRegion *address_space_mem = get_system_memory();
2c50e26e	193	DeviceState *dev;
68281699	194	PowerPCCPU *cpu;
e2684c0b	195	CPUPPCState *env;
2c50e26e EI	196	target_phys_addr_t ram_base = 0;
2c50e26e EI	197	DriveInfo *dinfo;
333b13fc	198	MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
2c50e26e	199	qemu_irq irq[32], *cpu_irq;
2c50e26e EI	200	int kernel_size;
	201	int i;
	202
	203	/* init CPUs */
	204	if (cpu_model == NULL) {
	205	cpu_model = "440-Xilinx";
	206	}
	207
68281699 AF	208	cpu = ppc440_init_xilinx(&ram_size, 1, cpu_model, 400000000);
68281699 AF	209	env = &cpu->env;
f8031482	210	qemu_register_reset(main_cpu_reset, cpu);
2c50e26e	211
c5705a77 AK	212	memory_region_init_ram(phys_ram, "ram", ram_size);
c5705a77 AK	213	vmstate_register_ram_global(phys_ram);
333b13fc	214	memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
2c50e26e	215
2c50e26e	216	dinfo = drive_get(IF_PFLASH, 0, 0);
cfe5f011	217	pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE,
2c50e26e EI	218	dinfo ? dinfo->bdrv : NULL, (64 * 1024),
2c50e26e EI	219	FLASH_SIZE >> 16,
01e0451a	220	1, 0x89, 0x18, 0x0000, 0x0, 1);
2c50e26e EI	221
	222	cpu_irq = (qemu_irq *) &env->irq_inputs[PPC40x_INPUT_INT];
	223	dev = xilinx_intc_create(0x81800000, cpu_irq[0], 0);
	224	for (i = 0; i < 32; i++) {
	225	irq[i] = qdev_get_gpio_in(dev, i);
	226	}
	227
39186d8a RH	228	serial_mm_init(address_space_mem, 0x83e01003ULL, 2, irq[9], 115200,
39186d8a RH	229	serial_hds[0], DEVICE_LITTLE_ENDIAN);
2c50e26e EI	230
2c50e26e EI	231	/* 2 timers at irq 2 @ 62 Mhz. */
abe098e4	232	xilinx_timer_create(0x83c00000, irq[3], 0, 62 * 1000000);
2c50e26e EI	233
	234	if (kernel_filename) {
	235	uint64_t entry, low, high;
2c50e26e EI	236	target_phys_addr_t boot_offset;
	237
	238	/* Boots a kernel elf binary. */
	239	kernel_size = load_elf(kernel_filename, NULL, NULL,
	240	&entry, &low, &high, 1, ELF_MACHINE, 0);
2c50e26e EI	241	boot_info.bootstrap_pc = entry & 0x00ffffff;
	242
	243	if (kernel_size < 0) {
	244	boot_offset = 0x1200000;
	245	/* If we failed loading ELF's try a raw image. */
	246	kernel_size = load_image_targphys(kernel_filename,
	247	boot_offset,
	248	ram_size);
	249	boot_info.bootstrap_pc = boot_offset;
	250	high = boot_info.bootstrap_pc + kernel_size + 8192;
	251	}
	252
	253	boot_info.ima_size = kernel_size;
	254
	255	/* Provide a device-tree. */
	256	boot_info.fdt = high + (8192 * 2);
	257	boot_info.fdt &= ~8191;
	258	xilinx_load_device_tree(boot_info.fdt, ram_size, 0, 0, kernel_cmdline);
	259	}
	260	env->load_info = &boot_info;
	261	}
	262
	263	static QEMUMachine virtex_machine = {
	264	.name = "virtex-ml507",
	265	.desc = "Xilinx Virtex ML507 reference design",
	266	.init = virtex_init,
	267	};
	268
	269	static void virtex_machine_init(void)
	270	{
	271	qemu_register_machine(&virtex_machine);
	272	}
	273
	274	machine_init(virtex_machine_init);