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6a8b1ae2 EI |
1 | /* |
2 | * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800 | |
3 | * boards. | |
4 | * | |
5 | * Copyright (c) 2009 Edgar E. Iglesias. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #include "sysbus.h" | |
27 | #include "hw.h" | |
28 | #include "net.h" | |
29 | #include "flash.h" | |
30 | #include "sysemu.h" | |
31 | #include "devices.h" | |
32 | #include "boards.h" | |
6a8b1ae2 | 33 | #include "xilinx.h" |
2446333c | 34 | #include "blockdev.h" |
589f0aad | 35 | #include "exec-memory.h" |
6a8b1ae2 | 36 | |
d94e7434 | 37 | #include "microblaze_boot.h" |
b861b741 PC |
38 | #include "microblaze_pic_cpu.h" |
39 | ||
6a8b1ae2 EI |
40 | #define LMB_BRAM_SIZE (128 * 1024) |
41 | #define FLASH_SIZE (16 * 1024 * 1024) | |
42 | ||
6a8b1ae2 | 43 | #define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb" |
409dbce5 | 44 | |
cba1fd36 PC |
45 | #define MEMORY_BASEADDR 0x90000000 |
46 | #define FLASH_BASEADDR 0xa0000000 | |
47 | #define INTC_BASEADDR 0x81800000 | |
48 | #define TIMER_BASEADDR 0x83c00000 | |
49 | #define UARTLITE_BASEADDR 0x84000000 | |
50 | #define ETHLITE_BASEADDR 0x81000000 | |
51 | ||
bf494367 | 52 | static void machine_cpu_reset(MicroBlazeCPU *cpu) |
1f28fac8 | 53 | { |
bf494367 AF |
54 | CPUMBState *env = &cpu->env; |
55 | ||
1f28fac8 PC |
56 | env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */ |
57 | } | |
58 | ||
6a8b1ae2 | 59 | static void |
c227f099 | 60 | petalogix_s3adsp1800_init(ram_addr_t ram_size, |
6a8b1ae2 EI |
61 | const char *boot_device, |
62 | const char *kernel_filename, | |
63 | const char *kernel_cmdline, | |
64 | const char *initrd_filename, const char *cpu_model) | |
65 | { | |
66 | DeviceState *dev; | |
3ed60733 | 67 | MicroBlazeCPU *cpu; |
ee118507 | 68 | CPUMBState *env; |
751c6a17 | 69 | DriveInfo *dinfo; |
6a8b1ae2 | 70 | int i; |
cba1fd36 | 71 | target_phys_addr_t ddr_base = MEMORY_BASEADDR; |
589f0aad AK |
72 | MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1); |
73 | MemoryRegion *phys_ram = g_new(MemoryRegion, 1); | |
6a8b1ae2 | 74 | qemu_irq irq[32], *cpu_irq; |
589f0aad | 75 | MemoryRegion *sysmem = get_system_memory(); |
6a8b1ae2 EI |
76 | |
77 | /* init CPUs */ | |
78 | if (cpu_model == NULL) { | |
79 | cpu_model = "microblaze"; | |
80 | } | |
3ed60733 AF |
81 | cpu = cpu_mb_init(cpu_model); |
82 | env = &cpu->env; | |
6a8b1ae2 | 83 | |
6a8b1ae2 | 84 | /* Attach emulated BRAM through the LMB. */ |
c5705a77 | 85 | memory_region_init_ram(phys_lmb_bram, |
589f0aad | 86 | "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE); |
c5705a77 | 87 | vmstate_register_ram_global(phys_lmb_bram); |
589f0aad | 88 | memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram); |
6a8b1ae2 | 89 | |
c5705a77 AK |
90 | memory_region_init_ram(phys_ram, "petalogix_s3adsp1800.ram", ram_size); |
91 | vmstate_register_ram_global(phys_ram); | |
589f0aad | 92 | memory_region_add_subregion(sysmem, ddr_base, phys_ram); |
6a8b1ae2 | 93 | |
751c6a17 | 94 | dinfo = drive_get(IF_PFLASH, 0, 0); |
cba1fd36 | 95 | pflash_cfi01_register(FLASH_BASEADDR, |
cfe5f011 | 96 | NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE, |
751c6a17 | 97 | dinfo ? dinfo->bdrv : NULL, (64 * 1024), |
6a8b1ae2 | 98 | FLASH_SIZE >> 16, |
01e0451a | 99 | 1, 0x89, 0x18, 0x0000, 0x0, 1); |
6a8b1ae2 EI |
100 | |
101 | cpu_irq = microblaze_pic_init_cpu(env); | |
cba1fd36 | 102 | dev = xilinx_intc_create(INTC_BASEADDR, cpu_irq[0], 2); |
6a8b1ae2 EI |
103 | for (i = 0; i < 32; i++) { |
104 | irq[i] = qdev_get_gpio_in(dev, i); | |
105 | } | |
106 | ||
23d6055e | 107 | sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR, irq[3]); |
6a8b1ae2 | 108 | /* 2 timers at irq 2 @ 62 Mhz. */ |
abe098e4 | 109 | xilinx_timer_create(TIMER_BASEADDR, irq[0], 0, 62 * 1000000); |
cba1fd36 | 110 | xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0); |
6a8b1ae2 | 111 | |
bf494367 | 112 | microblaze_load_kernel(cpu, ddr_base, ram_size, |
1f28fac8 | 113 | BINARY_DEVICE_TREE_FILE, machine_cpu_reset); |
6a8b1ae2 EI |
114 | } |
115 | ||
116 | static QEMUMachine petalogix_s3adsp1800_machine = { | |
117 | .name = "petalogix-s3adsp1800", | |
73ad9e62 | 118 | .desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800", |
6a8b1ae2 EI |
119 | .init = petalogix_s3adsp1800_init, |
120 | .is_default = 1 | |
121 | }; | |
122 | ||
123 | static void petalogix_s3adsp1800_machine_init(void) | |
124 | { | |
125 | qemu_register_machine(&petalogix_s3adsp1800_machine); | |
126 | } | |
127 | ||
128 | machine_init(petalogix_s3adsp1800_machine_init); |