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[qemu.git] / hw / net / vmxnet3_defs.h
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1/*
2 * QEMU VMWARE VMXNET3 paravirtual NIC
3 *
4 * Copyright (c) 2012 Ravello Systems LTD (http://ravellosystems.com)
5 *
6 * Developed by Daynix Computing LTD (http://www.daynix.com)
7 *
8 * Authors:
9 * Dmitry Fleytman <[email protected]>
10 * Tamir Shomer <[email protected]>
11 * Yan Vugenfirer <[email protected]>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2.
14 * See the COPYING file in the top-level directory.
15 *
16 */
17
18#include "net/net.h"
19#include "hw/net/vmxnet3.h"
20
21#define TYPE_VMXNET3 "vmxnet3"
22#define VMXNET3(obj) OBJECT_CHECK(VMXNET3State, (obj), TYPE_VMXNET3)
23
24/* Device state and helper functions */
25#define VMXNET3_RX_RINGS_PER_QUEUE (2)
26
27/* Cyclic ring abstraction */
28typedef struct {
29 hwaddr pa;
30 uint32_t size;
31 uint32_t cell_size;
32 uint32_t next;
33 uint8_t gen;
34} Vmxnet3Ring;
35
36typedef struct {
37 Vmxnet3Ring tx_ring;
38 Vmxnet3Ring comp_ring;
39
40 uint8_t intr_idx;
41 hwaddr tx_stats_pa;
42 struct UPT1_TxStats txq_stats;
43} Vmxnet3TxqDescr;
44
45typedef struct {
46 Vmxnet3Ring rx_ring[VMXNET3_RX_RINGS_PER_QUEUE];
47 Vmxnet3Ring comp_ring;
48 uint8_t intr_idx;
49 hwaddr rx_stats_pa;
50 struct UPT1_RxStats rxq_stats;
51} Vmxnet3RxqDescr;
52
53typedef struct {
54 bool is_masked;
55 bool is_pending;
56 bool is_asserted;
57} Vmxnet3IntState;
58
59typedef struct {
60 PCIDevice parent_obj;
61 NICState *nic;
62 NICConf conf;
63 MemoryRegion bar0;
64 MemoryRegion bar1;
65 MemoryRegion msix_bar;
66
67 Vmxnet3RxqDescr rxq_descr[VMXNET3_DEVICE_MAX_RX_QUEUES];
68 Vmxnet3TxqDescr txq_descr[VMXNET3_DEVICE_MAX_TX_QUEUES];
69
70 /* Whether MSI-X support was installed successfully */
71 bool msix_used;
72 hwaddr drv_shmem;
73 hwaddr temp_shared_guest_driver_memory;
74
75 uint8_t txq_num;
76
77 /* This boolean tells whether RX packet being indicated has to */
78 /* be split into head and body chunks from different RX rings */
79 bool rx_packets_compound;
80
81 bool rx_vlan_stripping;
82 bool lro_supported;
83
84 uint8_t rxq_num;
85
86 /* Network MTU */
87 uint32_t mtu;
88
89 /* Maximum number of fragments for indicated TX packets */
90 uint32_t max_tx_frags;
91
92 /* Maximum number of fragments for indicated RX packets */
93 uint16_t max_rx_frags;
94
95 /* Index for events interrupt */
96 uint8_t event_int_idx;
97
98 /* Whether automatic interrupts masking enabled */
99 bool auto_int_masking;
100
101 bool peer_has_vhdr;
102
103 /* TX packets to QEMU interface */
104 struct NetTxPkt *tx_pkt;
105 uint32_t offload_mode;
106 uint32_t cso_or_gso_size;
107 uint16_t tci;
108 bool needs_vlan;
109
110 struct NetRxPkt *rx_pkt;
111
112 bool tx_sop;
113 bool skip_current_tx_pkt;
114
115 uint32_t device_active;
116 uint32_t last_command;
117
118 uint32_t link_status_and_speed;
119
120 Vmxnet3IntState interrupt_states[VMXNET3_MAX_INTRS];
121
122 uint32_t temp_mac; /* To store the low part first */
123
124 MACAddr perm_mac;
125 uint32_t vlan_table[VMXNET3_VFT_SIZE];
126 uint32_t rx_mode;
127 MACAddr *mcast_list;
128 uint32_t mcast_list_len;
129 uint32_t mcast_list_buff_size; /* needed for live migration. */
130
131 /* Compatibility flags for migration */
132 uint32_t compat_flags;
133} VMXNET3State;
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