[qemu.git] / hw / arm / bcm2835_peripherals.c

/*
 * Raspberry Pi emulation (c) 2012 Gregory Estrade
 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
 *
 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
 * Written by Andrew Baumann
 *
 * This code is licensed under the GNU GPLv2 and later.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/arm/bcm2835_peripherals.h"
#include "hw/misc/bcm2835_mbox_defs.h"
#include "hw/arm/raspi_platform.h"
#include "sysemu/char.h"
#include "sysemu/sysemu.h"

/* Peripheral base address on the VC (GPU) system bus */
#define BCM2835_VC_PERI_BASE 0x7e000000

/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
#define BCM2835_SDHC_CAPAREG 0x52034b4

static void bcm2835_peripherals_init(Object *obj)
{
    BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);

    /* Memory region for peripheral devices, which we export to our parent */
    memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
    object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL);
    sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);

    /* Internal memory region for peripheral bus addresses (not exported) */
    memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
    object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL);

    /* Internal memory region for request/response communication with
     * mailbox-addressable peripherals (not exported)
     */
    memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
                       MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);

    /* Interrupt Controller */
    object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
    object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL);
    qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default());

    /* UART0 */
    s->uart0 = SYS_BUS_DEVICE(object_new("pl011"));
    object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL);
    qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default());

    /* AUX / UART1 */
    object_initialize(&s->aux, sizeof(s->aux), TYPE_BCM2835_AUX);
    object_property_add_child(obj, "aux", OBJECT(&s->aux), NULL);
    qdev_set_parent_bus(DEVICE(&s->aux), sysbus_get_default());

    /* Mailboxes */
    object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX);
    object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL);
    qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default());

    object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
                                   OBJECT(&s->mbox_mr), &error_abort);

    /* Framebuffer */
    object_initialize(&s->fb, sizeof(s->fb), TYPE_BCM2835_FB);
    object_property_add_child(obj, "fb", OBJECT(&s->fb), NULL);
    object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size",
                              &error_abort);
    qdev_set_parent_bus(DEVICE(&s->fb), sysbus_get_default());

    object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
                                   OBJECT(&s->gpu_bus_mr), &error_abort);

    /* Property channel */
    object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY);
    object_property_add_child(obj, "property", OBJECT(&s->property), NULL);
    object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
                              "board-rev", &error_abort);
    qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default());

    object_property_add_const_link(OBJECT(&s->property), "fb",
                                   OBJECT(&s->fb), &error_abort);
    object_property_add_const_link(OBJECT(&s->property), "dma-mr",
                                   OBJECT(&s->gpu_bus_mr), &error_abort);

    /* Extended Mass Media Controller */
    object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI);
    object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL);
    qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default());

    /* DMA Channels */
    object_initialize(&s->dma, sizeof(s->dma), TYPE_BCM2835_DMA);
    object_property_add_child(obj, "dma", OBJECT(&s->dma), NULL);
    qdev_set_parent_bus(DEVICE(&s->dma), sysbus_get_default());

    object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
                                   OBJECT(&s->gpu_bus_mr), &error_abort);
}

static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
{
    BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
    Object *obj;
    MemoryRegion *ram;
    Error *err = NULL;
    uint32_t ram_size, vcram_size;
    int n;

    obj = object_property_get_link(OBJECT(dev), "ram", &err);
    if (obj == NULL) {
        error_setg(errp, "%s: required ram link not found: %s",
                   __func__, error_get_pretty(err));
        return;
    }

    ram = MEMORY_REGION(obj);
    ram_size = memory_region_size(ram);

    /* Map peripherals and RAM into the GPU address space. */
    memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
                             "bcm2835-peripherals", &s->peri_mr, 0,
                             memory_region_size(&s->peri_mr));

    memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
                                        &s->peri_mr_alias, 1);

    /* RAM is aliased four times (different cache configurations) on the GPU */
    for (n = 0; n < 4; n++) {
        memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
                                 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
        memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
                                            &s->ram_alias[n], 0);
    }

    /* Interrupt Controller */
    object_property_set_bool(OBJECT(&s->ic), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
    sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));

    /* UART0 */
    qdev_prop_set_chr(DEVICE(s->uart0), "chardev", serial_hds[0]);
    object_property_set_bool(OBJECT(s->uart0), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
                                sysbus_mmio_get_region(s->uart0, 0));
    sysbus_connect_irq(s->uart0, 0,
        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
                               INTERRUPT_UART));
    /* AUX / UART1 */
    qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hds[1]);

    object_property_set_bool(OBJECT(&s->aux), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, UART1_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
                               INTERRUPT_AUX));

    /* Mailboxes */
    object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
                               INTERRUPT_ARM_MAILBOX));

    /* Framebuffer */
    vcram_size = (uint32_t)object_property_get_int(OBJECT(s), "vcram-size",
                                                   &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    object_property_set_int(OBJECT(&s->fb), ram_size - vcram_size,
                            "vcram-base", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    object_property_set_bool(OBJECT(&s->fb), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
                       qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));

    /* Property channel */
    object_property_set_bool(OBJECT(&s->property), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->mbox_mr,
                MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
                      qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));

    /* Extended Mass Media Controller */
    object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg",
                            &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    object_property_set_bool(OBJECT(&s->sdhci), true, "pending-insert-quirk",
                             &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
    sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
        qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
                               INTERRUPT_ARASANSDIO));
    object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->sdhci), "sd-bus",
                              &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    /* DMA Channels */
    object_property_set_bool(OBJECT(&s->dma), true, "realized", &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }

    memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
    memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
                sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));

    for (n = 0; n <= 12; n++) {
        sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
                           qdev_get_gpio_in_named(DEVICE(&s->ic),
                                                  BCM2835_IC_GPU_IRQ,
                                                  INTERRUPT_DMA0 + n));
    }
}

static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(oc);

    dc->realize = bcm2835_peripherals_realize;
}

static const TypeInfo bcm2835_peripherals_type_info = {
    .name = TYPE_BCM2835_PERIPHERALS,
    .parent = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(BCM2835PeripheralState),
    .instance_init = bcm2835_peripherals_init,
    .class_init = bcm2835_peripherals_class_init,
};

static void bcm2835_peripherals_register_types(void)
{
    type_register_static(&bcm2835_peripherals_type_info);
}

type_init(bcm2835_peripherals_register_types)
Commit	Line	Data
7c62aeb8 AB	1	/*
	2	* Raspberry Pi emulation (c) 2012 Gregory Estrade
	3	* Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
	4	*
	5	* Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
	6	* Written by Andrew Baumann
	7	*
	8	* This code is licensed under the GNU GPLv2 and later.
	9	*/
	10
c964b660	11	#include "qemu/osdep.h"
da34e65c	12	#include "qapi/error.h"
7c62aeb8 AB	13	#include "hw/arm/bcm2835_peripherals.h"
	14	#include "hw/misc/bcm2835_mbox_defs.h"
	15	#include "hw/arm/raspi_platform.h"
97398d90	16	#include "sysemu/char.h"
f0d1d2c1	17	#include "sysemu/sysemu.h"
7c62aeb8 AB	18
	19	/* Peripheral base address on the VC (GPU) system bus */
	20	#define BCM2835_VC_PERI_BASE 0x7e000000
	21
	22	/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
	23	#define BCM2835_SDHC_CAPAREG 0x52034b4
	24
	25	static void bcm2835_peripherals_init(Object *obj)
	26	{
	27	BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
	28
	29	/* Memory region for peripheral devices, which we export to our parent */
	30	memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
	31	object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL);
	32	sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
	33
	34	/* Internal memory region for peripheral bus addresses (not exported) */
	35	memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
	36	object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL);
	37
	38	/* Internal memory region for request/response communication with
	39	* mailbox-addressable peripherals (not exported)
	40	*/
	41	memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
	42	MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
	43
	44	/* Interrupt Controller */
	45	object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
	46	object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL);
	47	qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default());
	48
	49	/* UART0 */
	50	s->uart0 = SYS_BUS_DEVICE(object_new("pl011"));
	51	object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL);
	52	qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default());
	53
97398d90 AB	54	/* AUX / UART1 */
	55	object_initialize(&s->aux, sizeof(s->aux), TYPE_BCM2835_AUX);
	56	object_property_add_child(obj, "aux", OBJECT(&s->aux), NULL);
	57	qdev_set_parent_bus(DEVICE(&s->aux), sysbus_get_default());
	58
7c62aeb8 AB	59	/* Mailboxes */
	60	object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX);
	61	object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL);
	62	qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default());
	63
	64	object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
	65	OBJECT(&s->mbox_mr), &error_abort);
	66
5e9c2a8d GE	67	/* Framebuffer */
	68	object_initialize(&s->fb, sizeof(s->fb), TYPE_BCM2835_FB);
	69	object_property_add_child(obj, "fb", OBJECT(&s->fb), NULL);
	70	object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size",
	71	&error_abort);
	72	qdev_set_parent_bus(DEVICE(&s->fb), sysbus_get_default());
	73
	74	object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
	75	OBJECT(&s->gpu_bus_mr), &error_abort);
	76
7c62aeb8 AB	77	/* Property channel */
	78	object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY);
	79	object_property_add_child(obj, "property", OBJECT(&s->property), NULL);
f0afa731 SW	80	object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
f0afa731 SW	81	"board-rev", &error_abort);
7c62aeb8 AB	82	qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default());
7c62aeb8 AB	83
355a8ccc GE	84	object_property_add_const_link(OBJECT(&s->property), "fb",
355a8ccc GE	85	OBJECT(&s->fb), &error_abort);
7c62aeb8 AB	86	object_property_add_const_link(OBJECT(&s->property), "dma-mr",
	87	OBJECT(&s->gpu_bus_mr), &error_abort);
	88
	89	/* Extended Mass Media Controller */
	90	object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI);
	91	object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL);
	92	qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default());
6717f587 GE	93
	94	/* DMA Channels */
	95	object_initialize(&s->dma, sizeof(s->dma), TYPE_BCM2835_DMA);
	96	object_property_add_child(obj, "dma", OBJECT(&s->dma), NULL);
	97	qdev_set_parent_bus(DEVICE(&s->dma), sysbus_get_default());
	98
	99	object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
	100	OBJECT(&s->gpu_bus_mr), &error_abort);
7c62aeb8 AB	101	}
	102
	103	static void bcm2835_peripherals_realize(DeviceState dev, Error *errp)
	104	{
	105	BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
	106	Object *obj;
	107	MemoryRegion *ram;
	108	Error *err = NULL;
5e9c2a8d	109	uint32_t ram_size, vcram_size;
7c62aeb8 AB	110	int n;
	111
	112	obj = object_property_get_link(OBJECT(dev), "ram", &err);
	113	if (obj == NULL) {
	114	error_setg(errp, "%s: required ram link not found: %s",
	115	__func__, error_get_pretty(err));
	116	return;
	117	}
	118
	119	ram = MEMORY_REGION(obj);
	120	ram_size = memory_region_size(ram);
	121
	122	/* Map peripherals and RAM into the GPU address space. */
	123	memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
	124	"bcm2835-peripherals", &s->peri_mr, 0,
	125	memory_region_size(&s->peri_mr));
	126
	127	memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
	128	&s->peri_mr_alias, 1);
	129
	130	/* RAM is aliased four times (different cache configurations) on the GPU */
	131	for (n = 0; n < 4; n++) {
	132	memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
	133	"bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
	134	memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
	135	&s->ram_alias[n], 0);
	136	}
	137
	138	/* Interrupt Controller */
	139	object_property_set_bool(OBJECT(&s->ic), true, "realized", &err);
	140	if (err) {
	141	error_propagate(errp, err);
	142	return;
	143	}
	144
	145	memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
	146	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
	147	sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
	148
	149	/* UART0 */
f0d1d2c1	150	qdev_prop_set_chr(DEVICE(s->uart0), "chardev", serial_hds[0]);
7c62aeb8 AB	151	object_property_set_bool(OBJECT(s->uart0), true, "realized", &err);
	152	if (err) {
	153	error_propagate(errp, err);
	154	return;
	155	}
	156
	157	memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
	158	sysbus_mmio_get_region(s->uart0, 0));
	159	sysbus_connect_irq(s->uart0, 0,
	160	qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
	161	INTERRUPT_UART));
97398d90	162	/* AUX / UART1 */
f0d1d2c1	163	qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hds[1]);
97398d90 AB	164
	165	object_property_set_bool(OBJECT(&s->aux), true, "realized", &err);
	166	if (err) {
	167	error_propagate(errp, err);
	168	return;
	169	}
	170
	171	memory_region_add_subregion(&s->peri_mr, UART1_OFFSET,
	172	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
	173	sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
	174	qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
	175	INTERRUPT_AUX));
	176
7c62aeb8 AB	177	/* Mailboxes */
	178	object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err);
	179	if (err) {
	180	error_propagate(errp, err);
	181	return;
	182	}
	183
	184	memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
	185	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
	186	sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
	187	qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
	188	INTERRUPT_ARM_MAILBOX));
	189
5e9c2a8d GE	190	/* Framebuffer */
	191	vcram_size = (uint32_t)object_property_get_int(OBJECT(s), "vcram-size",
	192	&err);
	193	if (err) {
	194	error_propagate(errp, err);
	195	return;
	196	}
	197
	198	object_property_set_int(OBJECT(&s->fb), ram_size - vcram_size,
	199	"vcram-base", &err);
	200	if (err) {
	201	error_propagate(errp, err);
	202	return;
	203	}
	204
	205	object_property_set_bool(OBJECT(&s->fb), true, "realized", &err);
	206	if (err) {
	207	error_propagate(errp, err);
	208	return;
	209	}
	210
	211	memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
	212	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
	213	sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
	214	qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
	215
7c62aeb8	216	/* Property channel */
7c62aeb8 AB	217	object_property_set_bool(OBJECT(&s->property), true, "realized", &err);
	218	if (err) {
	219	error_propagate(errp, err);
	220	return;
	221	}
	222
	223	memory_region_add_subregion(&s->mbox_mr,
	224	MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
	225	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
	226	sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
	227	qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
	228
	229	/* Extended Mass Media Controller */
	230	object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg",
	231	&err);
	232	if (err) {
	233	error_propagate(errp, err);
	234	return;
	235	}
	236
a2a8dfa8 AB	237	object_property_set_bool(OBJECT(&s->sdhci), true, "pending-insert-quirk",
	238	&err);
	239	if (err) {
	240	error_propagate(errp, err);
	241	return;
	242	}
	243
7c62aeb8 AB	244	object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err);
	245	if (err) {
	246	error_propagate(errp, err);
	247	return;
	248	}
	249
	250	memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
	251	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
	252	sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
	253	qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
	254	INTERRUPT_ARASANSDIO));
a55b53a2 AB	255	object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->sdhci), "sd-bus",
	256	&err);
	257	if (err) {
	258	error_propagate(errp, err);
	259	return;
	260	}
	261
6717f587 GE	262	/* DMA Channels */
	263	object_property_set_bool(OBJECT(&s->dma), true, "realized", &err);
	264	if (err) {
	265	error_propagate(errp, err);
	266	return;
	267	}
	268
	269	memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
	270	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
	271	memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
	272	sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
	273
	274	for (n = 0; n <= 12; n++) {
	275	sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
	276	qdev_get_gpio_in_named(DEVICE(&s->ic),
	277	BCM2835_IC_GPU_IRQ,
	278	INTERRUPT_DMA0 + n));
	279	}
7c62aeb8 AB	280	}
	281
	282	static void bcm2835_peripherals_class_init(ObjectClass oc, void data)
	283	{
	284	DeviceClass *dc = DEVICE_CLASS(oc);
	285
	286	dc->realize = bcm2835_peripherals_realize;
	287	}
	288
	289	static const TypeInfo bcm2835_peripherals_type_info = {
	290	.name = TYPE_BCM2835_PERIPHERALS,
	291	.parent = TYPE_SYS_BUS_DEVICE,
	292	.instance_size = sizeof(BCM2835PeripheralState),
	293	.instance_init = bcm2835_peripherals_init,
	294	.class_init = bcm2835_peripherals_class_init,
	295	};
	296
	297	static void bcm2835_peripherals_register_types(void)
	298	{
	299	type_register_static(&bcm2835_peripherals_type_info);
	300	}
	301
	302	type_init(bcm2835_peripherals_register_types)