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0ff596d0 PB |
1 | #ifndef QEMU_I2C_H |
2 | #define QEMU_I2C_H | |
3 | ||
fe8de492 PB |
4 | #include "qdev.h" |
5 | ||
0ff596d0 PB |
6 | /* The QEMU I2C implementation only supports simple transfers that complete |
7 | immediately. It does not support slave devices that need to be able to | |
8 | defer their response (eg. CPU slave interfaces where the data is supplied | |
9 | by the device driver in response to an interrupt). */ | |
10 | ||
11 | enum i2c_event { | |
12 | I2C_START_RECV, | |
13 | I2C_START_SEND, | |
14 | I2C_FINISH, | |
aa1f17c1 | 15 | I2C_NACK /* Masker NACKed a receive byte. */ |
0ff596d0 PB |
16 | }; |
17 | ||
9e07bdf8 AL |
18 | typedef struct I2CSlave I2CSlave; |
19 | ||
b5ea9327 AL |
20 | #define TYPE_I2C_SLAVE "i2c-slave" |
21 | #define I2C_SLAVE(obj) \ | |
22 | OBJECT_CHECK(I2CSlave, (obj), TYPE_I2C_SLAVE) | |
23 | #define I2C_SLAVE_CLASS(klass) \ | |
24 | OBJECT_CLASS_CHECK(I2CSlaveClass, (klass), TYPE_I2C_SLAVE) | |
25 | #define I2C_SLAVE_GET_CLASS(obj) \ | |
26 | OBJECT_GET_CLASS(I2CSlaveClass, (obj), TYPE_I2C_SLAVE) | |
0ff596d0 | 27 | |
b5ea9327 AL |
28 | typedef struct I2CSlaveClass |
29 | { | |
30 | DeviceClass parent_class; | |
02e2da45 | 31 | |
fe8de492 | 32 | /* Callbacks provided by the device. */ |
b5ea9327 AL |
33 | int (*init)(I2CSlave *dev); |
34 | ||
35 | /* Master to slave. */ | |
36 | int (*send)(I2CSlave *s, uint8_t data); | |
37 | ||
38 | /* Slave to master. */ | |
39 | int (*recv)(I2CSlave *s); | |
40 | ||
41 | /* Notify the slave of a bus state change. */ | |
42 | void (*event)(I2CSlave *s, enum i2c_event event); | |
43 | } I2CSlaveClass; | |
fe8de492 | 44 | |
9e07bdf8 | 45 | struct I2CSlave |
0ff596d0 | 46 | { |
fe8de492 | 47 | DeviceState qdev; |
0ff596d0 PB |
48 | |
49 | /* Remaining fields for internal use by the I2C code. */ | |
5b7f5327 | 50 | uint8_t address; |
0ff596d0 PB |
51 | }; |
52 | ||
02e2da45 | 53 | i2c_bus *i2c_init_bus(DeviceState *parent, const char *name); |
9e07bdf8 | 54 | void i2c_set_slave_address(I2CSlave *dev, uint8_t address); |
0ff596d0 | 55 | int i2c_bus_busy(i2c_bus *bus); |
5b7f5327 | 56 | int i2c_start_transfer(i2c_bus *bus, uint8_t address, int recv); |
0ff596d0 PB |
57 | void i2c_end_transfer(i2c_bus *bus); |
58 | void i2c_nack(i2c_bus *bus); | |
59 | int i2c_send(i2c_bus *bus, uint8_t data); | |
60 | int i2c_recv(i2c_bus *bus); | |
61 | ||
9e07bdf8 | 62 | #define I2C_SLAVE_FROM_QDEV(dev) DO_UPCAST(I2CSlave, qdev, dev) |
fe8de492 PB |
63 | #define FROM_I2C_SLAVE(type, dev) DO_UPCAST(type, i2c, dev) |
64 | ||
5b7f5327 | 65 | DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, uint8_t addr); |
fe8de492 | 66 | |
adb86c37 | 67 | /* wm8750.c */ |
cdbe40ca | 68 | void wm8750_data_req_set(DeviceState *dev, |
adb86c37 AZ |
69 | void (*data_req)(void *, int, int), void *opaque); |
70 | void wm8750_dac_dat(void *opaque, uint32_t sample); | |
71 | uint32_t wm8750_adc_dat(void *opaque); | |
662caa6f AZ |
72 | void *wm8750_dac_buffer(void *opaque, int samples); |
73 | void wm8750_dac_commit(void *opaque); | |
b0f74c87 | 74 | void wm8750_set_bclk_in(void *opaque, int new_hz); |
adb86c37 | 75 | |
7e7c5e4c | 76 | /* tmp105.c */ |
9e07bdf8 | 77 | void tmp105_set(I2CSlave *i2c, int temp); |
7e7c5e4c | 78 | |
1d4e547b | 79 | /* lm832x.c */ |
c4f05c8c | 80 | void lm832x_key_event(DeviceState *dev, int key, int state); |
1d4e547b | 81 | |
701a8f76 PB |
82 | extern const VMStateDescription vmstate_i2c_slave; |
83 | ||
84 | #define VMSTATE_I2C_SLAVE(_field, _state) { \ | |
85 | .name = (stringify(_field)), \ | |
9e07bdf8 | 86 | .size = sizeof(I2CSlave), \ |
701a8f76 PB |
87 | .vmsd = &vmstate_i2c_slave, \ |
88 | .flags = VMS_STRUCT, \ | |
9e07bdf8 | 89 | .offset = vmstate_offset_value(_state, _field, I2CSlave), \ |
701a8f76 PB |
90 | } |
91 | ||
0ff596d0 | 92 | #endif |