[qemu.git] / hw / display / milkymist-vgafb.c


/*
 *  QEMU model of the Milkymist VGA framebuffer.
 *
 *  Copyright (c) 2010-2012 Michael Walle <[email protected]>
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 *
 *
 * Specification available at:
 *   http://www.milkymist.org/socdoc/vgafb.pdf
 */

#include "hw/hw.h"
#include "hw/sysbus.h"
#include "trace.h"
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
#include "qemu/error-report.h"

#define BITS 8
#include "milkymist-vgafb_template.h"
#define BITS 15
#include "milkymist-vgafb_template.h"
#define BITS 16
#include "milkymist-vgafb_template.h"
#define BITS 24
#include "milkymist-vgafb_template.h"
#define BITS 32
#include "milkymist-vgafb_template.h"

enum {
    R_CTRL = 0,
    R_HRES,
    R_HSYNC_START,
    R_HSYNC_END,
    R_HSCAN,
    R_VRES,
    R_VSYNC_START,
    R_VSYNC_END,
    R_VSCAN,
    R_BASEADDRESS,
    R_BASEADDRESS_ACT,
    R_BURST_COUNT,
    R_DDC,
    R_SOURCE_CLOCK,
    R_MAX
};

enum {
    CTRL_RESET = (1<<0),
};

#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
#define MILKYMIST_VGAFB(obj) \
    OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)

struct MilkymistVgafbState {
    SysBusDevice parent_obj;

    MemoryRegion regs_region;
    QemuConsole *con;

    int invalidate;
    uint32_t fb_offset;
    uint32_t fb_mask;

    uint32_t regs[R_MAX];
};
typedef struct MilkymistVgafbState MilkymistVgafbState;

static int vgafb_enabled(MilkymistVgafbState *s)
{
    return !(s->regs[R_CTRL] & CTRL_RESET);
}

static void vgafb_update_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    SysBusDevice *sbd;
    DisplaySurface *surface = qemu_console_surface(s->con);
    int first = 0;
    int last = 0;
    drawfn fn;

    if (!vgafb_enabled(s)) {
        return;
    }

    sbd = SYS_BUS_DEVICE(s);
    int dest_width = s->regs[R_HRES];

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 8:
        fn = draw_line_8;
        break;
    case 15:
        fn = draw_line_15;
        dest_width *= 2;
        break;
    case 16:
        fn = draw_line_16;
        dest_width *= 2;
        break;
    case 24:
        fn = draw_line_24;
        dest_width *= 3;
        break;
    case 32:
        fn = draw_line_32;
        dest_width *= 4;
        break;
    default:
        hw_error("milkymist_vgafb: bad color depth\n");
        break;
    }

    framebuffer_update_display(surface, sysbus_address_space(sbd),
                               s->regs[R_BASEADDRESS] + s->fb_offset,
                               s->regs[R_HRES],
                               s->regs[R_VRES],
                               s->regs[R_HRES] * 2,
                               dest_width,
                               0,
                               s->invalidate,
                               fn,
                               NULL,
                               &first, &last);

    if (first >= 0) {
        dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
    }
    s->invalidate = 0;
}

static void vgafb_invalidate_display(void *opaque)
{
    MilkymistVgafbState *s = opaque;
    s->invalidate = 1;
}

static void vgafb_resize(MilkymistVgafbState *s)
{
    if (!vgafb_enabled(s)) {
        return;
    }

    qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
    s->invalidate = 1;
}

static uint64_t vgafb_read(void *opaque, hwaddr addr,
                           unsigned size)
{
    MilkymistVgafbState *s = opaque;
    uint32_t r = 0;

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
    case R_HRES:
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VRES:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BASEADDRESS:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        r = s->regs[addr];
    break;
    case R_BASEADDRESS_ACT:
        r = s->regs[R_BASEADDRESS];
    break;

    default:
        error_report("milkymist_vgafb: read access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }

    trace_milkymist_vgafb_memory_read(addr << 2, r);

    return r;
}

static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
                        unsigned size)
{
    MilkymistVgafbState *s = opaque;

    trace_milkymist_vgafb_memory_write(addr, value);

    addr >>= 2;
    switch (addr) {
    case R_CTRL:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_HSYNC_START:
    case R_HSYNC_END:
    case R_HSCAN:
    case R_VSYNC_START:
    case R_VSYNC_END:
    case R_VSCAN:
    case R_BURST_COUNT:
    case R_DDC:
    case R_SOURCE_CLOCK:
        s->regs[addr] = value;
        break;
    case R_BASEADDRESS:
        if (value & 0x1f) {
            error_report("milkymist_vgafb: framebuffer base address have to "
                     "be 32 byte aligned");
            break;
        }
        s->regs[addr] = value & s->fb_mask;
        s->invalidate = 1;
        break;
    case R_HRES:
    case R_VRES:
        s->regs[addr] = value;
        vgafb_resize(s);
        break;
    case R_BASEADDRESS_ACT:
        error_report("milkymist_vgafb: write to read-only register 0x"
                TARGET_FMT_plx, addr << 2);
        break;

    default:
        error_report("milkymist_vgafb: write access to unknown register 0x"
                TARGET_FMT_plx, addr << 2);
        break;
    }
}

static const MemoryRegionOps vgafb_mmio_ops = {
    .read = vgafb_read,
    .write = vgafb_write,
    .valid = {
        .min_access_size = 4,
        .max_access_size = 4,
    },
    .endianness = DEVICE_NATIVE_ENDIAN,
};

static void milkymist_vgafb_reset(DeviceState *d)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
    int i;

    for (i = 0; i < R_MAX; i++) {
        s->regs[i] = 0;
    }

    /* defaults */
    s->regs[R_CTRL] = CTRL_RESET;
    s->regs[R_HRES] = 640;
    s->regs[R_VRES] = 480;
    s->regs[R_BASEADDRESS] = 0;
}

static const GraphicHwOps vgafb_ops = {
    .invalidate  = vgafb_invalidate_display,
    .gfx_update  = vgafb_update_display,
};

static int milkymist_vgafb_init(SysBusDevice *dev)
{
    MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);

    memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
            "milkymist-vgafb", R_MAX * 4);
    sysbus_init_mmio(dev, &s->regs_region);

    s->con = graphic_console_init(DEVICE(dev), 0, &vgafb_ops, s);

    return 0;
}

static int vgafb_post_load(void *opaque, int version_id)
{
    vgafb_invalidate_display(opaque);
    return 0;
}

static const VMStateDescription vmstate_milkymist_vgafb = {
    .name = "milkymist-vgafb",
    .version_id = 1,
    .minimum_version_id = 1,
    .post_load = vgafb_post_load,
    .fields = (VMStateField[]) {
        VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
        VMSTATE_END_OF_LIST()
    }
};

static Property milkymist_vgafb_properties[] = {
    DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
    DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
    DEFINE_PROP_END_OF_LIST(),
};

static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);

    k->init = milkymist_vgafb_init;
    dc->reset = milkymist_vgafb_reset;
    dc->vmsd = &vmstate_milkymist_vgafb;
    dc->props = milkymist_vgafb_properties;
}

static const TypeInfo milkymist_vgafb_info = {
    .name          = TYPE_MILKYMIST_VGAFB,
    .parent        = TYPE_SYS_BUS_DEVICE,
    .instance_size = sizeof(MilkymistVgafbState),
    .class_init    = milkymist_vgafb_class_init,
};

static void milkymist_vgafb_register_types(void)
{
    type_register_static(&milkymist_vgafb_info);
}

type_init(milkymist_vgafb_register_types)
Commit	Line	Data
d23948b1 MW	1
	2	/*
	3	* QEMU model of the Milkymist VGA framebuffer.
	4	*
a3b6181e	5	* Copyright (c) 2010-2012 Michael Walle <[email protected]>
d23948b1 MW	6	*
	7	* This library is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU Lesser General Public
	9	* License as published by the Free Software Foundation; either
	10	* version 2 of the License, or (at your option) any later version.
	11	*
	12	* This library is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* Lesser General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU Lesser General Public
	18	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	19	*
	20	*
	21	* Specification available at:
	22	* http://www.milkymist.org/socdoc/vgafb.pdf
	23	*/
	24
83c9f4ca PB	25	#include "hw/hw.h"
83c9f4ca PB	26	#include "hw/sysbus.h"
d23948b1	27	#include "trace.h"
28ecbaee	28	#include "ui/console.h"
47b43a1f	29	#include "framebuffer.h"
28ecbaee	30	#include "ui/pixel_ops.h"
1de7afc9	31	#include "qemu/error-report.h"
d23948b1 MW	32
d23948b1 MW	33	#define BITS 8
47b43a1f	34	#include "milkymist-vgafb_template.h"
d23948b1	35	#define BITS 15
47b43a1f	36	#include "milkymist-vgafb_template.h"
d23948b1	37	#define BITS 16
47b43a1f	38	#include "milkymist-vgafb_template.h"
d23948b1	39	#define BITS 24
47b43a1f	40	#include "milkymist-vgafb_template.h"
d23948b1	41	#define BITS 32
47b43a1f	42	#include "milkymist-vgafb_template.h"
d23948b1 MW	43
	44	enum {
	45	R_CTRL = 0,
	46	R_HRES,
	47	R_HSYNC_START,
	48	R_HSYNC_END,
	49	R_HSCAN,
	50	R_VRES,
	51	R_VSYNC_START,
	52	R_VSYNC_END,
	53	R_VSCAN,
	54	R_BASEADDRESS,
	55	R_BASEADDRESS_ACT,
	56	R_BURST_COUNT,
a3b6181e	57	R_DDC,
d23948b1 MW	58	R_SOURCE_CLOCK,
	59	R_MAX
	60	};
	61
	62	enum {
	63	CTRL_RESET = (1<<0),
	64	};
	65
54df97bb AF	66	#define TYPE_MILKYMIST_VGAFB "milkymist-vgafb"
	67	#define MILKYMIST_VGAFB(obj) \
	68	OBJECT_CHECK(MilkymistVgafbState, (obj), TYPE_MILKYMIST_VGAFB)
	69
d23948b1	70	struct MilkymistVgafbState {
54df97bb AF	71	SysBusDevice parent_obj;
54df97bb AF	72
883abf8d	73	MemoryRegion regs_region;
c78f7137	74	QemuConsole *con;
d23948b1 MW	75
	76	int invalidate;
	77	uint32_t fb_offset;
	78	uint32_t fb_mask;
	79
	80	uint32_t regs[R_MAX];
	81	};
	82	typedef struct MilkymistVgafbState MilkymistVgafbState;
	83
	84	static int vgafb_enabled(MilkymistVgafbState *s)
	85	{
	86	return !(s->regs[R_CTRL] & CTRL_RESET);
	87	}
	88
	89	static void vgafb_update_display(void *opaque)
	90	{
	91	MilkymistVgafbState *s = opaque;
54df97bb	92	SysBusDevice *sbd;
c78f7137	93	DisplaySurface *surface = qemu_console_surface(s->con);
d23948b1 MW	94	int first = 0;
	95	int last = 0;
	96	drawfn fn;
	97
	98	if (!vgafb_enabled(s)) {
	99	return;
	100	}
	101
54df97bb	102	sbd = SYS_BUS_DEVICE(s);
d23948b1 MW	103	int dest_width = s->regs[R_HRES];
d23948b1 MW	104
c78f7137	105	switch (surface_bits_per_pixel(surface)) {
d23948b1 MW	106	case 0:
	107	return;
	108	case 8:
	109	fn = draw_line_8;
	110	break;
	111	case 15:
	112	fn = draw_line_15;
	113	dest_width *= 2;
	114	break;
	115	case 16:
	116	fn = draw_line_16;
	117	dest_width *= 2;
	118	break;
	119	case 24:
	120	fn = draw_line_24;
	121	dest_width *= 3;
	122	break;
	123	case 32:
	124	fn = draw_line_32;
	125	dest_width *= 4;
	126	break;
	127	default:
	128	hw_error("milkymist_vgafb: bad color depth\n");
	129	break;
	130	}
	131
54df97bb	132	framebuffer_update_display(surface, sysbus_address_space(sbd),
d23948b1 MW	133	s->regs[R_BASEADDRESS] + s->fb_offset,
	134	s->regs[R_HRES],
	135	s->regs[R_VRES],
	136	s->regs[R_HRES] * 2,
	137	dest_width,
	138	0,
	139	s->invalidate,
	140	fn,
	141	NULL,
	142	&first, &last);
	143
	144	if (first >= 0) {
c78f7137	145	dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
d23948b1 MW	146	}
	147	s->invalidate = 0;
	148	}
	149
	150	static void vgafb_invalidate_display(void *opaque)
	151	{
	152	MilkymistVgafbState *s = opaque;
	153	s->invalidate = 1;
	154	}
	155
	156	static void vgafb_resize(MilkymistVgafbState *s)
	157	{
	158	if (!vgafb_enabled(s)) {
	159	return;
	160	}
	161
c78f7137	162	qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
d23948b1 MW	163	s->invalidate = 1;
	164	}
	165
a8170e5e	166	static uint64_t vgafb_read(void *opaque, hwaddr addr,
883abf8d	167	unsigned size)
d23948b1 MW	168	{
	169	MilkymistVgafbState *s = opaque;
	170	uint32_t r = 0;
	171
	172	addr >>= 2;
	173	switch (addr) {
	174	case R_CTRL:
	175	case R_HRES:
	176	case R_HSYNC_START:
	177	case R_HSYNC_END:
	178	case R_HSCAN:
	179	case R_VRES:
	180	case R_VSYNC_START:
	181	case R_VSYNC_END:
	182	case R_VSCAN:
	183	case R_BASEADDRESS:
	184	case R_BURST_COUNT:
a3b6181e	185	case R_DDC:
d23948b1 MW	186	case R_SOURCE_CLOCK:
	187	r = s->regs[addr];
	188	break;
	189	case R_BASEADDRESS_ACT:
	190	r = s->regs[R_BASEADDRESS];
	191	break;
	192
	193	default:
	194	error_report("milkymist_vgafb: read access to unknown register 0x"
	195	TARGET_FMT_plx, addr << 2);
	196	break;
	197	}
	198
	199	trace_milkymist_vgafb_memory_read(addr << 2, r);
	200
	201	return r;
	202	}
	203
a8170e5e	204	static void vgafb_write(void *opaque, hwaddr addr, uint64_t value,
883abf8d	205	unsigned size)
d23948b1 MW	206	{
	207	MilkymistVgafbState *s = opaque;
	208
	209	trace_milkymist_vgafb_memory_write(addr, value);
	210
	211	addr >>= 2;
	212	switch (addr) {
	213	case R_CTRL:
c07050dd MW	214	s->regs[addr] = value;
	215	vgafb_resize(s);
	216	break;
d23948b1 MW	217	case R_HSYNC_START:
	218	case R_HSYNC_END:
	219	case R_HSCAN:
	220	case R_VSYNC_START:
	221	case R_VSYNC_END:
	222	case R_VSCAN:
	223	case R_BURST_COUNT:
a3b6181e	224	case R_DDC:
d23948b1 MW	225	case R_SOURCE_CLOCK:
	226	s->regs[addr] = value;
	227	break;
	228	case R_BASEADDRESS:
	229	if (value & 0x1f) {
	230	error_report("milkymist_vgafb: framebuffer base address have to "
	231	"be 32 byte aligned");
	232	break;
	233	}
	234	s->regs[addr] = value & s->fb_mask;
	235	s->invalidate = 1;
	236	break;
	237	case R_HRES:
	238	case R_VRES:
	239	s->regs[addr] = value;
	240	vgafb_resize(s);
	241	break;
	242	case R_BASEADDRESS_ACT:
	243	error_report("milkymist_vgafb: write to read-only register 0x"
	244	TARGET_FMT_plx, addr << 2);
	245	break;
	246
	247	default:
	248	error_report("milkymist_vgafb: write access to unknown register 0x"
	249	TARGET_FMT_plx, addr << 2);
	250	break;
	251	}
	252	}
	253
883abf8d MW	254	static const MemoryRegionOps vgafb_mmio_ops = {
	255	.read = vgafb_read,
	256	.write = vgafb_write,
	257	.valid = {
	258	.min_access_size = 4,
	259	.max_access_size = 4,
	260	},
	261	.endianness = DEVICE_NATIVE_ENDIAN,
d23948b1 MW	262	};
	263
	264	static void milkymist_vgafb_reset(DeviceState *d)
	265	{
54df97bb	266	MilkymistVgafbState *s = MILKYMIST_VGAFB(d);
d23948b1 MW	267	int i;
	268
	269	for (i = 0; i < R_MAX; i++) {
	270	s->regs[i] = 0;
	271	}
	272
	273	/* defaults */
	274	s->regs[R_CTRL] = CTRL_RESET;
	275	s->regs[R_HRES] = 640;
	276	s->regs[R_VRES] = 480;
	277	s->regs[R_BASEADDRESS] = 0;
	278	}
	279
380cd056 GH	280	static const GraphicHwOps vgafb_ops = {
	281	.invalidate = vgafb_invalidate_display,
	282	.gfx_update = vgafb_update_display,
	283	};
	284
d23948b1 MW	285	static int milkymist_vgafb_init(SysBusDevice *dev)
d23948b1 MW	286	{
54df97bb	287	MilkymistVgafbState *s = MILKYMIST_VGAFB(dev);
d23948b1	288
3eadad55	289	memory_region_init_io(&s->regs_region, OBJECT(s), &vgafb_mmio_ops, s,
883abf8d	290	"milkymist-vgafb", R_MAX * 4);
750ecd44	291	sysbus_init_mmio(dev, &s->regs_region);
d23948b1	292
5643706a	293	s->con = graphic_console_init(DEVICE(dev), 0, &vgafb_ops, s);
d23948b1 MW	294
	295	return 0;
	296	}
	297
	298	static int vgafb_post_load(void *opaque, int version_id)
	299	{
	300	vgafb_invalidate_display(opaque);
	301	return 0;
	302	}
	303
	304	static const VMStateDescription vmstate_milkymist_vgafb = {
	305	.name = "milkymist-vgafb",
	306	.version_id = 1,
	307	.minimum_version_id = 1,
d23948b1	308	.post_load = vgafb_post_load,
35d08458	309	.fields = (VMStateField[]) {
d23948b1 MW	310	VMSTATE_UINT32_ARRAY(regs, MilkymistVgafbState, R_MAX),
	311	VMSTATE_END_OF_LIST()
	312	}
	313	};
	314
999e12bb AL	315	static Property milkymist_vgafb_properties[] = {
	316	DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
	317	DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
	318	DEFINE_PROP_END_OF_LIST(),
	319	};
	320
	321	static void milkymist_vgafb_class_init(ObjectClass klass, void data)
	322	{
39bffca2	323	DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb AL	324	SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
	325
	326	k->init = milkymist_vgafb_init;
39bffca2 AL	327	dc->reset = milkymist_vgafb_reset;
	328	dc->vmsd = &vmstate_milkymist_vgafb;
	329	dc->props = milkymist_vgafb_properties;
999e12bb AL	330	}
999e12bb AL	331
8c43a6f0	332	static const TypeInfo milkymist_vgafb_info = {
54df97bb	333	.name = TYPE_MILKYMIST_VGAFB,
39bffca2 AL	334	.parent = TYPE_SYS_BUS_DEVICE,
	335	.instance_size = sizeof(MilkymistVgafbState),
	336	.class_init = milkymist_vgafb_class_init,
d23948b1 MW	337	};
d23948b1 MW	338
83f7d43a	339	static void milkymist_vgafb_register_types(void)
d23948b1	340	{
39bffca2	341	type_register_static(&milkymist_vgafb_info);
d23948b1 MW	342	}
d23948b1 MW	343
83f7d43a	344	type_init(milkymist_vgafb_register_types)