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1 | #ifndef APIC_H |
2 | #define APIC_H | |
3 | ||
92a16d7a BS |
4 | #include "qemu-common.h" |
5 | ||
cf6d64bf | 6 | /* apic.c */ |
1f6f408c JK |
7 | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, |
8 | uint8_t vector_num, uint8_t trigger_mode); | |
92a16d7a BS |
9 | int apic_accept_pic_intr(DeviceState *s); |
10 | void apic_deliver_pic_intr(DeviceState *s, int level); | |
02c09195 | 11 | void apic_deliver_nmi(DeviceState *d); |
92a16d7a | 12 | int apic_get_interrupt(DeviceState *s); |
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13 | void apic_reset_irq_delivered(void); |
14 | int apic_get_irq_delivered(void); | |
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15 | void cpu_set_apic_base(DeviceState *s, uint64_t val); |
16 | uint64_t cpu_get_apic_base(DeviceState *s); | |
17 | void cpu_set_apic_tpr(DeviceState *s, uint8_t val); | |
18 | uint8_t cpu_get_apic_tpr(DeviceState *s); | |
19 | void apic_init_reset(DeviceState *s); | |
20 | void apic_sipi(DeviceState *s); | |
d362e757 JK |
21 | void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, |
22 | TPRAccess access); | |
5d62c43a | 23 | void apic_poll_irq(DeviceState *d); |
dd673288 | 24 | void apic_designate_bsp(DeviceState *d); |
aa28b9bf | 25 | |
0e26b7b8 | 26 | /* pc.c */ |
92a16d7a | 27 | DeviceState *cpu_get_current_apic(void); |
aa28b9bf | 28 | |
dd673288 IM |
29 | /* cpu.c */ |
30 | bool cpu_is_bsp(X86CPU *cpu); | |
31 | ||
aa28b9bf | 32 | #endif |