]> Git Repo - qemu.git/blame - include/hw/mips/cps.h
block: Make bdrv_attach/detach_aio_context() static
[qemu.git] / include / hw / mips / cps.h
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1/*
2 * Coherent Processing System emulation.
3 *
4 * Copyright (c) 2016 Imagination Technologies
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef MIPS_CPS_H
21#define MIPS_CPS_H
22
23#include "hw/sysbus.h"
a9bd9b5a 24#include "hw/misc/mips_cmgcr.h"
19494f81 25#include "hw/intc/mips_gic.h"
2edd5261 26#include "hw/misc/mips_cpc.h"
40829435 27#include "hw/misc/mips_itu.h"
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28
29#define TYPE_MIPS_CPS "mips-cps"
30#define MIPS_CPS(obj) OBJECT_CHECK(MIPSCPSState, (obj), TYPE_MIPS_CPS)
31
32typedef struct MIPSCPSState {
33 SysBusDevice parent_obj;
34
35 uint32_t num_vp;
36 uint32_t num_irq;
a7519f2b 37 char *cpu_type;
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38
39 MemoryRegion container;
a9bd9b5a 40 MIPSGCRState gcr;
19494f81 41 MIPSGICState gic;
2edd5261 42 MIPSCPCState cpc;
40829435 43 MIPSITUState itu;
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44} MIPSCPSState;
45
46qemu_irq get_cps_irq(MIPSCPSState *cps, int pin_number);
47
48#endif
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