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Commit | Line | Data |
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5fafdf24 | 1 | /* |
16406950 PB |
2 | * ARM kernel loader. |
3 | * | |
9ee6e8bb | 4 | * Copyright (c) 2006-2007 CodeSourcery. |
16406950 PB |
5 | * Written by Paul Brook |
6 | * | |
7 | * This code is licenced under the GPL. | |
8 | */ | |
9 | ||
87ecb68b PB |
10 | #include "hw.h" |
11 | #include "arm-misc.h" | |
12 | #include "sysemu.h" | |
16406950 PB |
13 | |
14 | #define KERNEL_ARGS_ADDR 0x100 | |
15 | #define KERNEL_LOAD_ADDR 0x00010000 | |
16 | #define INITRD_LOAD_ADDR 0x00800000 | |
17 | ||
18 | /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */ | |
19 | static uint32_t bootloader[] = { | |
20 | 0xe3a00000, /* mov r0, #0 */ | |
21 | 0xe3a01000, /* mov r1, #0x?? */ | |
22 | 0xe3811c00, /* orr r1, r1, #0x??00 */ | |
23 | 0xe59f2000, /* ldr r2, [pc, #0] */ | |
24 | 0xe59ff000, /* ldr pc, [pc, #0] */ | |
25 | 0, /* Address of kernel args. Set by integratorcp_init. */ | |
26 | 0 /* Kernel entry point. Set by integratorcp_init. */ | |
27 | }; | |
28 | ||
9ee6e8bb PB |
29 | /* Entry point for secondary CPUs. Enable interrupt controller and |
30 | Issue WFI until start address is written to system controller. */ | |
31 | static uint32_t smpboot[] = { | |
32 | 0xe3a00201, /* mov r0, #0x10000000 */ | |
33 | 0xe3800601, /* orr r0, r0, #0x001000000 */ | |
34 | 0xe3a01001, /* mov r1, #1 */ | |
35 | 0xe5801100, /* str r1, [r0, #0x100] */ | |
36 | 0xe3a00201, /* mov r0, #0x10000000 */ | |
37 | 0xe3800030, /* orr r0, #0x30 */ | |
38 | 0xe320f003, /* wfi */ | |
39 | 0xe5901000, /* ldr r1, [r0] */ | |
40 | 0xe3110003, /* tst r1, #3 */ | |
41 | 0x1afffffb, /* bne <wfi> */ | |
42 | 0xe12fff11 /* bx r1 */ | |
43 | }; | |
44 | ||
f3d6b95e PB |
45 | static void main_cpu_reset(void *opaque) |
46 | { | |
47 | CPUState *env = opaque; | |
48 | ||
49 | cpu_reset(env); | |
f93eb9ff AZ |
50 | if (env->boot_info) |
51 | arm_load_kernel(env, env->boot_info); | |
9ee6e8bb PB |
52 | |
53 | /* TODO: Reset secondary CPUs. */ | |
f3d6b95e PB |
54 | } |
55 | ||
52b43737 PB |
56 | #define WRITE_WORD(p, value) do { \ |
57 | stl_phys_notdirty(p, value); \ | |
58 | p += 4; \ | |
59 | } while (0) | |
60 | ||
f93eb9ff | 61 | static void set_kernel_args(struct arm_boot_info *info, |
52b43737 | 62 | int initrd_size, target_phys_addr_t base) |
16406950 | 63 | { |
52b43737 | 64 | target_phys_addr_t p; |
16406950 | 65 | |
52b43737 | 66 | p = base + KERNEL_ARGS_ADDR; |
16406950 | 67 | /* ATAG_CORE */ |
52b43737 PB |
68 | WRITE_WORD(p, 5); |
69 | WRITE_WORD(p, 0x54410001); | |
70 | WRITE_WORD(p, 1); | |
71 | WRITE_WORD(p, 0x1000); | |
72 | WRITE_WORD(p, 0); | |
16406950 | 73 | /* ATAG_MEM */ |
f93eb9ff | 74 | /* TODO: handle multiple chips on one ATAG list */ |
52b43737 PB |
75 | WRITE_WORD(p, 4); |
76 | WRITE_WORD(p, 0x54410002); | |
77 | WRITE_WORD(p, info->ram_size); | |
78 | WRITE_WORD(p, info->loader_start); | |
16406950 PB |
79 | if (initrd_size) { |
80 | /* ATAG_INITRD2 */ | |
52b43737 PB |
81 | WRITE_WORD(p, 4); |
82 | WRITE_WORD(p, 0x54420005); | |
83 | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); | |
84 | WRITE_WORD(p, initrd_size); | |
16406950 | 85 | } |
f93eb9ff | 86 | if (info->kernel_cmdline && *info->kernel_cmdline) { |
16406950 PB |
87 | /* ATAG_CMDLINE */ |
88 | int cmdline_size; | |
89 | ||
f93eb9ff | 90 | cmdline_size = strlen(info->kernel_cmdline); |
52b43737 PB |
91 | cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline, |
92 | cmdline_size + 1); | |
16406950 | 93 | cmdline_size = (cmdline_size >> 2) + 1; |
52b43737 PB |
94 | WRITE_WORD(p, cmdline_size + 2); |
95 | WRITE_WORD(p, 0x54410009); | |
96 | p += cmdline_size * 4; | |
16406950 | 97 | } |
f93eb9ff AZ |
98 | if (info->atag_board) { |
99 | /* ATAG_BOARD */ | |
100 | int atag_board_len; | |
52b43737 | 101 | uint8_t atag_board_buf[0x1000]; |
f93eb9ff | 102 | |
52b43737 PB |
103 | atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3; |
104 | WRITE_WORD(p, (atag_board_len + 8) >> 2); | |
105 | WRITE_WORD(p, 0x414f4d50); | |
106 | cpu_physical_memory_write(p, atag_board_buf, atag_board_len); | |
f93eb9ff AZ |
107 | p += atag_board_len; |
108 | } | |
16406950 | 109 | /* ATAG_END */ |
52b43737 PB |
110 | WRITE_WORD(p, 0); |
111 | WRITE_WORD(p, 0); | |
16406950 PB |
112 | } |
113 | ||
f93eb9ff | 114 | static void set_kernel_args_old(struct arm_boot_info *info, |
52b43737 | 115 | int initrd_size, target_phys_addr_t base) |
2b8f2d41 | 116 | { |
52b43737 PB |
117 | target_phys_addr_t p; |
118 | const char *s; | |
119 | ||
2b8f2d41 AZ |
120 | |
121 | /* see linux/include/asm-arm/setup.h */ | |
52b43737 | 122 | p = base + KERNEL_ARGS_ADDR; |
2b8f2d41 | 123 | /* page_size */ |
52b43737 | 124 | WRITE_WORD(p, 4096); |
2b8f2d41 | 125 | /* nr_pages */ |
52b43737 | 126 | WRITE_WORD(p, info->ram_size / 4096); |
2b8f2d41 | 127 | /* ramdisk_size */ |
52b43737 | 128 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
129 | #define FLAG_READONLY 1 |
130 | #define FLAG_RDLOAD 4 | |
131 | #define FLAG_RDPROMPT 8 | |
132 | /* flags */ | |
52b43737 | 133 | WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT); |
2b8f2d41 | 134 | /* rootdev */ |
52b43737 | 135 | WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */ |
2b8f2d41 | 136 | /* video_num_cols */ |
52b43737 | 137 | WRITE_WORD(p, 0); |
2b8f2d41 | 138 | /* video_num_rows */ |
52b43737 | 139 | WRITE_WORD(p, 0); |
2b8f2d41 | 140 | /* video_x */ |
52b43737 | 141 | WRITE_WORD(p, 0); |
2b8f2d41 | 142 | /* video_y */ |
52b43737 | 143 | WRITE_WORD(p, 0); |
2b8f2d41 | 144 | /* memc_control_reg */ |
52b43737 | 145 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
146 | /* unsigned char sounddefault */ |
147 | /* unsigned char adfsdrives */ | |
148 | /* unsigned char bytes_per_char_h */ | |
149 | /* unsigned char bytes_per_char_v */ | |
52b43737 | 150 | WRITE_WORD(p, 0); |
2b8f2d41 | 151 | /* pages_in_bank[4] */ |
52b43737 PB |
152 | WRITE_WORD(p, 0); |
153 | WRITE_WORD(p, 0); | |
154 | WRITE_WORD(p, 0); | |
155 | WRITE_WORD(p, 0); | |
2b8f2d41 | 156 | /* pages_in_vram */ |
52b43737 | 157 | WRITE_WORD(p, 0); |
2b8f2d41 AZ |
158 | /* initrd_start */ |
159 | if (initrd_size) | |
52b43737 | 160 | WRITE_WORD(p, info->loader_start + INITRD_LOAD_ADDR); |
2b8f2d41 | 161 | else |
52b43737 | 162 | WRITE_WORD(p, 0); |
2b8f2d41 | 163 | /* initrd_size */ |
52b43737 | 164 | WRITE_WORD(p, initrd_size); |
2b8f2d41 | 165 | /* rd_start */ |
52b43737 | 166 | WRITE_WORD(p, 0); |
2b8f2d41 | 167 | /* system_rev */ |
52b43737 | 168 | WRITE_WORD(p, 0); |
2b8f2d41 | 169 | /* system_serial_low */ |
52b43737 | 170 | WRITE_WORD(p, 0); |
2b8f2d41 | 171 | /* system_serial_high */ |
52b43737 | 172 | WRITE_WORD(p, 0); |
2b8f2d41 | 173 | /* mem_fclk_21285 */ |
52b43737 | 174 | WRITE_WORD(p, 0); |
2b8f2d41 | 175 | /* zero unused fields */ |
52b43737 PB |
176 | while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) { |
177 | WRITE_WORD(p, 0); | |
178 | } | |
179 | s = info->kernel_cmdline; | |
180 | if (s) { | |
181 | cpu_physical_memory_write(p, (void *)s, strlen(s) + 1); | |
182 | } else { | |
183 | WRITE_WORD(p, 0); | |
184 | } | |
2b8f2d41 AZ |
185 | } |
186 | ||
f93eb9ff | 187 | void arm_load_kernel(CPUState *env, struct arm_boot_info *info) |
16406950 PB |
188 | { |
189 | int kernel_size; | |
190 | int initrd_size; | |
191 | int n; | |
1c7b3754 PB |
192 | int is_linux = 0; |
193 | uint64_t elf_entry; | |
194 | target_ulong entry; | |
16406950 PB |
195 | |
196 | /* Load the kernel. */ | |
f93eb9ff | 197 | if (!info->kernel_filename) { |
16406950 PB |
198 | fprintf(stderr, "Kernel image must be specified\n"); |
199 | exit(1); | |
200 | } | |
daf90626 | 201 | |
f93eb9ff AZ |
202 | if (!env->boot_info) { |
203 | if (info->nb_cpus == 0) | |
204 | info->nb_cpus = 1; | |
205 | env->boot_info = info; | |
a08d4367 | 206 | qemu_register_reset(main_cpu_reset, env); |
f3d6b95e | 207 | } |
f93eb9ff | 208 | |
1c7b3754 | 209 | /* Assume that raw images are linux kernels, and ELF images are not. */ |
f93eb9ff | 210 | kernel_size = load_elf(info->kernel_filename, 0, &elf_entry, NULL, NULL); |
1c7b3754 PB |
211 | entry = elf_entry; |
212 | if (kernel_size < 0) { | |
5a9154e0 AL |
213 | kernel_size = load_uimage(info->kernel_filename, &entry, NULL, |
214 | &is_linux); | |
1c7b3754 PB |
215 | } |
216 | if (kernel_size < 0) { | |
f93eb9ff | 217 | entry = info->loader_start + KERNEL_LOAD_ADDR; |
3b760e04 PB |
218 | kernel_size = load_image_targphys(info->kernel_filename, entry, |
219 | ram_size - KERNEL_LOAD_ADDR); | |
1c7b3754 PB |
220 | is_linux = 1; |
221 | } | |
222 | if (kernel_size < 0) { | |
f93eb9ff AZ |
223 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
224 | info->kernel_filename); | |
1c7b3754 PB |
225 | exit(1); |
226 | } | |
227 | if (!is_linux) { | |
228 | /* Jump to the entry point. */ | |
daf90626 PB |
229 | env->regs[15] = entry & 0xfffffffe; |
230 | env->thumb = entry & 1; | |
231 | } else { | |
f93eb9ff | 232 | if (info->initrd_filename) { |
3b760e04 PB |
233 | initrd_size = load_image_targphys(info->initrd_filename, |
234 | info->loader_start | |
235 | + INITRD_LOAD_ADDR, | |
236 | ram_size - INITRD_LOAD_ADDR); | |
daf90626 PB |
237 | if (initrd_size < 0) { |
238 | fprintf(stderr, "qemu: could not load initrd '%s'\n", | |
f93eb9ff | 239 | info->initrd_filename); |
daf90626 PB |
240 | exit(1); |
241 | } | |
242 | } else { | |
243 | initrd_size = 0; | |
244 | } | |
f93eb9ff AZ |
245 | bootloader[1] |= info->board_id & 0xff; |
246 | bootloader[2] |= (info->board_id >> 8) & 0xff; | |
247 | bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR; | |
1c7b3754 | 248 | bootloader[6] = entry; |
52b43737 PB |
249 | for (n = 0; n < sizeof(bootloader) / 4; n++) { |
250 | stl_phys_notdirty(info->loader_start + (n * 4), bootloader[n]); | |
251 | } | |
252 | if (info->nb_cpus > 1) { | |
253 | for (n = 0; n < sizeof(smpboot) / 4; n++) { | |
254 | stl_phys_notdirty(info->smp_loader_start + (n * 4), smpboot[n]); | |
255 | } | |
256 | } | |
2b8f2d41 | 257 | if (old_param) |
52b43737 | 258 | set_kernel_args_old(info, initrd_size, info->loader_start); |
2b8f2d41 | 259 | else |
52b43737 | 260 | set_kernel_args(info, initrd_size, info->loader_start); |
16406950 | 261 | } |
16406950 | 262 | } |