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39ac8455 DG |
1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator | |
3 | * | |
4 | * Hypercall based emulated RTAS | |
5 | * | |
6 | * Copyright (c) 2010-2011 David Gibson, IBM Corporation. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | * | |
26 | */ | |
0d75590d | 27 | #include "qemu/osdep.h" |
39ac8455 | 28 | #include "cpu.h" |
03dd024f | 29 | #include "qemu/log.h" |
ce9863b7 | 30 | #include "qemu/error-report.h" |
9c17d615 | 31 | #include "sysemu/sysemu.h" |
9c17d615 | 32 | #include "sysemu/device_tree.h" |
db4ef288 | 33 | #include "sysemu/cpus.h" |
cf116ad4 | 34 | #include "sysemu/hw_accel.h" |
a84f7179 | 35 | #include "kvm_ppc.h" |
39ac8455 | 36 | |
0d09e41a PB |
37 | #include "hw/ppc/spapr.h" |
38 | #include "hw/ppc/spapr_vio.h" | |
eeddd59f | 39 | #include "hw/ppc/spapr_rtas.h" |
84369f63 | 40 | #include "hw/ppc/spapr_cpu_core.h" |
af81cf32 | 41 | #include "hw/ppc/ppc.h" |
e3943228 | 42 | #include "hw/boards.h" |
39ac8455 DG |
43 | |
44 | #include <libfdt.h> | |
8c8639df | 45 | #include "hw/ppc/spapr_drc.h" |
f348b6d1 | 46 | #include "qemu/cutils.h" |
028ec3ce | 47 | #include "trace.h" |
3f5dabce | 48 | #include "hw/ppc/fdt.h" |
cf116ad4 | 49 | #include "target/ppc/mmu-hash64.h" |
f00bed95 | 50 | #include "target/ppc/mmu-book3s-v3.h" |
8c8639df | 51 | |
ce2918cb | 52 | static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
53 | uint32_t token, uint32_t nargs, |
54 | target_ulong args, | |
55 | uint32_t nret, target_ulong rets) | |
56 | { | |
57 | uint8_t c = rtas_ld(args, 0); | |
ce2918cb | 58 | SpaprVioDevice *sdev = vty_lookup(spapr, 0); |
821303f5 DG |
59 | |
60 | if (!sdev) { | |
a64d325d | 61 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
821303f5 DG |
62 | } else { |
63 | vty_putchars(sdev, &c, sizeof(c)); | |
a64d325d | 64 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
65 | } |
66 | } | |
67 | ||
ce2918cb | 68 | static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
69 | uint32_t token, uint32_t nargs, target_ulong args, |
70 | uint32_t nret, target_ulong rets) | |
71 | { | |
72 | if (nargs != 2 || nret != 1) { | |
a64d325d | 73 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
821303f5 DG |
74 | return; |
75 | } | |
cf83f140 | 76 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
8a9c1b77 | 77 | cpu_stop_current(); |
a64d325d | 78 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
79 | } |
80 | ||
ce2918cb | 81 | static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr, |
c821a43c DG |
82 | uint32_t token, uint32_t nargs, |
83 | target_ulong args, | |
84 | uint32_t nret, target_ulong rets) | |
85 | { | |
86 | if (nargs != 0 || nret != 1) { | |
a64d325d | 87 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
c821a43c DG |
88 | return; |
89 | } | |
cf83f140 | 90 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
a64d325d | 91 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
c821a43c DG |
92 | } |
93 | ||
210b580b | 94 | static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, |
ce2918cb | 95 | SpaprMachineState *spapr, |
a9f8ad8f DG |
96 | uint32_t token, uint32_t nargs, |
97 | target_ulong args, | |
98 | uint32_t nret, target_ulong rets) | |
99 | { | |
100 | target_ulong id; | |
0f20ba62 | 101 | PowerPCCPU *cpu; |
a9f8ad8f DG |
102 | |
103 | if (nargs != 1 || nret != 2) { | |
a64d325d | 104 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
105 | return; |
106 | } | |
107 | ||
108 | id = rtas_ld(args, 0); | |
2e886fb3 | 109 | cpu = spapr_find_cpu(id); |
05318a85 | 110 | if (cpu != NULL) { |
0f20ba62 | 111 | if (CPU(cpu)->halted) { |
a9f8ad8f DG |
112 | rtas_st(rets, 1, 0); |
113 | } else { | |
114 | rtas_st(rets, 1, 2); | |
115 | } | |
116 | ||
a64d325d | 117 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
118 | return; |
119 | } | |
120 | ||
121 | /* Didn't find a matching cpu */ | |
a64d325d | 122 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
123 | } |
124 | ||
ce2918cb | 125 | static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr, |
a9f8ad8f DG |
126 | uint32_t token, uint32_t nargs, |
127 | target_ulong args, | |
128 | uint32_t nret, target_ulong rets) | |
129 | { | |
130 | target_ulong id, start, r3; | |
cf116ad4 DG |
131 | PowerPCCPU *newcpu; |
132 | CPUPPCState *env; | |
133 | PowerPCCPUClass *pcc; | |
98248918 | 134 | target_ulong lpcr; |
a9f8ad8f DG |
135 | |
136 | if (nargs != 3 || nret != 1) { | |
a64d325d | 137 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
138 | return; |
139 | } | |
140 | ||
141 | id = rtas_ld(args, 0); | |
142 | start = rtas_ld(args, 1); | |
143 | r3 = rtas_ld(args, 2); | |
144 | ||
cf116ad4 DG |
145 | newcpu = spapr_find_cpu(id); |
146 | if (!newcpu) { | |
147 | /* Didn't find a matching cpu */ | |
148 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
149 | return; | |
150 | } | |
a9f8ad8f | 151 | |
cf116ad4 DG |
152 | env = &newcpu->env; |
153 | pcc = POWERPC_CPU_GET_CLASS(newcpu); | |
a9f8ad8f | 154 | |
cf116ad4 DG |
155 | if (!CPU(newcpu)->halted) { |
156 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); | |
157 | return; | |
158 | } | |
048706d9 | 159 | |
cf116ad4 | 160 | cpu_synchronize_state(CPU(newcpu)); |
9a94ee5b | 161 | |
cf116ad4 | 162 | env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); |
98248918 | 163 | |
cf116ad4 | 164 | /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ |
47a9b551 | 165 | lpcr = env->spr[SPR_LPCR]; |
98248918 DG |
166 | if (!pcc->interrupts_big_endian(callcpu)) { |
167 | lpcr |= LPCR_ILE; | |
168 | } | |
f00bed95 DG |
169 | if (env->mmu_model == POWERPC_MMU_3_00) { |
170 | /* | |
171 | * New cpus are expected to start in the same radix/hash mode | |
172 | * as the existing CPUs | |
173 | */ | |
00fd075e BH |
174 | if (ppc64_v3_radix(callcpu)) { |
175 | lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; | |
f00bed95 | 176 | } else { |
00fd075e | 177 | lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR); |
f00bed95 | 178 | } |
70de0967 | 179 | env->spr[SPR_PSSCR] &= ~PSSCR_EC; |
f00bed95 | 180 | } |
98248918 DG |
181 | ppc_store_lpcr(newcpu, lpcr); |
182 | ||
183 | /* | |
184 | * Set the timebase offset of the new CPU to that of the invoking | |
185 | * CPU. This helps hotplugged CPU to have the correct timebase | |
186 | * offset. | |
187 | */ | |
188 | newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset; | |
9a94ee5b | 189 | |
84369f63 | 190 | spapr_cpu_set_entry_state(newcpu, start, r3); |
a9f8ad8f | 191 | |
cf116ad4 | 192 | qemu_cpu_kick(CPU(newcpu)); |
a9f8ad8f | 193 | |
cf116ad4 | 194 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
195 | } |
196 | ||
ce2918cb | 197 | static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr, |
59760f2d AK |
198 | uint32_t token, uint32_t nargs, |
199 | target_ulong args, | |
200 | uint32_t nret, target_ulong rets) | |
201 | { | |
202 | CPUState *cs = CPU(cpu); | |
203 | CPUPPCState *env = &cpu->env; | |
9a94ee5b | 204 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
59760f2d | 205 | |
9a94ee5b CLG |
206 | /* Disable Power-saving mode Exit Cause exceptions for the CPU. |
207 | * This could deliver an interrupt on a dying CPU and crash the | |
70de0967 SJS |
208 | * guest. |
209 | * For the same reason, set PSSCR_EC. | |
210 | */ | |
cf116ad4 | 211 | ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); |
70de0967 | 212 | env->spr[SPR_PSSCR] |= PSSCR_EC; |
cf116ad4 | 213 | cs->halted = 1; |
a84f7179 | 214 | kvmppc_set_reg_ppc_online(cpu, 0); |
cf116ad4 | 215 | qemu_cpu_kick(cs); |
59760f2d AK |
216 | } |
217 | ||
c920f7b4 DG |
218 | static inline int sysparm_st(target_ulong addr, target_ulong len, |
219 | const void *val, uint16_t vallen) | |
220 | { | |
221 | hwaddr phys = ppc64_phys_to_real(addr); | |
222 | ||
223 | if (len < 2) { | |
224 | return RTAS_OUT_SYSPARM_PARAM_ERROR; | |
225 | } | |
226 | stw_be_phys(&address_space_memory, phys, vallen); | |
227 | cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); | |
228 | return RTAS_OUT_SUCCESS; | |
229 | } | |
230 | ||
3ada6b11 | 231 | static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, |
ce2918cb | 232 | SpaprMachineState *spapr, |
3ada6b11 AK |
233 | uint32_t token, uint32_t nargs, |
234 | target_ulong args, | |
235 | uint32_t nret, target_ulong rets) | |
236 | { | |
fe6b6346 LX |
237 | MachineState *ms = MACHINE(qdev_get_machine()); |
238 | unsigned int max_cpus = ms->smp.max_cpus; | |
3ada6b11 AK |
239 | target_ulong parameter = rtas_ld(args, 0); |
240 | target_ulong buffer = rtas_ld(args, 1); | |
241 | target_ulong length = rtas_ld(args, 2); | |
c920f7b4 | 242 | target_ulong ret; |
3ada6b11 AK |
243 | |
244 | switch (parameter) { | |
3b50d897 | 245 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { |
e3943228 | 246 | char *param_val = g_strdup_printf("MaxEntCap=%d," |
ab3dd749 | 247 | "DesMem=%" PRIu64 "," |
e3943228 SB |
248 | "DesProcs=%d," |
249 | "MaxPlatProcs=%d", | |
250 | max_cpus, | |
d23b6caa | 251 | current_machine->ram_size / MiB, |
fe6b6346 | 252 | ms->smp.cpus, |
e3943228 | 253 | max_cpus); |
c920f7b4 | 254 | ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); |
3b50d897 S |
255 | g_free(param_val); |
256 | break; | |
257 | } | |
3052d951 S |
258 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { |
259 | uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; | |
260 | ||
c920f7b4 | 261 | ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); |
3ada6b11 AK |
262 | break; |
263 | } | |
b907d7b0 | 264 | case RTAS_SYSPARM_UUID: |
9c5ce8db FZ |
265 | ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, |
266 | (qemu_uuid_set ? 16 : 0)); | |
b907d7b0 | 267 | break; |
3052d951 S |
268 | default: |
269 | ret = RTAS_OUT_NOT_SUPPORTED; | |
270 | } | |
3ada6b11 AK |
271 | |
272 | rtas_st(rets, 0, ret); | |
273 | } | |
274 | ||
275 | static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, | |
ce2918cb | 276 | SpaprMachineState *spapr, |
3ada6b11 AK |
277 | uint32_t token, uint32_t nargs, |
278 | target_ulong args, | |
279 | uint32_t nret, target_ulong rets) | |
280 | { | |
281 | target_ulong parameter = rtas_ld(args, 0); | |
282 | target_ulong ret = RTAS_OUT_NOT_SUPPORTED; | |
283 | ||
284 | switch (parameter) { | |
3b50d897 | 285 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: |
3052d951 | 286 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: |
b907d7b0 | 287 | case RTAS_SYSPARM_UUID: |
3ada6b11 AK |
288 | ret = RTAS_OUT_NOT_AUTHORIZED; |
289 | break; | |
290 | } | |
291 | ||
292 | rtas_st(rets, 0, ret); | |
293 | } | |
294 | ||
2e14072f | 295 | static void rtas_ibm_os_term(PowerPCCPU *cpu, |
ce2918cb | 296 | SpaprMachineState *spapr, |
2e14072f ND |
297 | uint32_t token, uint32_t nargs, |
298 | target_ulong args, | |
299 | uint32_t nret, target_ulong rets) | |
300 | { | |
2c553477 | 301 | qemu_system_guest_panicked(NULL); |
2e14072f | 302 | |
2c553477 | 303 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
2e14072f ND |
304 | } |
305 | ||
ce2918cb | 306 | static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
307 | uint32_t token, uint32_t nargs, |
308 | target_ulong args, uint32_t nret, | |
309 | target_ulong rets) | |
310 | { | |
311 | int32_t power_domain; | |
312 | ||
313 | if (nargs != 2 || nret != 2) { | |
314 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
315 | return; | |
316 | } | |
317 | ||
318 | /* we currently only use a single, "live insert" powerdomain for | |
319 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
320 | */ | |
321 | power_domain = rtas_ld(args, 0); | |
322 | if (power_domain != -1) { | |
323 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
324 | return; | |
325 | } | |
326 | ||
327 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
328 | rtas_st(rets, 1, 100); | |
329 | } | |
330 | ||
ce2918cb | 331 | static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
332 | uint32_t token, uint32_t nargs, |
333 | target_ulong args, uint32_t nret, | |
334 | target_ulong rets) | |
335 | { | |
336 | int32_t power_domain; | |
337 | ||
338 | if (nargs != 1 || nret != 2) { | |
339 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
340 | return; | |
341 | } | |
342 | ||
343 | /* we currently only use a single, "live insert" powerdomain for | |
344 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
345 | */ | |
346 | power_domain = rtas_ld(args, 0); | |
347 | if (power_domain != -1) { | |
348 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
349 | return; | |
350 | } | |
351 | ||
352 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
353 | rtas_st(rets, 1, 100); | |
354 | } | |
355 | ||
39ac8455 DG |
356 | static struct rtas_call { |
357 | const char *name; | |
358 | spapr_rtas_fn fn; | |
3a3b8502 | 359 | } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; |
39ac8455 | 360 | |
ce2918cb | 361 | target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr, |
39ac8455 DG |
362 | uint32_t token, uint32_t nargs, target_ulong args, |
363 | uint32_t nret, target_ulong rets) | |
364 | { | |
3a3b8502 AK |
365 | if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { |
366 | struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); | |
39ac8455 DG |
367 | |
368 | if (call->fn) { | |
210b580b | 369 | call->fn(cpu, spapr, token, nargs, args, nret, rets); |
39ac8455 DG |
370 | return H_SUCCESS; |
371 | } | |
372 | } | |
373 | ||
821303f5 DG |
374 | /* HACK: Some Linux early debug code uses RTAS display-character, |
375 | * but assumes the token value is 0xa (which it is on some real | |
376 | * machines) without looking it up in the device tree. This | |
377 | * special case makes this work */ | |
378 | if (token == 0xa) { | |
210b580b | 379 | rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); |
821303f5 DG |
380 | return H_SUCCESS; |
381 | } | |
382 | ||
39ac8455 | 383 | hcall_dprintf("Unknown RTAS token 0x%x\n", token); |
a64d325d | 384 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
39ac8455 DG |
385 | return H_PARAMETER; |
386 | } | |
387 | ||
eeddd59f LV |
388 | uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args, |
389 | uint32_t nret, uint64_t rets) | |
390 | { | |
391 | int token; | |
392 | ||
393 | for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) { | |
394 | if (strcmp(cmd, rtas_table[token].name) == 0) { | |
ce2918cb | 395 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
eeddd59f LV |
396 | PowerPCCPU *cpu = POWERPC_CPU(first_cpu); |
397 | ||
398 | rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE, | |
399 | nargs, args, nret, rets); | |
400 | return H_SUCCESS; | |
401 | } | |
402 | } | |
403 | return H_PARAMETER; | |
404 | } | |
405 | ||
3a3b8502 | 406 | void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) |
39ac8455 | 407 | { |
adf9ac50 | 408 | assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); |
c89d5299 | 409 | |
3a3b8502 | 410 | token -= RTAS_TOKEN_BASE; |
adf9ac50 | 411 | |
64db6c70 | 412 | assert(!name || !rtas_table[token].name); |
39ac8455 | 413 | |
3a3b8502 AK |
414 | rtas_table[token].name = name; |
415 | rtas_table[token].fn = fn; | |
39ac8455 DG |
416 | } |
417 | ||
3f5dabce | 418 | void spapr_dt_rtas_tokens(void *fdt, int rtas) |
39ac8455 | 419 | { |
39ac8455 DG |
420 | int i; |
421 | ||
3a3b8502 | 422 | for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { |
39ac8455 DG |
423 | struct rtas_call *call = &rtas_table[i]; |
424 | ||
d36b66f7 | 425 | if (!call->name) { |
39ac8455 DG |
426 | continue; |
427 | } | |
428 | ||
3f5dabce | 429 | _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE)); |
39ac8455 | 430 | } |
39ac8455 | 431 | } |
821303f5 | 432 | |
ce2918cb | 433 | void spapr_load_rtas(SpaprMachineState *spapr, void *fdt, hwaddr addr) |
2cac78c1 DG |
434 | { |
435 | int rtas_node; | |
436 | int ret; | |
437 | ||
438 | /* Copy RTAS blob into guest RAM */ | |
439 | cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size); | |
440 | ||
441 | ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size); | |
442 | if (ret < 0) { | |
443 | error_report("Couldn't add RTAS reserve entry: %s", | |
444 | fdt_strerror(ret)); | |
445 | exit(1); | |
446 | } | |
447 | ||
448 | /* Update the device tree with the blob's location */ | |
449 | rtas_node = fdt_path_offset(fdt, "/rtas"); | |
450 | assert(rtas_node >= 0); | |
451 | ||
452 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr); | |
453 | if (ret < 0) { | |
454 | error_report("Couldn't add linux,rtas-base property: %s", | |
455 | fdt_strerror(ret)); | |
456 | exit(1); | |
457 | } | |
458 | ||
459 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr); | |
460 | if (ret < 0) { | |
461 | error_report("Couldn't add linux,rtas-entry property: %s", | |
462 | fdt_strerror(ret)); | |
463 | exit(1); | |
464 | } | |
465 | ||
466 | ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size); | |
467 | if (ret < 0) { | |
468 | error_report("Couldn't add rtas-size property: %s", | |
469 | fdt_strerror(ret)); | |
470 | exit(1); | |
471 | } | |
472 | } | |
473 | ||
83f7d43a | 474 | static void core_rtas_register_types(void) |
821303f5 | 475 | { |
3a3b8502 AK |
476 | spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", |
477 | rtas_display_character); | |
3a3b8502 AK |
478 | spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); |
479 | spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", | |
480 | rtas_system_reboot); | |
481 | spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", | |
a9f8ad8f | 482 | rtas_query_cpu_stopped_state); |
3a3b8502 AK |
483 | spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); |
484 | spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); | |
485 | spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, | |
486 | "ibm,get-system-parameter", | |
3ada6b11 | 487 | rtas_ibm_get_system_parameter); |
3a3b8502 AK |
488 | spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, |
489 | "ibm,set-system-parameter", | |
3ada6b11 | 490 | rtas_ibm_set_system_parameter); |
2e14072f ND |
491 | spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", |
492 | rtas_ibm_os_term); | |
094d2058 NF |
493 | spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", |
494 | rtas_set_power_level); | |
495 | spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", | |
496 | rtas_get_power_level); | |
821303f5 | 497 | } |
83f7d43a AF |
498 | |
499 | type_init(core_rtas_register_types) |