]>
Commit | Line | Data |
---|---|---|
48e06fe0 BK |
1 | /* |
2 | * Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn | |
3 | * | |
4 | * This library is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU Lesser General Public | |
6 | * License as published by the Free Software Foundation; either | |
7 | * version 2 of the License, or (at your option) any later version. | |
8 | * | |
9 | * This library is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
12 | * Lesser General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU Lesser General Public | |
15 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #include <stdarg.h> | |
19 | #include <stdlib.h> | |
20 | #include <stdio.h> | |
21 | #include <string.h> | |
22 | #include <inttypes.h> | |
23 | #include <signal.h> | |
24 | ||
25 | #include "cpu.h" | |
26 | ||
2d30267e BK |
27 | enum { |
28 | TLBRET_DIRTY = -4, | |
29 | TLBRET_INVALID = -3, | |
30 | TLBRET_NOMATCH = -2, | |
31 | TLBRET_BADADDR = -1, | |
32 | TLBRET_MATCH = 0 | |
33 | }; | |
34 | ||
35 | #if defined(CONFIG_SOFTMMU) | |
36 | static int get_physical_address(CPUTriCoreState *env, hwaddr *physical, | |
37 | int *prot, target_ulong address, | |
38 | int rw, int access_type) | |
39 | { | |
40 | int ret = TLBRET_MATCH; | |
41 | ||
42 | *physical = address & 0xFFFFFFFF; | |
43 | *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; | |
44 | ||
45 | return ret; | |
46 | } | |
47 | #endif | |
48 | ||
49 | /* TODO: Add exeption support*/ | |
50 | static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address, | |
51 | int rw, int tlb_error) | |
52 | { | |
53 | } | |
54 | ||
48e06fe0 BK |
55 | int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address, |
56 | int rw, int mmu_idx) | |
57 | { | |
2d30267e BK |
58 | TriCoreCPU *cpu = TRICORE_CPU(cs); |
59 | CPUTriCoreState *env = &cpu->env; | |
60 | hwaddr physical; | |
61 | int prot; | |
62 | int access_type; | |
63 | int ret = 0; | |
64 | ||
65 | rw &= 1; | |
66 | access_type = ACCESS_INT; | |
67 | ret = get_physical_address(env, &physical, &prot, | |
68 | address, rw, access_type); | |
69 | qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx | |
70 | " prot %d\n", __func__, address, ret, physical, prot); | |
71 | ||
72 | if (ret == TLBRET_MATCH) { | |
73 | tlb_set_page(cs, address & TARGET_PAGE_MASK, | |
74 | physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, | |
75 | mmu_idx, TARGET_PAGE_SIZE); | |
76 | ret = 0; | |
77 | } else if (ret < 0) { | |
78 | raise_mmu_exception(env, address, rw, ret); | |
79 | ret = 1; | |
80 | } | |
81 | ||
82 | return ret; | |
48e06fe0 BK |
83 | } |
84 | ||
48e06fe0 BK |
85 | TriCoreCPU *cpu_tricore_init(const char *cpu_model) |
86 | { | |
87 | return TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)); | |
88 | } | |
89 | ||
90 | static void tricore_cpu_list_entry(gpointer data, gpointer user_data) | |
91 | { | |
92 | ObjectClass *oc = data; | |
93 | CPUListState *s = user_data; | |
94 | const char *typename; | |
95 | char *name; | |
96 | ||
97 | typename = object_class_get_name(oc); | |
98 | name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU)); | |
99 | (*s->cpu_fprintf)(s->file, " %s\n", | |
100 | name); | |
101 | g_free(name); | |
102 | } | |
103 | ||
104 | void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
105 | { | |
106 | CPUListState s = { | |
107 | .file = f, | |
108 | .cpu_fprintf = cpu_fprintf, | |
109 | }; | |
110 | GSList *list; | |
111 | ||
112 | list = object_class_get_list(TYPE_TRICORE_CPU, false); | |
113 | (*cpu_fprintf)(f, "Available CPUs:\n"); | |
114 | g_slist_foreach(list, tricore_cpu_list_entry, &s); | |
115 | g_slist_free(list); | |
116 | } | |
117 | ||
118 | uint32_t psw_read(CPUTriCoreState *env) | |
119 | { | |
120 | /* clear all USB bits */ | |
121 | env->PSW &= 0xffffff; | |
122 | /* now set them from the cache */ | |
123 | env->PSW |= ((env->PSW_USB_C != 0) << 31); | |
124 | env->PSW |= ((env->PSW_USB_V & (1 << 31)) >> 1); | |
125 | env->PSW |= ((env->PSW_USB_SV & (1 << 31)) >> 2); | |
126 | env->PSW |= ((env->PSW_USB_AV & (1 << 31)) >> 3); | |
127 | env->PSW |= ((env->PSW_USB_SAV & (1 << 31)) >> 4); | |
128 | ||
129 | return env->PSW; | |
130 | } | |
131 | ||
132 | void psw_write(CPUTriCoreState *env, uint32_t val) | |
133 | { | |
134 | env->PSW_USB_C = (val & MASK_USB_C); | |
135 | env->PSW_USB_V = (val & MASK_USB_V << 1); | |
136 | env->PSW_USB_SV = (val & MASK_USB_SV << 2); | |
137 | env->PSW_USB_AV = ((val & MASK_USB_AV) << 3); | |
138 | env->PSW_USB_SAV = ((val & MASK_USB_SAV) << 4); | |
139 | env->PSW = val; | |
140 | } |