[qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "dis-asm.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "disas.h"

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save minuscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

#ifdef TARGET_ARM
static int
print_insn_thumb1(bfd_vma pc, disassemble_info *info)
{
  return print_insn_arm(pc | 1, info);
}
#endif

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - 1 means 16 bit code, 2 means 64 bit code
    arm  - bit 0 = thumb, bit 1 = reverse endian
    ppc  - nonzero means little endian
    other targets - unused
 */
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
{
    target_ulong pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.read_memory_func = target_read_memory;
    disasm_info.buffer_vma = code;
    disasm_info.buffer_length = size;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    if (flags & 1) {
        print_insn = print_insn_thumb1;
    } else {
        print_insn = print_insn_arm;
    }
    if (flags & 2) {
#ifdef TARGET_WORDS_BIGENDIAN
        disasm_info.endian = BFD_ENDIAN_LITTLE;
#else
        disasm_info.endian = BFD_ENDIAN_BIG;
#endif
    }
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags >> 16)
        disasm_info.endian = BFD_ENDIAN_LITTLE;
    if (flags & 0xFFFF) {
        /* If we have a precise definitions of the instructions set, use it */
        disasm_info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        disasm_info.mach = bfd_mach_ppc64;
#else
        disasm_info.mach = bfd_mach_ppc;
#endif
    }
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    disasm_info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    disasm_info.mach = bfd_mach_alpha_ev6;
    print_insn = print_insn_alpha;
#elif defined(TARGET_CRIS)
    if (flags != 32) {
        disasm_info.mach = bfd_mach_cris_v0_v10;
        print_insn = print_insn_crisv10;
    } else {
        disasm_info.mach = bfd_mach_cris_v32;
        print_insn = print_insn_crisv32;
    }
#elif defined(TARGET_S390X)
    disasm_info.mach = bfd_mach_s390_64;
    print_insn = print_insn_s390;
#elif defined(TARGET_MICROBLAZE)
    disasm_info.mach = bfd_arch_microblaze;
    print_insn = print_insn_microblaze;
#elif defined(TARGET_LM32)
    disasm_info.mach = bfd_mach_lm32;
    print_insn = print_insn_lm32;
#else
    fprintf(out, "0x" TARGET_FMT_lx
	    ": Asm output not supported on this arch\n", code);
    return;
#endif

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &disasm_info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to [email protected]\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    uintptr_t pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.buffer = code;
    disasm_info.buffer_vma = (uintptr_t)code;
    disasm_info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(CONFIG_TCG_INTERPRETER)
    print_insn = print_insn_tci;
#elif defined(__i386__)
    disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    disasm_info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    print_insn = print_insn_ppc;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#else
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
	    (long) code);
    return;
#endif
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
	count = print_insn(pc, &disasm_info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor.h"

static int monitor_disas_is_physical;
static CPUArchState *monitor_disas_env;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    if (monitor_disas_is_physical) {
        cpu_physical_memory_read(memaddr, myaddr, length);
    } else {
        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
    }
    return 0;
}

static int GCC_FMT_ATTR(2, 3)
monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    monitor_vprintf((Monitor *)stream, fmt, ap);
    va_end(ap);
    return 0;
}

void monitor_disas(Monitor *mon, CPUArchState *env,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    int count, i;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);

    monitor_disas_env = env;
    monitor_disas_is_physical = is_physical;
    disasm_info.read_memory_func = monitor_read_memory;

    disasm_info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    print_insn = print_insn_arm;
#elif defined(TARGET_ALPHA)
    print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
#ifdef TARGET_PPC64
    disasm_info.mach = bfd_mach_ppc64;
#else
    disasm_info.mach = bfd_mach_ppc;
#endif
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    disasm_info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_S390X)
    disasm_info.mach = bfd_mach_s390_64;
    print_insn = print_insn_s390;
#elif defined(TARGET_LM32)
    disasm_info.mach = bfd_mach_lm32;
    print_insn = print_insn_lm32;
#else
    monitor_printf(mon, "0x" TARGET_FMT_lx
                   ": Asm output not supported on this arch\n", pc);
    return;
#endif

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
b9adb4a6	3	#include "dis-asm.h"
b9adb4a6	4	#include "elf.h"
aa0aa4fa	5	#include <errno.h>
b9adb4a6	6
c6105c0a	7	#include "cpu.h"
9307c4c1	8	#include "disas.h"
c6105c0a	9
b9adb4a6	10	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	11	struct syminfo *syminfos = NULL;
b9adb4a6	12
aa0aa4fa FB	13	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	14	Transfer them to myaddr. */
	15	int
3a742b76 PB	16	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	17	struct disassemble_info *info)
aa0aa4fa	18	{
c6105c0a FB	19	if (memaddr < info->buffer_vma
	20	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	21	/* Out of bounds. Use EIO because GDB uses it. */
	22	return EIO;
	23	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	24	return 0;
aa0aa4fa FB	25	}
aa0aa4fa FB	26
c6105c0a FB	27	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	28	Transfer them to myaddr. */
	29	static int
c27004ec FB	30	target_read_memory (bfd_vma memaddr,
	31	bfd_byte *myaddr,
	32	int length,
	33	struct disassemble_info *info)
c6105c0a	34	{
e612a1f7	35	cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a FB	36	return 0;
c6105c0a FB	37	}
c6105c0a	38
aa0aa4fa FB	39	/* Print an error message. We can assume that this is in response to
	40	an error return from buffer_read_memory. */
	41	void
3a742b76	42	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	43	{
	44	if (status != EIO)
	45	/* Can't happen. */
	46	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	47	else
	48	/* Actually, address between memaddr and memaddr + len was
	49	out of bounds. */
	50	(*info->fprintf_func) (info->stream,
26a76461	51	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	52	}
aa0aa4fa FB	53
a31f0531	54	/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa FB	55	in statically linked executables. */
	56
	57	/* Just print the address is hex. This is included for completeness even
	58	though both GDB and objdump provide their own (to print symbolic
	59	addresses). */
	60
	61	void
3a742b76	62	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	63	{
26a76461	64	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	65	}
	66
	67	/* Just return the given address. */
	68
	69	int
3a742b76	70	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	71	{
	72	return 1;
	73	}
	74
903ec55c AJ	75	bfd_vma bfd_getl64 (const bfd_byte *addr)
	76	{
	77	unsigned long long v;
	78
	79	v = (unsigned long long) addr[0];
	80	v \|= (unsigned long long) addr[1] << 8;
	81	v \|= (unsigned long long) addr[2] << 16;
	82	v \|= (unsigned long long) addr[3] << 24;
	83	v \|= (unsigned long long) addr[4] << 32;
	84	v \|= (unsigned long long) addr[5] << 40;
	85	v \|= (unsigned long long) addr[6] << 48;
	86	v \|= (unsigned long long) addr[7] << 56;
	87	return (bfd_vma) v;
	88	}
	89
aa0aa4fa FB	90	bfd_vma bfd_getl32 (const bfd_byte *addr)
	91	{
	92	unsigned long v;
	93
	94	v = (unsigned long) addr[0];
	95	v \|= (unsigned long) addr[1] << 8;
	96	v \|= (unsigned long) addr[2] << 16;
	97	v \|= (unsigned long) addr[3] << 24;
	98	return (bfd_vma) v;
	99	}
	100
	101	bfd_vma bfd_getb32 (const bfd_byte *addr)
	102	{
	103	unsigned long v;
	104
	105	v = (unsigned long) addr[0] << 24;
	106	v \|= (unsigned long) addr[1] << 16;
	107	v \|= (unsigned long) addr[2] << 8;
	108	v \|= (unsigned long) addr[3];
	109	return (bfd_vma) v;
	110	}
	111
6af0bf9c FB	112	bfd_vma bfd_getl16 (const bfd_byte *addr)
	113	{
	114	unsigned long v;
	115
	116	v = (unsigned long) addr[0];
	117	v \|= (unsigned long) addr[1] << 8;
	118	return (bfd_vma) v;
	119	}
	120
	121	bfd_vma bfd_getb16 (const bfd_byte *addr)
	122	{
	123	unsigned long v;
	124
	125	v = (unsigned long) addr[0] << 24;
	126	v \|= (unsigned long) addr[1] << 16;
	127	return (bfd_vma) v;
	128	}
	129
c2d551ff FB	130	#ifdef TARGET_ARM
	131	static int
	132	print_insn_thumb1(bfd_vma pc, disassemble_info *info)
	133	{
	134	return print_insn_arm(pc \| 1, info);
	135	}
	136	#endif
	137
e91c8a77	138	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff	139	values:
e99722f6	140	i386 - 1 means 16 bit code, 2 means 64 bit code
d8fd2954	141	arm - bit 0 = thumb, bit 1 = reverse endian
6a00d601	142	ppc - nonzero means little endian
c2d551ff FB	143	other targets - unused
c2d551ff FB	144	*/
83b34f8b	145	void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6	146	{
c27004ec	147	target_ulong pc;
b9adb4a6 FB	148	int count;
	149	struct disassemble_info disasm_info;
	150	int (print_insn)(bfd_vma pc, disassemble_info info);
	151
	152	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	153
c27004ec FB	154	disasm_info.read_memory_func = target_read_memory;
	155	disasm_info.buffer_vma = code;
	156	disasm_info.buffer_length = size;
	157
	158	#ifdef TARGET_WORDS_BIGENDIAN
	159	disasm_info.endian = BFD_ENDIAN_BIG;
	160	#else
	161	disasm_info.endian = BFD_ENDIAN_LITTLE;
	162	#endif
	163	#if defined(TARGET_I386)
	164	if (flags == 2)
	165	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	166	else if (flags == 1)
c27004ec FB	167	disasm_info.mach = bfd_mach_i386_i8086;
	168	else
	169	disasm_info.mach = bfd_mach_i386_i386;
	170	print_insn = print_insn_i386;
	171	#elif defined(TARGET_ARM)
d8fd2954 PB	172	if (flags & 1) {
	173	print_insn = print_insn_thumb1;
	174	} else {
	175	print_insn = print_insn_arm;
	176	}
	177	if (flags & 2) {
	178	#ifdef TARGET_WORDS_BIGENDIAN
	179	disasm_info.endian = BFD_ENDIAN_LITTLE;
	180	#else
	181	disasm_info.endian = BFD_ENDIAN_BIG;
	182	#endif
	183	}
c27004ec FB	184	#elif defined(TARGET_SPARC)
c27004ec FB	185	print_insn = print_insn_sparc;
3475187d FB	186	#ifdef TARGET_SPARC64
3475187d FB	187	disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624	188	#endif
c27004ec	189	#elif defined(TARGET_PPC)
237c0af0	190	if (flags >> 16)
111bfab3	191	disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0 JM	192	if (flags & 0xFFFF) {
	193	/* If we have a precise definitions of the instructions set, use it */
	194	disasm_info.mach = flags & 0xFFFF;
	195	} else {
a2458627	196	#ifdef TARGET_PPC64
237c0af0	197	disasm_info.mach = bfd_mach_ppc64;
a2458627	198	#else
237c0af0	199	disasm_info.mach = bfd_mach_ppc;
a2458627	200	#endif
237c0af0	201	}
c27004ec	202	print_insn = print_insn_ppc;
e6e5906b PB	203	#elif defined(TARGET_M68K)
e6e5906b PB	204	print_insn = print_insn_m68k;
6af0bf9c	205	#elif defined(TARGET_MIPS)
76b3030c	206	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	207	print_insn = print_insn_big_mips;
76b3030c FB	208	#else
	209	print_insn = print_insn_little_mips;
	210	#endif
fdf9b3e8 FB	211	#elif defined(TARGET_SH4)
	212	disasm_info.mach = bfd_mach_sh4;
	213	print_insn = print_insn_sh;
eddf68a6	214	#elif defined(TARGET_ALPHA)
b9bec751	215	disasm_info.mach = bfd_mach_alpha_ev6;
eddf68a6	216	print_insn = print_insn_alpha;
a25fd137	217	#elif defined(TARGET_CRIS)
b09cd072 EI	218	if (flags != 32) {
	219	disasm_info.mach = bfd_mach_cris_v0_v10;
	220	print_insn = print_insn_crisv10;
	221	} else {
	222	disasm_info.mach = bfd_mach_cris_v32;
	223	print_insn = print_insn_crisv32;
	224	}
db500609 UH	225	#elif defined(TARGET_S390X)
	226	disasm_info.mach = bfd_mach_s390_64;
	227	print_insn = print_insn_s390;
e90e390c EI	228	#elif defined(TARGET_MICROBLAZE)
	229	disasm_info.mach = bfd_arch_microblaze;
	230	print_insn = print_insn_microblaze;
79368f49 MW	231	#elif defined(TARGET_LM32)
	232	disasm_info.mach = bfd_mach_lm32;
	233	print_insn = print_insn_lm32;
c27004ec	234	#else
b8076a74 FB	235	fprintf(out, "0x" TARGET_FMT_lx
b8076a74 FB	236	": Asm output not supported on this arch\n", code);
c27004ec	237	return;
c6105c0a FB	238	#endif
c6105c0a FB	239
7e000c2e	240	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	241	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec FB	242	count = print_insn(pc, &disasm_info);
	243	#if 0
	244	{
	245	int i;
	246	uint8_t b;
	247	fprintf(out, " {");
	248	for(i = 0; i < count; i++) {
	249	target_read_memory(pc + i, &b, 1, &disasm_info);
	250	fprintf(out, " %02x", b);
	251	}
	252	fprintf(out, " }");
	253	}
	254	#endif
	255	fprintf(out, "\n");
	256	if (count < 0)
	257	break;
754d00ae	258	if (size < count) {
	259	fprintf(out,
	260	"Disassembler disagrees with translator over instruction "
	261	"decoding\n"
	262	"Please report this to [email protected]\n");
	263	break;
	264	}
c27004ec FB	265	}
	266	}
	267
	268	/* Disassemble this for me please... (debugging). */
	269	void disas(FILE out, void code, unsigned long size)
	270	{
b0b0f1c9	271	uintptr_t pc;
c27004ec FB	272	int count;
	273	struct disassemble_info disasm_info;
	274	int (print_insn)(bfd_vma pc, disassemble_info info);
	275
	276	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	277
b9adb4a6	278	disasm_info.buffer = code;
b0b0f1c9	279	disasm_info.buffer_vma = (uintptr_t)code;
b9adb4a6 FB	280	disasm_info.buffer_length = size;
b9adb4a6 FB	281
e2542fe2	282	#ifdef HOST_WORDS_BIGENDIAN
c27004ec	283	disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6	284	#else
c27004ec	285	disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	286	#endif
5826e519 SW	287	#if defined(CONFIG_TCG_INTERPRETER)
	288	print_insn = print_insn_tci;
	289	#elif defined(__i386__)
c27004ec FB	290	disasm_info.mach = bfd_mach_i386_i386;
c27004ec FB	291	print_insn = print_insn_i386;
bc51c5c9	292	#elif defined(__x86_64__)
c27004ec FB	293	disasm_info.mach = bfd_mach_x86_64;
c27004ec FB	294	print_insn = print_insn_i386;
e58ffeb3	295	#elif defined(_ARCH_PPC)
c27004ec	296	print_insn = print_insn_ppc;
a993ba85	297	#elif defined(__alpha__)
c27004ec	298	print_insn = print_insn_alpha;
aa0aa4fa	299	#elif defined(__sparc__)
c27004ec	300	print_insn = print_insn_sparc;
6ecd4534 BS	301	#if defined(__sparc_v8plus__) \|\| defined(__sparc_v8plusa__) \|\| defined(__sparc_v9__)
	302	disasm_info.mach = bfd_mach_sparc_v9b;
	303	#endif
5fafdf24	304	#elif defined(__arm__)
c27004ec	305	print_insn = print_insn_arm;
6af0bf9c FB	306	#elif defined(__MIPSEB__)
	307	print_insn = print_insn_big_mips;
	308	#elif defined(__MIPSEL__)
	309	print_insn = print_insn_little_mips;
48024e4a FB	310	#elif defined(__m68k__)
48024e4a FB	311	print_insn = print_insn_m68k;
8f860bb8 TS	312	#elif defined(__s390__)
8f860bb8 TS	313	print_insn = print_insn_s390;
f54b3f92 AJ	314	#elif defined(__hppa__)
f54b3f92 AJ	315	print_insn = print_insn_hppa;
903ec55c AJ	316	#elif defined(__ia64__)
903ec55c AJ	317	print_insn = print_insn_ia64;
b9adb4a6	318	#else
b8076a74 FB	319	fprintf(out, "0x%lx: Asm output not supported on this arch\n",
b8076a74 FB	320	(long) code);
c27004ec	321	return;
b9adb4a6	322	#endif
b0b0f1c9 SW	323	for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
b0b0f1c9 SW	324	fprintf(out, "0x%08" PRIxPTR ": ", pc);
c27004ec	325	count = print_insn(pc, &disasm_info);
b9adb4a6 FB	326	fprintf(out, "\n");
	327	if (count < 0)
	328	break;
	329	}
	330	}
	331
	332	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	333	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	334	{
49918a75	335	const char *symbol = "";
e80cfcfc	336	struct syminfo *s;
3b46e624	337
e80cfcfc	338	for (s = syminfos; s; s = s->next) {
49918a75 PB	339	symbol = s->lookup_symbol(s, orig_addr);
	340	if (symbol[0] != '\0') {
	341	break;
	342	}
b9adb4a6	343	}
49918a75 PB	344
49918a75 PB	345	return symbol;
b9adb4a6	346	}
9307c4c1 FB	347
	348	#if !defined(CONFIG_USER_ONLY)
	349
376253ec	350	#include "monitor.h"
3d2cfdf1	351
9307c4c1	352	static int monitor_disas_is_physical;
9349b4f9	353	static CPUArchState *monitor_disas_env;
9307c4c1 FB	354
9307c4c1 FB	355	static int
a5f1b965 BS	356	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	357	struct disassemble_info *info)
9307c4c1 FB	358	{
9307c4c1 FB	359	if (monitor_disas_is_physical) {
54f7b4a3	360	cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1	361	} else {
6a00d601	362	cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1 FB	363	}
	364	return 0;
	365	}
	366
8b7968f7 SW	367	static int GCC_FMT_ATTR(2, 3)
8b7968f7 SW	368	monitor_fprintf(FILE stream, const char fmt, ...)
3d2cfdf1 FB	369	{
	370	va_list ap;
	371	va_start(ap, fmt);
376253ec	372	monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1 FB	373	va_end(ap);
	374	return 0;
	375	}
	376
9349b4f9	377	void monitor_disas(Monitor mon, CPUArchState env,
6a00d601	378	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	379	{
9307c4c1 FB	380	int count, i;
	381	struct disassemble_info disasm_info;
	382	int (print_insn)(bfd_vma pc, disassemble_info info);
	383
376253ec	384	INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1	385
6a00d601	386	monitor_disas_env = env;
9307c4c1 FB	387	monitor_disas_is_physical = is_physical;
	388	disasm_info.read_memory_func = monitor_read_memory;
	389
	390	disasm_info.buffer_vma = pc;
	391
	392	#ifdef TARGET_WORDS_BIGENDIAN
	393	disasm_info.endian = BFD_ENDIAN_BIG;
	394	#else
	395	disasm_info.endian = BFD_ENDIAN_LITTLE;
	396	#endif
	397	#if defined(TARGET_I386)
fa15e030 FB	398	if (flags == 2)
fa15e030 FB	399	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	400	else if (flags == 1)
9307c4c1	401	disasm_info.mach = bfd_mach_i386_i8086;
fa15e030 FB	402	else
fa15e030 FB	403	disasm_info.mach = bfd_mach_i386_i386;
9307c4c1 FB	404	print_insn = print_insn_i386;
	405	#elif defined(TARGET_ARM)
	406	print_insn = print_insn_arm;
cbd669da TS	407	#elif defined(TARGET_ALPHA)
cbd669da TS	408	print_insn = print_insn_alpha;
9307c4c1 FB	409	#elif defined(TARGET_SPARC)
9307c4c1 FB	410	print_insn = print_insn_sparc;
682c4f15 BS	411	#ifdef TARGET_SPARC64
	412	disasm_info.mach = bfd_mach_sparc_v9b;
	413	#endif
9307c4c1	414	#elif defined(TARGET_PPC)
a2458627 FB	415	#ifdef TARGET_PPC64
	416	disasm_info.mach = bfd_mach_ppc64;
	417	#else
	418	disasm_info.mach = bfd_mach_ppc;
	419	#endif
9307c4c1	420	print_insn = print_insn_ppc;
e6e5906b PB	421	#elif defined(TARGET_M68K)
e6e5906b PB	422	print_insn = print_insn_m68k;
6af0bf9c	423	#elif defined(TARGET_MIPS)
76b3030c	424	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	425	print_insn = print_insn_big_mips;
76b3030c FB	426	#else
	427	print_insn = print_insn_little_mips;
	428	#endif
b4e1f077 MD	429	#elif defined(TARGET_SH4)
	430	disasm_info.mach = bfd_mach_sh4;
	431	print_insn = print_insn_sh;
db500609 UH	432	#elif defined(TARGET_S390X)
	433	disasm_info.mach = bfd_mach_s390_64;
	434	print_insn = print_insn_s390;
79368f49 MW	435	#elif defined(TARGET_LM32)
	436	disasm_info.mach = bfd_mach_lm32;
	437	print_insn = print_insn_lm32;
9307c4c1	438	#else
376253ec AL	439	monitor_printf(mon, "0x" TARGET_FMT_lx
376253ec AL	440	": Asm output not supported on this arch\n", pc);
9307c4c1 FB	441	return;
	442	#endif
	443
	444	for(i = 0; i < nb_insn; i++) {
376253ec	445	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1	446	count = print_insn(pc, &disasm_info);
376253ec	447	monitor_printf(mon, "\n");
9307c4c1 FB	448	if (count < 0)
	449	break;
	450	pc += count;
	451	}
	452	}
	453	#endif