[qemu.git] / hw / arm / xlnx-zcu102.c

/*
 * Xilinx ZynqMP ZCU102 board
 *
 * Copyright (C) 2015 Xilinx Inc
 * Written by Peter Crosthwaite <[email protected]>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
 * for more details.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "sysemu/qtest.h"

typedef struct XlnxZCU102 {
    MachineState parent_obj;

    XlnxZynqMPState soc;
    MemoryRegion ddr_ram;

    bool secure;
    bool virt;
} XlnxZCU102;

#define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
#define ZCU102_MACHINE(obj) \
    OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)

static struct arm_boot_info xlnx_zcu102_binfo;

static bool zcu102_get_secure(Object *obj, Error **errp)
{
    XlnxZCU102 *s = ZCU102_MACHINE(obj);

    return s->secure;
}

static void zcu102_set_secure(Object *obj, bool value, Error **errp)
{
    XlnxZCU102 *s = ZCU102_MACHINE(obj);

    s->secure = value;
}

static bool zcu102_get_virt(Object *obj, Error **errp)
{
    XlnxZCU102 *s = ZCU102_MACHINE(obj);

    return s->virt;
}

static void zcu102_set_virt(Object *obj, bool value, Error **errp)
{
    XlnxZCU102 *s = ZCU102_MACHINE(obj);

    s->virt = value;
}

static void xlnx_zcu102_init(MachineState *machine)
{
    XlnxZCU102 *s = ZCU102_MACHINE(machine);
    int i;
    uint64_t ram_size = machine->ram_size;

    /* Create the memory region to pass to the SoC */
    if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
        error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
                     "0x%llx", ram_size,
                     XLNX_ZYNQMP_MAX_RAM_SIZE);
        exit(1);
    }

    if (ram_size < 0x08000000) {
        qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
                 ram_size);
    }

    memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
                                         ram_size);

    object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
    object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
                              &error_abort);

    object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
                         "ddr-ram", &error_abort);
    object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
                             &error_fatal);
    object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
                             &error_fatal);

    object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);

    /* Create and plug in the SD cards */
    for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
        BusState *bus;
        DriveInfo *di = drive_get_next(IF_SD);
        BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
        DeviceState *carddev;
        char *bus_name;

        bus_name = g_strdup_printf("sd-bus%d", i);
        bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
        g_free(bus_name);
        if (!bus) {
            error_report("No SD bus found for SD card %d", i);
            exit(1);
        }
        carddev = qdev_create(bus, TYPE_SD_CARD);
        qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
        object_property_set_bool(OBJECT(carddev), true, "realized",
                                 &error_fatal);
    }

    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
        SSIBus *spi_bus;
        DeviceState *flash_dev;
        qemu_irq cs_line;
        DriveInfo *dinfo = drive_get_next(IF_MTD);
        gchar *bus_name = g_strdup_printf("spi%d", i);

        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
        g_free(bus_name);

        flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
        if (dinfo) {
            qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
                                &error_fatal);
        }
        qdev_init_nofail(flash_dev);

        cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
    }

    for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
        SSIBus *spi_bus;
        DeviceState *flash_dev;
        qemu_irq cs_line;
        DriveInfo *dinfo = drive_get_next(IF_MTD);
        int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
        gchar *bus_name = g_strdup_printf("qspi%d", bus);

        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
        g_free(bus_name);

        flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");
        if (dinfo) {
            qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
                                &error_fatal);
        }
        qdev_init_nofail(flash_dev);

        cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
    }

    /* TODO create and connect IDE devices for ide_drive_get() */

    xlnx_zcu102_binfo.ram_size = ram_size;
    xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
    xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
    xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
    xlnx_zcu102_binfo.loader_start = 0;
    arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
}

static void xlnx_zcu102_machine_instance_init(Object *obj)
{
    XlnxZCU102 *s = ZCU102_MACHINE(obj);

    /* Default to secure mode being disabled */
    s->secure = false;
    object_property_add_bool(obj, "secure", zcu102_get_secure,
                             zcu102_set_secure, NULL);
    object_property_set_description(obj, "secure",
                                    "Set on/off to enable/disable the ARM "
                                    "Security Extensions (TrustZone)",
                                    NULL);

    /* Default to virt (EL2) being disabled */
    s->virt = false;
    object_property_add_bool(obj, "virtualization", zcu102_get_virt,
                             zcu102_set_virt, NULL);
    object_property_set_description(obj, "virtualization",
                                    "Set on/off to enable/disable emulating a "
                                    "guest CPU which implements the ARM "
                                    "Virtualization Extensions",
                                    NULL);
}

static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
               "the value of smp";
    mc->init = xlnx_zcu102_init;
    mc->block_default_type = IF_IDE;
    mc->units_per_default_bus = 1;
    mc->ignore_memory_transaction_failures = true;
    mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
    mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
}

static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
    .name       = MACHINE_TYPE_NAME("xlnx-zcu102"),
    .parent     = TYPE_MACHINE,
    .class_init = xlnx_zcu102_machine_class_init,
    .instance_init = xlnx_zcu102_machine_instance_init,
    .instance_size = sizeof(XlnxZCU102),
};

static void xlnx_zcu102_machine_init_register_types(void)
{
    type_register_static(&xlnx_zcu102_machine_init_typeinfo);
}

type_init(xlnx_zcu102_machine_init_register_types)
Commit	Line	Data
859a0c5b	1	/*
aff3f0f1	2	* Xilinx ZynqMP ZCU102 board
859a0c5b PC	3	*
	4	* Copyright (C) 2015 Xilinx Inc
	5	* Written by Peter Crosthwaite <[email protected]>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful, but WITHOUT
	13	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	14	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	15	* for more details.
	16	*/
	17
12b16722	18	#include "qemu/osdep.h"
da34e65c	19	#include "qapi/error.h"
4771d756 PB	20	#include "qemu-common.h"
4771d756 PB	21	#include "cpu.h"
859a0c5b PC	22	#include "hw/arm/xlnx-zynqmp.h"
	23	#include "hw/boards.h"
	24	#include "qemu/error-report.h"
03dd024f	25	#include "qemu/log.h"
b350ae13	26	#include "sysemu/qtest.h"
859a0c5b	27
aff3f0f1	28	typedef struct XlnxZCU102 {
b70cf33f AF	29	MachineState parent_obj;
b70cf33f AF	30
859a0c5b	31	XlnxZynqMPState soc;
b79b9d28	32	MemoryRegion ddr_ram;
b7436e94 AF	33
b7436e94 AF	34	bool secure;
1946809e	35	bool virt;
aff3f0f1	36	} XlnxZCU102;
859a0c5b	37
b70cf33f AF	38	#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
	39	#define ZCU102_MACHINE(obj) \
	40	OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
	41
aff3f0f1	42	static struct arm_boot_info xlnx_zcu102_binfo;
082587b7	43
b7436e94 AF	44	static bool zcu102_get_secure(Object obj, Error *errp)
	45	{
	46	XlnxZCU102 *s = ZCU102_MACHINE(obj);
	47
	48	return s->secure;
	49	}
	50
	51	static void zcu102_set_secure(Object obj, bool value, Error *errp)
	52	{
	53	XlnxZCU102 *s = ZCU102_MACHINE(obj);
	54
	55	s->secure = value;
	56	}
	57
1946809e AF	58	static bool zcu102_get_virt(Object obj, Error *errp)
	59	{
	60	XlnxZCU102 *s = ZCU102_MACHINE(obj);
	61
	62	return s->virt;
	63	}
	64
	65	static void zcu102_set_virt(Object obj, bool value, Error *errp)
	66	{
	67	XlnxZCU102 *s = ZCU102_MACHINE(obj);
	68
	69	s->virt = value;
	70	}
	71
da969774	72	static void xlnx_zcu102_init(MachineState *machine)
859a0c5b	73	{
da969774	74	XlnxZCU102 *s = ZCU102_MACHINE(machine);
a4b26335	75	int i;
dc3b89ef AF	76	uint64_t ram_size = machine->ram_size;
	77
	78	/* Create the memory region to pass to the SoC */
	79	if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
	80	error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
	81	"0x%llx", ram_size,
	82	XLNX_ZYNQMP_MAX_RAM_SIZE);
	83	exit(1);
	84	}
	85
	86	if (ram_size < 0x08000000) {
aff3f0f1	87	qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
dc3b89ef AF	88	ram_size);
	89	}
	90
	91	memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
	92	ram_size);
859a0c5b PC	93
	94	object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
	95	object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc),
	96	&error_abort);
	97
dc3b89ef AF	98	object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
dc3b89ef AF	99	"ddr-ram", &error_abort);
b7436e94 AF	100	object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
b7436e94 AF	101	&error_fatal);
1946809e AF	102	object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
1946809e AF	103	&error_fatal);
dc3b89ef	104
07d04a02	105	object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
b79b9d28	106
eb4f566b PM	107	/* Create and plug in the SD cards */
	108	for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
	109	BusState *bus;
	110	DriveInfo *di = drive_get_next(IF_SD);
	111	BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
	112	DeviceState *carddev;
	113	char *bus_name;
	114
	115	bus_name = g_strdup_printf("sd-bus%d", i);
	116	bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
	117	g_free(bus_name);
	118	if (!bus) {
	119	error_report("No SD bus found for SD card %d", i);
	120	exit(1);
	121	}
	122	carddev = qdev_create(bus, TYPE_SD_CARD);
	123	qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
	124	object_property_set_bool(OBJECT(carddev), true, "realized",
	125	&error_fatal);
	126	}
	127
a4b26335 AF	128	for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
	129	SSIBus *spi_bus;
	130	DeviceState *flash_dev;
	131	qemu_irq cs_line;
73bce518	132	DriveInfo *dinfo = drive_get_next(IF_MTD);
a4b26335 AF	133	gchar *bus_name = g_strdup_printf("spi%d", i);
	134
	135	spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
	136	g_free(bus_name);
	137
73bce518 PB	138	flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
	139	if (dinfo) {
	140	qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
	141	&error_fatal);
	142	}
	143	qdev_init_nofail(flash_dev);
	144
a4b26335 AF	145	cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
	146
	147	sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
	148	}
	149
babc1f30 FI	150	for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
	151	SSIBus *spi_bus;
	152	DeviceState *flash_dev;
	153	qemu_irq cs_line;
	154	DriveInfo *dinfo = drive_get_next(IF_MTD);
	155	int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
	156	gchar *bus_name = g_strdup_printf("qspi%d", bus);
	157
	158	spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
	159	g_free(bus_name);
	160
	161	flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");
	162	if (dinfo) {
	163	qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
	164	&error_fatal);
	165	}
	166	qdev_init_nofail(flash_dev);
	167
	168	cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
	169
	170	sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
	171	}
	172
e0319b03 MA	173	/* TODO create and connect IDE devices for ide_drive_get() */
e0319b03 MA	174
aff3f0f1 AF	175	xlnx_zcu102_binfo.ram_size = ram_size;
	176	xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
	177	xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
	178	xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
	179	xlnx_zcu102_binfo.loader_start = 0;
	180	arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
859a0c5b PC	181	}
859a0c5b PC	182
b70cf33f AF	183	static void xlnx_zcu102_machine_instance_init(Object *obj)
b70cf33f AF	184	{
b7436e94 AF	185	XlnxZCU102 *s = ZCU102_MACHINE(obj);
	186
	187	/* Default to secure mode being disabled */
	188	s->secure = false;
	189	object_property_add_bool(obj, "secure", zcu102_get_secure,
	190	zcu102_set_secure, NULL);
	191	object_property_set_description(obj, "secure",
	192	"Set on/off to enable/disable the ARM "
	193	"Security Extensions (TrustZone)",
	194	NULL);
1946809e AF	195
	196	/* Default to virt (EL2) being disabled */
	197	s->virt = false;
	198	object_property_add_bool(obj, "virtualization", zcu102_get_virt,
	199	zcu102_set_virt, NULL);
	200	object_property_set_description(obj, "virtualization",
	201	"Set on/off to enable/disable emulating a "
	202	"guest CPU which implements the ARM "
	203	"Virtualization Extensions",
	204	NULL);
b70cf33f AF	205	}
	206
	207	static void xlnx_zcu102_machine_class_init(ObjectClass oc, void data)
	208	{
	209	MachineClass *mc = MACHINE_CLASS(oc);
	210
eb24d4d3	211	mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
6908ec44	212	"the value of smp";
aff3f0f1	213	mc->init = xlnx_zcu102_init;
e0319b03 MA	214	mc->block_default_type = IF_IDE;
e0319b03 MA	215	mc->units_per_default_bus = 1;
4672cbd7	216	mc->ignore_memory_transaction_failures = true;
0f2bf05c	217	mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
72649619	218	mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
0c18c6c6 AF	219	}
0c18c6c6 AF	220
b70cf33f AF	221	static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
	222	.name = MACHINE_TYPE_NAME("xlnx-zcu102"),
	223	.parent = TYPE_MACHINE,
	224	.class_init = xlnx_zcu102_machine_class_init,
	225	.instance_init = xlnx_zcu102_machine_instance_init,
	226	.instance_size = sizeof(XlnxZCU102),
	227	};
	228
	229	static void xlnx_zcu102_machine_init_register_types(void)
	230	{
	231	type_register_static(&xlnx_zcu102_machine_init_typeinfo);
	232	}
	233
	234	type_init(xlnx_zcu102_machine_init_register_types)