[qemu.git] / hw / riscv / Kconfig

config HTIF
    bool

config HART
    bool

config SIFIVE
    bool

config SIFIVE_E
    bool
    select HART
    select SIFIVE

config SIFIVE_U
    bool
    select CADENCE
    select HART
    select SIFIVE

config SPIKE
    bool
    select HART
    select HTIF
    select SIFIVE

config RISCV_VIRT
    bool
    select HART
    select SERIAL
    select VIRTIO_MMIO
    select PCI_EXPRESS_GENERIC_BRIDGE
    select SIFIVE
Commit	Line	Data
82f51817 PB	1	config HTIF
	2	bool
	3
	4	config HART
	5	bool
	6
	7	config SIFIVE
	8	bool
	9
	10	config SIFIVE_E
	11	bool
82a230d5 PB	12	select HART
82a230d5 PB	13	select SIFIVE
82f51817 PB	14
	15	config SIFIVE_U
	16	bool
82a230d5 PB	17	select CADENCE
	18	select HART
	19	select SIFIVE
82f51817 PB	20
	21	config SPIKE
	22	bool
82a230d5 PB	23	select HART
	24	select HTIF
	25	select SIFIVE
82f51817 PB	26
	27	config RISCV_VIRT
	28	bool
82a230d5 PB	29	select HART
	30	select SERIAL
	31	select VIRTIO_MMIO
	32	select PCI_EXPRESS_GENERIC_BRIDGE
	33	select SIFIVE