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Commit | Line | Data |
---|---|---|
895c2d04 BS |
1 | DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int) |
2 | DEF_HELPER_2(raise_exception, noreturn, env, i32) | |
9c708c7f | 3 | DEF_HELPER_1(raise_exception_debug, noreturn, env) |
7dd9e556 | 4 | |
82ba4266 | 5 | #ifndef CONFIG_USER_ONLY |
3b3c1694 | 6 | DEF_HELPER_1(do_semihosting, void, env) |
82ba4266 | 7 | #endif |
3b3c1694 | 8 | |
c8c2227e | 9 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
10 | DEF_HELPER_4(sdl, void, env, tl, tl, int) |
11 | DEF_HELPER_4(sdr, void, env, tl, tl, int) | |
c8c2227e | 12 | #endif |
895c2d04 BS |
13 | DEF_HELPER_4(swl, void, env, tl, tl, int) |
14 | DEF_HELPER_4(swr, void, env, tl, tl, int) | |
c8c2227e | 15 | |
e7139c44 | 16 | #ifndef CONFIG_USER_ONLY |
895c2d04 | 17 | DEF_HELPER_3(ll, tl, env, tl, int) |
e7139c44 | 18 | #ifdef TARGET_MIPS64 |
895c2d04 | 19 | DEF_HELPER_3(lld, tl, env, tl, int) |
e7139c44 AJ |
20 | #endif |
21 | #endif | |
22 | ||
895c2d04 BS |
23 | DEF_HELPER_3(muls, tl, env, tl, tl) |
24 | DEF_HELPER_3(mulsu, tl, env, tl, tl) | |
25 | DEF_HELPER_3(macc, tl, env, tl, tl) | |
26 | DEF_HELPER_3(maccu, tl, env, tl, tl) | |
27 | DEF_HELPER_3(msac, tl, env, tl, tl) | |
28 | DEF_HELPER_3(msacu, tl, env, tl, tl) | |
29 | DEF_HELPER_3(mulhi, tl, env, tl, tl) | |
30 | DEF_HELPER_3(mulhiu, tl, env, tl, tl) | |
31 | DEF_HELPER_3(mulshi, tl, env, tl, tl) | |
32 | DEF_HELPER_3(mulshiu, tl, env, tl, tl) | |
33 | DEF_HELPER_3(macchi, tl, env, tl, tl) | |
34 | DEF_HELPER_3(macchiu, tl, env, tl, tl) | |
35 | DEF_HELPER_3(msachi, tl, env, tl, tl) | |
36 | DEF_HELPER_3(msachiu, tl, env, tl, tl) | |
92af06d2 | 37 | |
15eacb9b YK |
38 | DEF_HELPER_FLAGS_1(bitswap, TCG_CALL_NO_RWG_SE, tl, tl) |
39 | #ifdef TARGET_MIPS64 | |
40 | DEF_HELPER_FLAGS_1(dbitswap, TCG_CALL_NO_RWG_SE, tl, tl) | |
41 | #endif | |
42 | ||
e222f506 MF |
43 | DEF_HELPER_FLAGS_4(rotx, TCG_CALL_NO_RWG_SE, tl, tl, i32, i32, i32) |
44 | ||
f1aa6320 | 45 | #ifndef CONFIG_USER_ONLY |
0eaef5aa | 46 | /* CP0 helpers */ |
895c2d04 BS |
47 | DEF_HELPER_1(mfc0_mvpcontrol, tl, env) |
48 | DEF_HELPER_1(mfc0_mvpconf0, tl, env) | |
49 | DEF_HELPER_1(mfc0_mvpconf1, tl, env) | |
50 | DEF_HELPER_1(mftc0_vpecontrol, tl, env) | |
51 | DEF_HELPER_1(mftc0_vpeconf0, tl, env) | |
52 | DEF_HELPER_1(mfc0_random, tl, env) | |
53 | DEF_HELPER_1(mfc0_tcstatus, tl, env) | |
54 | DEF_HELPER_1(mftc0_tcstatus, tl, env) | |
55 | DEF_HELPER_1(mfc0_tcbind, tl, env) | |
56 | DEF_HELPER_1(mftc0_tcbind, tl, env) | |
57 | DEF_HELPER_1(mfc0_tcrestart, tl, env) | |
58 | DEF_HELPER_1(mftc0_tcrestart, tl, env) | |
59 | DEF_HELPER_1(mfc0_tchalt, tl, env) | |
60 | DEF_HELPER_1(mftc0_tchalt, tl, env) | |
61 | DEF_HELPER_1(mfc0_tccontext, tl, env) | |
62 | DEF_HELPER_1(mftc0_tccontext, tl, env) | |
63 | DEF_HELPER_1(mfc0_tcschedule, tl, env) | |
64 | DEF_HELPER_1(mftc0_tcschedule, tl, env) | |
65 | DEF_HELPER_1(mfc0_tcschefback, tl, env) | |
66 | DEF_HELPER_1(mftc0_tcschefback, tl, env) | |
67 | DEF_HELPER_1(mfc0_count, tl, env) | |
5fb2dcd1 YK |
68 | DEF_HELPER_1(mfc0_saar, tl, env) |
69 | DEF_HELPER_1(mfhc0_saar, tl, env) | |
895c2d04 BS |
70 | DEF_HELPER_1(mftc0_entryhi, tl, env) |
71 | DEF_HELPER_1(mftc0_status, tl, env) | |
72 | DEF_HELPER_1(mftc0_cause, tl, env) | |
73 | DEF_HELPER_1(mftc0_epc, tl, env) | |
74 | DEF_HELPER_1(mftc0_ebase, tl, env) | |
75 | DEF_HELPER_2(mftc0_configx, tl, env, tl) | |
76 | DEF_HELPER_1(mfc0_lladdr, tl, env) | |
f6d4dd81 YK |
77 | DEF_HELPER_1(mfc0_maar, tl, env) |
78 | DEF_HELPER_1(mfhc0_maar, tl, env) | |
895c2d04 BS |
79 | DEF_HELPER_2(mfc0_watchlo, tl, env, i32) |
80 | DEF_HELPER_2(mfc0_watchhi, tl, env, i32) | |
feafe82c | 81 | DEF_HELPER_2(mfhc0_watchhi, tl, env, i32) |
895c2d04 BS |
82 | DEF_HELPER_1(mfc0_debug, tl, env) |
83 | DEF_HELPER_1(mftc0_debug, tl, env) | |
f1aa6320 | 84 | #ifdef TARGET_MIPS64 |
895c2d04 BS |
85 | DEF_HELPER_1(dmfc0_tcrestart, tl, env) |
86 | DEF_HELPER_1(dmfc0_tchalt, tl, env) | |
87 | DEF_HELPER_1(dmfc0_tccontext, tl, env) | |
88 | DEF_HELPER_1(dmfc0_tcschedule, tl, env) | |
89 | DEF_HELPER_1(dmfc0_tcschefback, tl, env) | |
90 | DEF_HELPER_1(dmfc0_lladdr, tl, env) | |
f6d4dd81 | 91 | DEF_HELPER_1(dmfc0_maar, tl, env) |
895c2d04 | 92 | DEF_HELPER_2(dmfc0_watchlo, tl, env, i32) |
feafe82c | 93 | DEF_HELPER_2(dmfc0_watchhi, tl, env, i32) |
5fb2dcd1 | 94 | DEF_HELPER_1(dmfc0_saar, tl, env) |
f1aa6320 TS |
95 | #endif /* TARGET_MIPS64 */ |
96 | ||
895c2d04 BS |
97 | DEF_HELPER_2(mtc0_index, void, env, tl) |
98 | DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl) | |
99 | DEF_HELPER_2(mtc0_vpecontrol, void, env, tl) | |
100 | DEF_HELPER_2(mttc0_vpecontrol, void, env, tl) | |
101 | DEF_HELPER_2(mtc0_vpeconf0, void, env, tl) | |
102 | DEF_HELPER_2(mttc0_vpeconf0, void, env, tl) | |
103 | DEF_HELPER_2(mtc0_vpeconf1, void, env, tl) | |
104 | DEF_HELPER_2(mtc0_yqmask, void, env, tl) | |
105 | DEF_HELPER_2(mtc0_vpeopt, void, env, tl) | |
106 | DEF_HELPER_2(mtc0_entrylo0, void, env, tl) | |
107 | DEF_HELPER_2(mtc0_tcstatus, void, env, tl) | |
108 | DEF_HELPER_2(mttc0_tcstatus, void, env, tl) | |
109 | DEF_HELPER_2(mtc0_tcbind, void, env, tl) | |
110 | DEF_HELPER_2(mttc0_tcbind, void, env, tl) | |
111 | DEF_HELPER_2(mtc0_tcrestart, void, env, tl) | |
112 | DEF_HELPER_2(mttc0_tcrestart, void, env, tl) | |
113 | DEF_HELPER_2(mtc0_tchalt, void, env, tl) | |
114 | DEF_HELPER_2(mttc0_tchalt, void, env, tl) | |
115 | DEF_HELPER_2(mtc0_tccontext, void, env, tl) | |
116 | DEF_HELPER_2(mttc0_tccontext, void, env, tl) | |
117 | DEF_HELPER_2(mtc0_tcschedule, void, env, tl) | |
118 | DEF_HELPER_2(mttc0_tcschedule, void, env, tl) | |
119 | DEF_HELPER_2(mtc0_tcschefback, void, env, tl) | |
120 | DEF_HELPER_2(mttc0_tcschefback, void, env, tl) | |
121 | DEF_HELPER_2(mtc0_entrylo1, void, env, tl) | |
122 | DEF_HELPER_2(mtc0_context, void, env, tl) | |
99029be1 | 123 | DEF_HELPER_2(mtc0_memorymapid, void, env, tl) |
895c2d04 BS |
124 | DEF_HELPER_2(mtc0_pagemask, void, env, tl) |
125 | DEF_HELPER_2(mtc0_pagegrain, void, env, tl) | |
cec56a73 JH |
126 | DEF_HELPER_2(mtc0_segctl0, void, env, tl) |
127 | DEF_HELPER_2(mtc0_segctl1, void, env, tl) | |
128 | DEF_HELPER_2(mtc0_segctl2, void, env, tl) | |
fa75ad14 | 129 | DEF_HELPER_2(mtc0_pwfield, void, env, tl) |
20b28ebc | 130 | DEF_HELPER_2(mtc0_pwsize, void, env, tl) |
895c2d04 BS |
131 | DEF_HELPER_2(mtc0_wired, void, env, tl) |
132 | DEF_HELPER_2(mtc0_srsconf0, void, env, tl) | |
133 | DEF_HELPER_2(mtc0_srsconf1, void, env, tl) | |
134 | DEF_HELPER_2(mtc0_srsconf2, void, env, tl) | |
135 | DEF_HELPER_2(mtc0_srsconf3, void, env, tl) | |
136 | DEF_HELPER_2(mtc0_srsconf4, void, env, tl) | |
137 | DEF_HELPER_2(mtc0_hwrena, void, env, tl) | |
103be64c | 138 | DEF_HELPER_2(mtc0_pwctl, void, env, tl) |
895c2d04 | 139 | DEF_HELPER_2(mtc0_count, void, env, tl) |
5fb2dcd1 YK |
140 | DEF_HELPER_2(mtc0_saari, void, env, tl) |
141 | DEF_HELPER_2(mtc0_saar, void, env, tl) | |
142 | DEF_HELPER_2(mthc0_saar, void, env, tl) | |
895c2d04 BS |
143 | DEF_HELPER_2(mtc0_entryhi, void, env, tl) |
144 | DEF_HELPER_2(mttc0_entryhi, void, env, tl) | |
145 | DEF_HELPER_2(mtc0_compare, void, env, tl) | |
146 | DEF_HELPER_2(mtc0_status, void, env, tl) | |
147 | DEF_HELPER_2(mttc0_status, void, env, tl) | |
148 | DEF_HELPER_2(mtc0_intctl, void, env, tl) | |
149 | DEF_HELPER_2(mtc0_srsctl, void, env, tl) | |
150 | DEF_HELPER_2(mtc0_cause, void, env, tl) | |
151 | DEF_HELPER_2(mttc0_cause, void, env, tl) | |
152 | DEF_HELPER_2(mtc0_ebase, void, env, tl) | |
153 | DEF_HELPER_2(mttc0_ebase, void, env, tl) | |
154 | DEF_HELPER_2(mtc0_config0, void, env, tl) | |
155 | DEF_HELPER_2(mtc0_config2, void, env, tl) | |
90f12d73 | 156 | DEF_HELPER_2(mtc0_config3, void, env, tl) |
b4160af1 | 157 | DEF_HELPER_2(mtc0_config4, void, env, tl) |
b4dd99a3 | 158 | DEF_HELPER_2(mtc0_config5, void, env, tl) |
895c2d04 | 159 | DEF_HELPER_2(mtc0_lladdr, void, env, tl) |
f6d4dd81 YK |
160 | DEF_HELPER_2(mtc0_maar, void, env, tl) |
161 | DEF_HELPER_2(mthc0_maar, void, env, tl) | |
162 | DEF_HELPER_2(mtc0_maari, void, env, tl) | |
895c2d04 BS |
163 | DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32) |
164 | DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32) | |
feafe82c | 165 | DEF_HELPER_3(mthc0_watchhi, void, env, tl, i32) |
895c2d04 BS |
166 | DEF_HELPER_2(mtc0_xcontext, void, env, tl) |
167 | DEF_HELPER_2(mtc0_framemask, void, env, tl) | |
168 | DEF_HELPER_2(mtc0_debug, void, env, tl) | |
169 | DEF_HELPER_2(mttc0_debug, void, env, tl) | |
170 | DEF_HELPER_2(mtc0_performance0, void, env, tl) | |
0d74a222 | 171 | DEF_HELPER_2(mtc0_errctl, void, env, tl) |
895c2d04 BS |
172 | DEF_HELPER_2(mtc0_taglo, void, env, tl) |
173 | DEF_HELPER_2(mtc0_datalo, void, env, tl) | |
174 | DEF_HELPER_2(mtc0_taghi, void, env, tl) | |
175 | DEF_HELPER_2(mtc0_datahi, void, env, tl) | |
f1aa6320 | 176 | |
7207c7f9 LA |
177 | #if defined(TARGET_MIPS64) |
178 | DEF_HELPER_2(dmtc0_entrylo0, void, env, i64) | |
179 | DEF_HELPER_2(dmtc0_entrylo1, void, env, i64) | |
180 | #endif | |
181 | ||
f1aa6320 | 182 | /* MIPS MT functions */ |
f5daeec4 | 183 | DEF_HELPER_2(mftgpr, tl, env, i32) |
895c2d04 BS |
184 | DEF_HELPER_2(mftlo, tl, env, i32) |
185 | DEF_HELPER_2(mfthi, tl, env, i32) | |
186 | DEF_HELPER_2(mftacx, tl, env, i32) | |
187 | DEF_HELPER_1(mftdsp, tl, env) | |
188 | DEF_HELPER_3(mttgpr, void, env, tl, i32) | |
189 | DEF_HELPER_3(mttlo, void, env, tl, i32) | |
190 | DEF_HELPER_3(mtthi, void, env, tl, i32) | |
191 | DEF_HELPER_3(mttacx, void, env, tl, i32) | |
192 | DEF_HELPER_2(mttdsp, void, env, tl) | |
9ed5726c NF |
193 | DEF_HELPER_0(dmt, tl) |
194 | DEF_HELPER_0(emt, tl) | |
895c2d04 BS |
195 | DEF_HELPER_1(dvpe, tl, env) |
196 | DEF_HELPER_1(evpe, tl, env) | |
01bc435b YK |
197 | |
198 | /* R6 Multi-threading */ | |
199 | DEF_HELPER_1(dvp, tl, env) | |
200 | DEF_HELPER_1(evp, tl, env) | |
0eaef5aa | 201 | #endif /* !CONFIG_USER_ONLY */ |
3c824109 NF |
202 | |
203 | /* microMIPS functions */ | |
f5daeec4 RH |
204 | DEF_HELPER_4(lwm, void, env, tl, tl, i32) |
205 | DEF_HELPER_4(swm, void, env, tl, tl, i32) | |
3c824109 | 206 | #ifdef TARGET_MIPS64 |
f5daeec4 RH |
207 | DEF_HELPER_4(ldm, void, env, tl, tl, i32) |
208 | DEF_HELPER_4(sdm, void, env, tl, tl, i32) | |
3c824109 NF |
209 | #endif |
210 | ||
a7812ae4 | 211 | DEF_HELPER_2(fork, void, tl, tl) |
895c2d04 | 212 | DEF_HELPER_2(yield, tl, env, tl) |
f1aa6320 TS |
213 | |
214 | /* CP1 functions */ | |
895c2d04 | 215 | DEF_HELPER_2(cfc1, tl, env, i32) |
736d120a | 216 | DEF_HELPER_4(ctc1, void, env, tl, i32, i32) |
5d0fc900 | 217 | |
895c2d04 BS |
218 | DEF_HELPER_2(float_cvtd_s, i64, env, i32) |
219 | DEF_HELPER_2(float_cvtd_w, i64, env, i32) | |
220 | DEF_HELPER_2(float_cvtd_l, i64, env, i64) | |
895c2d04 BS |
221 | DEF_HELPER_2(float_cvtps_pw, i64, env, i64) |
222 | DEF_HELPER_2(float_cvtpw_ps, i64, env, i64) | |
223 | DEF_HELPER_2(float_cvts_d, i32, env, i64) | |
224 | DEF_HELPER_2(float_cvts_w, i32, env, i32) | |
225 | DEF_HELPER_2(float_cvts_l, i32, env, i64) | |
226 | DEF_HELPER_2(float_cvts_pl, i32, env, i32) | |
227 | DEF_HELPER_2(float_cvts_pu, i32, env, i32) | |
b6d96bed | 228 | |
895c2d04 BS |
229 | DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) |
230 | DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) | |
b6d96bed | 231 | |
af39bc8c AM |
232 | DEF_HELPER_FLAGS_2(float_class_s, TCG_CALL_NO_RWG_SE, i32, env, i32) |
233 | DEF_HELPER_FLAGS_2(float_class_d, TCG_CALL_NO_RWG_SE, i64, env, i64) | |
e7f16abb LA |
234 | |
235 | #define FOP_PROTO(op) \ | |
236 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
237 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) | |
238 | FOP_PROTO(maddf) | |
239 | FOP_PROTO(msubf) | |
240 | #undef FOP_PROTO | |
241 | ||
242 | #define FOP_PROTO(op) \ | |
243 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
244 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) | |
245 | FOP_PROTO(max) | |
246 | FOP_PROTO(maxa) | |
247 | FOP_PROTO(min) | |
248 | FOP_PROTO(mina) | |
249 | #undef FOP_PROTO | |
250 | ||
895c2d04 | 251 | #define FOP_PROTO(op) \ |
87552089 AM |
252 | DEF_HELPER_2(float_ ## op ## _l_s, i64, env, i32) \ |
253 | DEF_HELPER_2(float_ ## op ## _l_d, i64, env, i64) \ | |
254 | DEF_HELPER_2(float_ ## op ## _w_s, i32, env, i32) \ | |
255 | DEF_HELPER_2(float_ ## op ## _w_d, i32, env, i64) | |
256 | FOP_PROTO(cvt) | |
b6d96bed TS |
257 | FOP_PROTO(round) |
258 | FOP_PROTO(trunc) | |
259 | FOP_PROTO(ceil) | |
260 | FOP_PROTO(floor) | |
87552089 AM |
261 | FOP_PROTO(cvt_2008) |
262 | FOP_PROTO(round_2008) | |
263 | FOP_PROTO(trunc_2008) | |
264 | FOP_PROTO(ceil_2008) | |
265 | FOP_PROTO(floor_2008) | |
b6d96bed TS |
266 | #undef FOP_PROTO |
267 | ||
895c2d04 BS |
268 | #define FOP_PROTO(op) \ |
269 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
270 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) | |
a16336e4 | 271 | FOP_PROTO(sqrt) |
5d0fc900 TS |
272 | FOP_PROTO(rsqrt) |
273 | FOP_PROTO(recip) | |
e7f16abb | 274 | FOP_PROTO(rint) |
5d0fc900 TS |
275 | #undef FOP_PROTO |
276 | ||
a7812ae4 PB |
277 | #define FOP_PROTO(op) \ |
278 | DEF_HELPER_1(float_ ## op ## _s, i32, i32) \ | |
279 | DEF_HELPER_1(float_ ## op ## _d, i64, i64) \ | |
280 | DEF_HELPER_1(float_ ## op ## _ps, i64, i64) | |
b6d96bed TS |
281 | FOP_PROTO(abs) |
282 | FOP_PROTO(chs) | |
895c2d04 BS |
283 | #undef FOP_PROTO |
284 | ||
285 | #define FOP_PROTO(op) \ | |
286 | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ | |
287 | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) \ | |
288 | DEF_HELPER_2(float_ ## op ## _ps, i64, env, i64) | |
b6d96bed TS |
289 | FOP_PROTO(recip1) |
290 | FOP_PROTO(rsqrt1) | |
291 | #undef FOP_PROTO | |
292 | ||
895c2d04 BS |
293 | #define FOP_PROTO(op) \ |
294 | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ | |
295 | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) \ | |
296 | DEF_HELPER_3(float_ ## op ## _ps, i64, env, i64, i64) | |
5d0fc900 TS |
297 | FOP_PROTO(add) |
298 | FOP_PROTO(sub) | |
299 | FOP_PROTO(mul) | |
300 | FOP_PROTO(div) | |
b6d96bed TS |
301 | FOP_PROTO(recip2) |
302 | FOP_PROTO(rsqrt2) | |
303 | #undef FOP_PROTO | |
304 | ||
895c2d04 BS |
305 | #define FOP_PROTO(op) \ |
306 | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ | |
307 | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) \ | |
308 | DEF_HELPER_4(float_ ## op ## _ps, i64, env, i64, i64, i64) | |
b3d6cd44 AJ |
309 | FOP_PROTO(madd) |
310 | FOP_PROTO(msub) | |
311 | FOP_PROTO(nmadd) | |
312 | FOP_PROTO(nmsub) | |
5d0fc900 TS |
313 | #undef FOP_PROTO |
314 | ||
895c2d04 BS |
315 | #define FOP_PROTO(op) \ |
316 | DEF_HELPER_4(cmp_d_ ## op, void, env, i64, i64, int) \ | |
317 | DEF_HELPER_4(cmpabs_d_ ## op, void, env, i64, i64, int) \ | |
318 | DEF_HELPER_4(cmp_s_ ## op, void, env, i32, i32, int) \ | |
319 | DEF_HELPER_4(cmpabs_s_ ## op, void, env, i32, i32, int) \ | |
320 | DEF_HELPER_4(cmp_ps_ ## op, void, env, i64, i64, int) \ | |
321 | DEF_HELPER_4(cmpabs_ps_ ## op, void, env, i64, i64, int) | |
5d0fc900 TS |
322 | FOP_PROTO(f) |
323 | FOP_PROTO(un) | |
324 | FOP_PROTO(eq) | |
325 | FOP_PROTO(ueq) | |
326 | FOP_PROTO(olt) | |
327 | FOP_PROTO(ult) | |
328 | FOP_PROTO(ole) | |
329 | FOP_PROTO(ule) | |
330 | FOP_PROTO(sf) | |
331 | FOP_PROTO(ngle) | |
332 | FOP_PROTO(seq) | |
333 | FOP_PROTO(ngl) | |
334 | FOP_PROTO(lt) | |
335 | FOP_PROTO(nge) | |
336 | FOP_PROTO(le) | |
337 | FOP_PROTO(ngt) | |
338 | #undef FOP_PROTO | |
08ba7963 | 339 | |
3f493883 YK |
340 | #define FOP_PROTO(op) \ |
341 | DEF_HELPER_3(r6_cmp_d_ ## op, i64, env, i64, i64) \ | |
342 | DEF_HELPER_3(r6_cmp_s_ ## op, i32, env, i32, i32) | |
343 | FOP_PROTO(af) | |
344 | FOP_PROTO(un) | |
345 | FOP_PROTO(eq) | |
346 | FOP_PROTO(ueq) | |
347 | FOP_PROTO(lt) | |
348 | FOP_PROTO(ult) | |
349 | FOP_PROTO(le) | |
350 | FOP_PROTO(ule) | |
351 | FOP_PROTO(saf) | |
352 | FOP_PROTO(sun) | |
353 | FOP_PROTO(seq) | |
354 | FOP_PROTO(sueq) | |
355 | FOP_PROTO(slt) | |
356 | FOP_PROTO(sult) | |
357 | FOP_PROTO(sle) | |
358 | FOP_PROTO(sule) | |
359 | FOP_PROTO(or) | |
360 | FOP_PROTO(une) | |
361 | FOP_PROTO(ne) | |
362 | FOP_PROTO(sor) | |
363 | FOP_PROTO(sune) | |
364 | FOP_PROTO(sne) | |
365 | #undef FOP_PROTO | |
366 | ||
08ba7963 | 367 | /* Special functions */ |
0eaef5aa | 368 | #ifndef CONFIG_USER_ONLY |
895c2d04 BS |
369 | DEF_HELPER_1(tlbwi, void, env) |
370 | DEF_HELPER_1(tlbwr, void, env) | |
371 | DEF_HELPER_1(tlbp, void, env) | |
372 | DEF_HELPER_1(tlbr, void, env) | |
9456c2fb LA |
373 | DEF_HELPER_1(tlbinv, void, env) |
374 | DEF_HELPER_1(tlbinvf, void, env) | |
895c2d04 BS |
375 | DEF_HELPER_1(di, tl, env) |
376 | DEF_HELPER_1(ei, tl, env) | |
377 | DEF_HELPER_1(eret, void, env) | |
ce9782f4 | 378 | DEF_HELPER_1(eretnc, void, env) |
895c2d04 | 379 | DEF_HELPER_1(deret, void, env) |
99029be1 | 380 | DEF_HELPER_3(ginvt, void, env, tl, i32) |
0eaef5aa | 381 | #endif /* !CONFIG_USER_ONLY */ |
895c2d04 BS |
382 | DEF_HELPER_1(rdhwr_cpunum, tl, env) |
383 | DEF_HELPER_1(rdhwr_synci_step, tl, env) | |
384 | DEF_HELPER_1(rdhwr_cc, tl, env) | |
385 | DEF_HELPER_1(rdhwr_ccres, tl, env) | |
b00c7218 YK |
386 | DEF_HELPER_1(rdhwr_performance, tl, env) |
387 | DEF_HELPER_1(rdhwr_xnp, tl, env) | |
895c2d04 BS |
388 | DEF_HELPER_2(pmon, void, env, int) |
389 | DEF_HELPER_1(wait, void, env) | |
a7812ae4 | 390 | |
bd277fa1 | 391 | /* Loongson multimedia functions. */ |
95bf787e AJ |
392 | DEF_HELPER_FLAGS_2(paddsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
393 | DEF_HELPER_FLAGS_2(paddush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
394 | DEF_HELPER_FLAGS_2(paddh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
395 | DEF_HELPER_FLAGS_2(paddw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
396 | DEF_HELPER_FLAGS_2(paddsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
397 | DEF_HELPER_FLAGS_2(paddusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
398 | DEF_HELPER_FLAGS_2(paddb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 399 | |
95bf787e AJ |
400 | DEF_HELPER_FLAGS_2(psubsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
401 | DEF_HELPER_FLAGS_2(psubush, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
402 | DEF_HELPER_FLAGS_2(psubh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
403 | DEF_HELPER_FLAGS_2(psubw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
404 | DEF_HELPER_FLAGS_2(psubsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
405 | DEF_HELPER_FLAGS_2(psubusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
406 | DEF_HELPER_FLAGS_2(psubb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 407 | |
95bf787e AJ |
408 | DEF_HELPER_FLAGS_2(pshufh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
409 | DEF_HELPER_FLAGS_2(packsswh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
410 | DEF_HELPER_FLAGS_2(packsshb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
411 | DEF_HELPER_FLAGS_2(packushb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 412 | |
95bf787e AJ |
413 | DEF_HELPER_FLAGS_2(punpcklhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
414 | DEF_HELPER_FLAGS_2(punpckhhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
415 | DEF_HELPER_FLAGS_2(punpcklbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
416 | DEF_HELPER_FLAGS_2(punpckhbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
417 | DEF_HELPER_FLAGS_2(punpcklwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
418 | DEF_HELPER_FLAGS_2(punpckhwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 419 | |
95bf787e AJ |
420 | DEF_HELPER_FLAGS_2(pavgh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
421 | DEF_HELPER_FLAGS_2(pavgb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
422 | DEF_HELPER_FLAGS_2(pmaxsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
423 | DEF_HELPER_FLAGS_2(pminsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
424 | DEF_HELPER_FLAGS_2(pmaxub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
425 | DEF_HELPER_FLAGS_2(pminub, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 426 | |
95bf787e AJ |
427 | DEF_HELPER_FLAGS_2(pcmpeqw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
428 | DEF_HELPER_FLAGS_2(pcmpgtw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
429 | DEF_HELPER_FLAGS_2(pcmpeqh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
430 | DEF_HELPER_FLAGS_2(pcmpgth, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
431 | DEF_HELPER_FLAGS_2(pcmpeqb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
432 | DEF_HELPER_FLAGS_2(pcmpgtb, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 433 | |
95bf787e AJ |
434 | DEF_HELPER_FLAGS_2(psllw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
435 | DEF_HELPER_FLAGS_2(psllh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
436 | DEF_HELPER_FLAGS_2(psrlw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
437 | DEF_HELPER_FLAGS_2(psrlh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
438 | DEF_HELPER_FLAGS_2(psraw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
439 | DEF_HELPER_FLAGS_2(psrah, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 440 | |
95bf787e AJ |
441 | DEF_HELPER_FLAGS_2(pmullh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
442 | DEF_HELPER_FLAGS_2(pmulhh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
443 | DEF_HELPER_FLAGS_2(pmulhuh, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
444 | DEF_HELPER_FLAGS_2(pmaddhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) | |
bd277fa1 | 445 | |
95bf787e AJ |
446 | DEF_HELPER_FLAGS_2(pasubub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
447 | DEF_HELPER_FLAGS_1(biadd, TCG_CALL_NO_RWG_SE, i64, i64) | |
448 | DEF_HELPER_FLAGS_1(pmovmskb, TCG_CALL_NO_RWG_SE, i64, i64) | |
bd277fa1 | 449 | |
461c08df JL |
450 | /*** MIPS DSP ***/ |
451 | /* DSP Arithmetic Sub-class insns */ | |
452 | DEF_HELPER_FLAGS_3(addq_ph, 0, tl, tl, tl, env) | |
453 | DEF_HELPER_FLAGS_3(addq_s_ph, 0, tl, tl, tl, env) | |
454 | #if defined(TARGET_MIPS64) | |
455 | DEF_HELPER_FLAGS_3(addq_qh, 0, tl, tl, tl, env) | |
456 | DEF_HELPER_FLAGS_3(addq_s_qh, 0, tl, tl, tl, env) | |
457 | #endif | |
458 | DEF_HELPER_FLAGS_3(addq_s_w, 0, tl, tl, tl, env) | |
459 | #if defined(TARGET_MIPS64) | |
460 | DEF_HELPER_FLAGS_3(addq_pw, 0, tl, tl, tl, env) | |
461 | DEF_HELPER_FLAGS_3(addq_s_pw, 0, tl, tl, tl, env) | |
462 | #endif | |
463 | DEF_HELPER_FLAGS_3(addu_qb, 0, tl, tl, tl, env) | |
464 | DEF_HELPER_FLAGS_3(addu_s_qb, 0, tl, tl, tl, env) | |
465 | DEF_HELPER_FLAGS_2(adduh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
466 | DEF_HELPER_FLAGS_2(adduh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
467 | DEF_HELPER_FLAGS_3(addu_ph, 0, tl, tl, tl, env) | |
468 | DEF_HELPER_FLAGS_3(addu_s_ph, 0, tl, tl, tl, env) | |
469 | DEF_HELPER_FLAGS_2(addqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
470 | DEF_HELPER_FLAGS_2(addqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
471 | DEF_HELPER_FLAGS_2(addqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
472 | DEF_HELPER_FLAGS_2(addqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
473 | #if defined(TARGET_MIPS64) | |
474 | DEF_HELPER_FLAGS_3(addu_ob, 0, tl, tl, tl, env) | |
475 | DEF_HELPER_FLAGS_3(addu_s_ob, 0, tl, tl, tl, env) | |
476 | DEF_HELPER_FLAGS_2(adduh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
477 | DEF_HELPER_FLAGS_2(adduh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
478 | DEF_HELPER_FLAGS_3(addu_qh, 0, tl, tl, tl, env) | |
479 | DEF_HELPER_FLAGS_3(addu_s_qh, 0, tl, tl, tl, env) | |
480 | #endif | |
481 | DEF_HELPER_FLAGS_3(subq_ph, 0, tl, tl, tl, env) | |
482 | DEF_HELPER_FLAGS_3(subq_s_ph, 0, tl, tl, tl, env) | |
483 | #if defined(TARGET_MIPS64) | |
484 | DEF_HELPER_FLAGS_3(subq_qh, 0, tl, tl, tl, env) | |
485 | DEF_HELPER_FLAGS_3(subq_s_qh, 0, tl, tl, tl, env) | |
486 | #endif | |
487 | DEF_HELPER_FLAGS_3(subq_s_w, 0, tl, tl, tl, env) | |
488 | #if defined(TARGET_MIPS64) | |
489 | DEF_HELPER_FLAGS_3(subq_pw, 0, tl, tl, tl, env) | |
490 | DEF_HELPER_FLAGS_3(subq_s_pw, 0, tl, tl, tl, env) | |
491 | #endif | |
492 | DEF_HELPER_FLAGS_3(subu_qb, 0, tl, tl, tl, env) | |
493 | DEF_HELPER_FLAGS_3(subu_s_qb, 0, tl, tl, tl, env) | |
494 | DEF_HELPER_FLAGS_2(subuh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
495 | DEF_HELPER_FLAGS_2(subuh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
496 | DEF_HELPER_FLAGS_3(subu_ph, 0, tl, tl, tl, env) | |
497 | DEF_HELPER_FLAGS_3(subu_s_ph, 0, tl, tl, tl, env) | |
498 | DEF_HELPER_FLAGS_2(subqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
499 | DEF_HELPER_FLAGS_2(subqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
500 | DEF_HELPER_FLAGS_2(subqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
501 | DEF_HELPER_FLAGS_2(subqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
502 | #if defined(TARGET_MIPS64) | |
503 | DEF_HELPER_FLAGS_3(subu_ob, 0, tl, tl, tl, env) | |
504 | DEF_HELPER_FLAGS_3(subu_s_ob, 0, tl, tl, tl, env) | |
505 | DEF_HELPER_FLAGS_2(subuh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
506 | DEF_HELPER_FLAGS_2(subuh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
507 | DEF_HELPER_FLAGS_3(subu_qh, 0, tl, tl, tl, env) | |
508 | DEF_HELPER_FLAGS_3(subu_s_qh, 0, tl, tl, tl, env) | |
509 | #endif | |
510 | DEF_HELPER_FLAGS_3(addsc, 0, tl, tl, tl, env) | |
511 | DEF_HELPER_FLAGS_3(addwc, 0, tl, tl, tl, env) | |
512 | DEF_HELPER_FLAGS_2(modsub, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
513 | DEF_HELPER_FLAGS_1(raddu_w_qb, TCG_CALL_NO_RWG_SE, tl, tl) | |
514 | #if defined(TARGET_MIPS64) | |
515 | DEF_HELPER_FLAGS_1(raddu_l_ob, TCG_CALL_NO_RWG_SE, tl, tl) | |
516 | #endif | |
517 | DEF_HELPER_FLAGS_2(absq_s_qb, 0, tl, tl, env) | |
518 | DEF_HELPER_FLAGS_2(absq_s_ph, 0, tl, tl, env) | |
519 | DEF_HELPER_FLAGS_2(absq_s_w, 0, tl, tl, env) | |
520 | #if defined(TARGET_MIPS64) | |
521 | DEF_HELPER_FLAGS_2(absq_s_ob, 0, tl, tl, env) | |
522 | DEF_HELPER_FLAGS_2(absq_s_qh, 0, tl, tl, env) | |
523 | DEF_HELPER_FLAGS_2(absq_s_pw, 0, tl, tl, env) | |
524 | #endif | |
525 | DEF_HELPER_FLAGS_2(precr_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
526 | DEF_HELPER_FLAGS_2(precrq_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
527 | DEF_HELPER_FLAGS_3(precr_sra_ph_w, TCG_CALL_NO_RWG_SE, | |
528 | tl, i32, tl, tl) | |
529 | DEF_HELPER_FLAGS_3(precr_sra_r_ph_w, TCG_CALL_NO_RWG_SE, | |
530 | tl, i32, tl, tl) | |
531 | DEF_HELPER_FLAGS_2(precrq_ph_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
532 | DEF_HELPER_FLAGS_3(precrq_rs_ph_w, 0, tl, tl, tl, env) | |
533 | #if defined(TARGET_MIPS64) | |
534 | DEF_HELPER_FLAGS_2(precr_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
535 | DEF_HELPER_FLAGS_3(precr_sra_qh_pw, | |
536 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
537 | DEF_HELPER_FLAGS_3(precr_sra_r_qh_pw, | |
538 | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) | |
539 | DEF_HELPER_FLAGS_2(precrq_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
540 | DEF_HELPER_FLAGS_2(precrq_qh_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
541 | DEF_HELPER_FLAGS_3(precrq_rs_qh_pw, | |
542 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
543 | DEF_HELPER_FLAGS_2(precrq_pw_l, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
544 | #endif | |
545 | DEF_HELPER_FLAGS_3(precrqu_s_qb_ph, 0, tl, tl, tl, env) | |
546 | #if defined(TARGET_MIPS64) | |
547 | DEF_HELPER_FLAGS_3(precrqu_s_ob_qh, | |
548 | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) | |
549 | ||
550 | DEF_HELPER_FLAGS_1(preceq_pw_qhl, TCG_CALL_NO_RWG_SE, tl, tl) | |
551 | DEF_HELPER_FLAGS_1(preceq_pw_qhr, TCG_CALL_NO_RWG_SE, tl, tl) | |
552 | DEF_HELPER_FLAGS_1(preceq_pw_qhla, TCG_CALL_NO_RWG_SE, tl, tl) | |
553 | DEF_HELPER_FLAGS_1(preceq_pw_qhra, TCG_CALL_NO_RWG_SE, tl, tl) | |
554 | #endif | |
555 | DEF_HELPER_FLAGS_1(precequ_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
556 | DEF_HELPER_FLAGS_1(precequ_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
557 | DEF_HELPER_FLAGS_1(precequ_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
558 | DEF_HELPER_FLAGS_1(precequ_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
559 | #if defined(TARGET_MIPS64) | |
560 | DEF_HELPER_FLAGS_1(precequ_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
561 | DEF_HELPER_FLAGS_1(precequ_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
562 | DEF_HELPER_FLAGS_1(precequ_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
563 | DEF_HELPER_FLAGS_1(precequ_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
564 | #endif | |
565 | DEF_HELPER_FLAGS_1(preceu_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) | |
566 | DEF_HELPER_FLAGS_1(preceu_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) | |
567 | DEF_HELPER_FLAGS_1(preceu_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) | |
568 | DEF_HELPER_FLAGS_1(preceu_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) | |
569 | #if defined(TARGET_MIPS64) | |
570 | DEF_HELPER_FLAGS_1(preceu_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) | |
571 | DEF_HELPER_FLAGS_1(preceu_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) | |
572 | DEF_HELPER_FLAGS_1(preceu_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) | |
573 | DEF_HELPER_FLAGS_1(preceu_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) | |
574 | #endif | |
575 | ||
77c5fa8b JL |
576 | /* DSP GPR-Based Shift Sub-class insns */ |
577 | DEF_HELPER_FLAGS_3(shll_qb, 0, tl, tl, tl, env) | |
578 | #if defined(TARGET_MIPS64) | |
579 | DEF_HELPER_FLAGS_3(shll_ob, 0, tl, tl, tl, env) | |
580 | #endif | |
581 | DEF_HELPER_FLAGS_3(shll_ph, 0, tl, tl, tl, env) | |
582 | DEF_HELPER_FLAGS_3(shll_s_ph, 0, tl, tl, tl, env) | |
583 | #if defined(TARGET_MIPS64) | |
584 | DEF_HELPER_FLAGS_3(shll_qh, 0, tl, tl, tl, env) | |
585 | DEF_HELPER_FLAGS_3(shll_s_qh, 0, tl, tl, tl, env) | |
586 | #endif | |
587 | DEF_HELPER_FLAGS_3(shll_s_w, 0, tl, tl, tl, env) | |
588 | #if defined(TARGET_MIPS64) | |
589 | DEF_HELPER_FLAGS_3(shll_pw, 0, tl, tl, tl, env) | |
590 | DEF_HELPER_FLAGS_3(shll_s_pw, 0, tl, tl, tl, env) | |
591 | #endif | |
592 | DEF_HELPER_FLAGS_2(shrl_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
593 | DEF_HELPER_FLAGS_2(shrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
594 | #if defined(TARGET_MIPS64) | |
595 | DEF_HELPER_FLAGS_2(shrl_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
596 | DEF_HELPER_FLAGS_2(shrl_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
597 | #endif | |
598 | DEF_HELPER_FLAGS_2(shra_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
599 | DEF_HELPER_FLAGS_2(shra_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
600 | #if defined(TARGET_MIPS64) | |
601 | DEF_HELPER_FLAGS_2(shra_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
602 | DEF_HELPER_FLAGS_2(shra_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
603 | #endif | |
604 | DEF_HELPER_FLAGS_2(shra_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
605 | DEF_HELPER_FLAGS_2(shra_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
606 | DEF_HELPER_FLAGS_2(shra_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
607 | #if defined(TARGET_MIPS64) | |
608 | DEF_HELPER_FLAGS_2(shra_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
609 | DEF_HELPER_FLAGS_2(shra_r_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
610 | DEF_HELPER_FLAGS_2(shra_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
611 | DEF_HELPER_FLAGS_2(shra_r_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
612 | #endif | |
613 | ||
a22260ae JL |
614 | /* DSP Multiply Sub-class insns */ |
615 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbl, 0, tl, tl, tl, env) | |
616 | DEF_HELPER_FLAGS_3(muleu_s_ph_qbr, 0, tl, tl, tl, env) | |
617 | #if defined(TARGET_MIPS64) | |
618 | DEF_HELPER_FLAGS_3(muleu_s_qh_obl, 0, tl, tl, tl, env) | |
619 | DEF_HELPER_FLAGS_3(muleu_s_qh_obr, 0, tl, tl, tl, env) | |
620 | #endif | |
621 | DEF_HELPER_FLAGS_3(mulq_rs_ph, 0, tl, tl, tl, env) | |
622 | #if defined(TARGET_MIPS64) | |
623 | DEF_HELPER_FLAGS_3(mulq_rs_qh, 0, tl, tl, tl, env) | |
624 | #endif | |
625 | DEF_HELPER_FLAGS_3(muleq_s_w_phl, 0, tl, tl, tl, env) | |
626 | DEF_HELPER_FLAGS_3(muleq_s_w_phr, 0, tl, tl, tl, env) | |
627 | #if defined(TARGET_MIPS64) | |
628 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhl, 0, tl, tl, tl, env) | |
629 | DEF_HELPER_FLAGS_3(muleq_s_pw_qhr, 0, tl, tl, tl, env) | |
630 | #endif | |
631 | DEF_HELPER_FLAGS_4(dpau_h_qbl, 0, void, i32, tl, tl, env) | |
632 | DEF_HELPER_FLAGS_4(dpau_h_qbr, 0, void, i32, tl, tl, env) | |
633 | #if defined(TARGET_MIPS64) | |
634 | DEF_HELPER_FLAGS_4(dpau_h_obl, 0, void, tl, tl, i32, env) | |
635 | DEF_HELPER_FLAGS_4(dpau_h_obr, 0, void, tl, tl, i32, env) | |
636 | #endif | |
637 | DEF_HELPER_FLAGS_4(dpsu_h_qbl, 0, void, i32, tl, tl, env) | |
638 | DEF_HELPER_FLAGS_4(dpsu_h_qbr, 0, void, i32, tl, tl, env) | |
639 | #if defined(TARGET_MIPS64) | |
640 | DEF_HELPER_FLAGS_4(dpsu_h_obl, 0, void, tl, tl, i32, env) | |
641 | DEF_HELPER_FLAGS_4(dpsu_h_obr, 0, void, tl, tl, i32, env) | |
642 | #endif | |
643 | DEF_HELPER_FLAGS_4(dpa_w_ph, 0, void, i32, tl, tl, env) | |
644 | #if defined(TARGET_MIPS64) | |
645 | DEF_HELPER_FLAGS_4(dpa_w_qh, 0, void, tl, tl, i32, env) | |
646 | #endif | |
647 | DEF_HELPER_FLAGS_4(dpax_w_ph, 0, void, i32, tl, tl, env) | |
648 | DEF_HELPER_FLAGS_4(dpaq_s_w_ph, 0, void, i32, tl, tl, env) | |
649 | #if defined(TARGET_MIPS64) | |
650 | DEF_HELPER_FLAGS_4(dpaq_s_w_qh, 0, void, tl, tl, i32, env) | |
651 | #endif | |
652 | DEF_HELPER_FLAGS_4(dpaqx_s_w_ph, 0, void, i32, tl, tl, env) | |
653 | DEF_HELPER_FLAGS_4(dpaqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
654 | DEF_HELPER_FLAGS_4(dps_w_ph, 0, void, i32, tl, tl, env) | |
655 | #if defined(TARGET_MIPS64) | |
656 | DEF_HELPER_FLAGS_4(dps_w_qh, 0, void, tl, tl, i32, env) | |
657 | #endif | |
658 | DEF_HELPER_FLAGS_4(dpsx_w_ph, 0, void, i32, tl, tl, env) | |
659 | DEF_HELPER_FLAGS_4(dpsq_s_w_ph, 0, void, i32, tl, tl, env) | |
660 | #if defined(TARGET_MIPS64) | |
661 | DEF_HELPER_FLAGS_4(dpsq_s_w_qh, 0, void, tl, tl, i32, env) | |
662 | #endif | |
663 | DEF_HELPER_FLAGS_4(dpsqx_s_w_ph, 0, void, i32, tl, tl, env) | |
664 | DEF_HELPER_FLAGS_4(dpsqx_sa_w_ph, 0, void, i32, tl, tl, env) | |
665 | DEF_HELPER_FLAGS_4(mulsaq_s_w_ph, 0, void, i32, tl, tl, env) | |
666 | #if defined(TARGET_MIPS64) | |
667 | DEF_HELPER_FLAGS_4(mulsaq_s_w_qh, 0, void, tl, tl, i32, env) | |
668 | #endif | |
669 | DEF_HELPER_FLAGS_4(dpaq_sa_l_w, 0, void, i32, tl, tl, env) | |
670 | #if defined(TARGET_MIPS64) | |
671 | DEF_HELPER_FLAGS_4(dpaq_sa_l_pw, 0, void, tl, tl, i32, env) | |
672 | #endif | |
673 | DEF_HELPER_FLAGS_4(dpsq_sa_l_w, 0, void, i32, tl, tl, env) | |
674 | #if defined(TARGET_MIPS64) | |
675 | DEF_HELPER_FLAGS_4(dpsq_sa_l_pw, 0, void, tl, tl, i32, env) | |
676 | DEF_HELPER_FLAGS_4(mulsaq_s_l_pw, 0, void, tl, tl, i32, env) | |
677 | #endif | |
678 | DEF_HELPER_FLAGS_4(maq_s_w_phl, 0, void, i32, tl, tl, env) | |
679 | DEF_HELPER_FLAGS_4(maq_s_w_phr, 0, void, i32, tl, tl, env) | |
680 | DEF_HELPER_FLAGS_4(maq_sa_w_phl, 0, void, i32, tl, tl, env) | |
681 | DEF_HELPER_FLAGS_4(maq_sa_w_phr, 0, void, i32, tl, tl, env) | |
682 | DEF_HELPER_FLAGS_3(mul_ph, 0, tl, tl, tl, env) | |
683 | DEF_HELPER_FLAGS_3(mul_s_ph, 0, tl, tl, tl, env) | |
684 | DEF_HELPER_FLAGS_3(mulq_s_ph, 0, tl, tl, tl, env) | |
685 | DEF_HELPER_FLAGS_3(mulq_s_w, 0, tl, tl, tl, env) | |
686 | DEF_HELPER_FLAGS_3(mulq_rs_w, 0, tl, tl, tl, env) | |
687 | DEF_HELPER_FLAGS_4(mulsa_w_ph, 0, void, i32, tl, tl, env) | |
688 | #if defined(TARGET_MIPS64) | |
689 | DEF_HELPER_FLAGS_4(maq_s_w_qhll, 0, void, tl, tl, i32, env) | |
690 | DEF_HELPER_FLAGS_4(maq_s_w_qhlr, 0, void, tl, tl, i32, env) | |
691 | DEF_HELPER_FLAGS_4(maq_s_w_qhrl, 0, void, tl, tl, i32, env) | |
692 | DEF_HELPER_FLAGS_4(maq_s_w_qhrr, 0, void, tl, tl, i32, env) | |
693 | DEF_HELPER_FLAGS_4(maq_sa_w_qhll, 0, void, tl, tl, i32, env) | |
694 | DEF_HELPER_FLAGS_4(maq_sa_w_qhlr, 0, void, tl, tl, i32, env) | |
695 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrl, 0, void, tl, tl, i32, env) | |
696 | DEF_HELPER_FLAGS_4(maq_sa_w_qhrr, 0, void, tl, tl, i32, env) | |
697 | DEF_HELPER_FLAGS_4(maq_s_l_pwl, 0, void, tl, tl, i32, env) | |
698 | DEF_HELPER_FLAGS_4(maq_s_l_pwr, 0, void, tl, tl, i32, env) | |
699 | DEF_HELPER_FLAGS_4(dmadd, 0, void, tl, tl, i32, env) | |
700 | DEF_HELPER_FLAGS_4(dmaddu, 0, void, tl, tl, i32, env) | |
701 | DEF_HELPER_FLAGS_4(dmsub, 0, void, tl, tl, i32, env) | |
702 | DEF_HELPER_FLAGS_4(dmsubu, 0, void, tl, tl, i32, env) | |
703 | #endif | |
704 | ||
1cb6686c JL |
705 | /* DSP Bit/Manipulation Sub-class insns */ |
706 | DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_NO_RWG_SE, tl, tl) | |
707 | DEF_HELPER_FLAGS_3(insv, 0, tl, env, tl, tl) | |
708 | #if defined(TARGET_MIPS64) | |
f5daeec4 | 709 | DEF_HELPER_FLAGS_3(dinsv, 0, tl, env, tl, tl) |
1cb6686c JL |
710 | #endif |
711 | ||
26690560 JL |
712 | /* DSP Compare-Pick Sub-class insns */ |
713 | DEF_HELPER_FLAGS_3(cmpu_eq_qb, 0, void, tl, tl, env) | |
714 | DEF_HELPER_FLAGS_3(cmpu_lt_qb, 0, void, tl, tl, env) | |
715 | DEF_HELPER_FLAGS_3(cmpu_le_qb, 0, void, tl, tl, env) | |
716 | DEF_HELPER_FLAGS_2(cmpgu_eq_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
717 | DEF_HELPER_FLAGS_2(cmpgu_lt_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
718 | DEF_HELPER_FLAGS_2(cmpgu_le_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
719 | DEF_HELPER_FLAGS_3(cmp_eq_ph, 0, void, tl, tl, env) | |
720 | DEF_HELPER_FLAGS_3(cmp_lt_ph, 0, void, tl, tl, env) | |
721 | DEF_HELPER_FLAGS_3(cmp_le_ph, 0, void, tl, tl, env) | |
722 | #if defined(TARGET_MIPS64) | |
723 | DEF_HELPER_FLAGS_3(cmpu_eq_ob, 0, void, tl, tl, env) | |
724 | DEF_HELPER_FLAGS_3(cmpu_lt_ob, 0, void, tl, tl, env) | |
725 | DEF_HELPER_FLAGS_3(cmpu_le_ob, 0, void, tl, tl, env) | |
726 | DEF_HELPER_FLAGS_3(cmpgdu_eq_ob, 0, tl, tl, tl, env) | |
727 | DEF_HELPER_FLAGS_3(cmpgdu_lt_ob, 0, tl, tl, tl, env) | |
728 | DEF_HELPER_FLAGS_3(cmpgdu_le_ob, 0, tl, tl, tl, env) | |
729 | DEF_HELPER_FLAGS_2(cmpgu_eq_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
730 | DEF_HELPER_FLAGS_2(cmpgu_lt_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
731 | DEF_HELPER_FLAGS_2(cmpgu_le_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
732 | DEF_HELPER_FLAGS_3(cmp_eq_qh, 0, void, tl, tl, env) | |
733 | DEF_HELPER_FLAGS_3(cmp_lt_qh, 0, void, tl, tl, env) | |
734 | DEF_HELPER_FLAGS_3(cmp_le_qh, 0, void, tl, tl, env) | |
735 | DEF_HELPER_FLAGS_3(cmp_eq_pw, 0, void, tl, tl, env) | |
736 | DEF_HELPER_FLAGS_3(cmp_lt_pw, 0, void, tl, tl, env) | |
737 | DEF_HELPER_FLAGS_3(cmp_le_pw, 0, void, tl, tl, env) | |
738 | #endif | |
739 | DEF_HELPER_FLAGS_3(pick_qb, 0, tl, tl, tl, env) | |
740 | DEF_HELPER_FLAGS_3(pick_ph, 0, tl, tl, tl, env) | |
741 | #if defined(TARGET_MIPS64) | |
742 | DEF_HELPER_FLAGS_3(pick_ob, 0, tl, tl, tl, env) | |
743 | DEF_HELPER_FLAGS_3(pick_qh, 0, tl, tl, tl, env) | |
744 | DEF_HELPER_FLAGS_3(pick_pw, 0, tl, tl, tl, env) | |
745 | #endif | |
26690560 JL |
746 | DEF_HELPER_FLAGS_2(packrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
747 | #if defined(TARGET_MIPS64) | |
748 | DEF_HELPER_FLAGS_2(packrl_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) | |
749 | #endif | |
750 | ||
b53371ed JL |
751 | /* DSP Accumulator and DSPControl Access Sub-class insns */ |
752 | DEF_HELPER_FLAGS_3(extr_w, 0, tl, tl, tl, env) | |
753 | DEF_HELPER_FLAGS_3(extr_r_w, 0, tl, tl, tl, env) | |
754 | DEF_HELPER_FLAGS_3(extr_rs_w, 0, tl, tl, tl, env) | |
755 | #if defined(TARGET_MIPS64) | |
756 | DEF_HELPER_FLAGS_3(dextr_w, 0, tl, tl, tl, env) | |
757 | DEF_HELPER_FLAGS_3(dextr_r_w, 0, tl, tl, tl, env) | |
758 | DEF_HELPER_FLAGS_3(dextr_rs_w, 0, tl, tl, tl, env) | |
759 | DEF_HELPER_FLAGS_3(dextr_l, 0, tl, tl, tl, env) | |
760 | DEF_HELPER_FLAGS_3(dextr_r_l, 0, tl, tl, tl, env) | |
761 | DEF_HELPER_FLAGS_3(dextr_rs_l, 0, tl, tl, tl, env) | |
762 | #endif | |
763 | DEF_HELPER_FLAGS_3(extr_s_h, 0, tl, tl, tl, env) | |
764 | #if defined(TARGET_MIPS64) | |
765 | DEF_HELPER_FLAGS_3(dextr_s_h, 0, tl, tl, tl, env) | |
766 | #endif | |
767 | DEF_HELPER_FLAGS_3(extp, 0, tl, tl, tl, env) | |
768 | DEF_HELPER_FLAGS_3(extpdp, 0, tl, tl, tl, env) | |
769 | #if defined(TARGET_MIPS64) | |
770 | DEF_HELPER_FLAGS_3(dextp, 0, tl, tl, tl, env) | |
771 | DEF_HELPER_FLAGS_3(dextpdp, 0, tl, tl, tl, env) | |
772 | #endif | |
773 | DEF_HELPER_FLAGS_3(shilo, 0, void, tl, tl, env) | |
774 | #if defined(TARGET_MIPS64) | |
775 | DEF_HELPER_FLAGS_3(dshilo, 0, void, tl, tl, env) | |
776 | #endif | |
777 | DEF_HELPER_FLAGS_3(mthlip, 0, void, tl, tl, env) | |
778 | #if defined(TARGET_MIPS64) | |
779 | DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) | |
780 | #endif | |
781 | DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) | |
782 | DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env) | |
4c789546 YK |
783 | |
784 | /* MIPS SIMD Architecture */ | |
81c4b059 AM |
785 | |
786 | DEF_HELPER_3(msa_nloc_b, void, env, i32, i32) | |
787 | DEF_HELPER_3(msa_nloc_h, void, env, i32, i32) | |
788 | DEF_HELPER_3(msa_nloc_w, void, env, i32, i32) | |
789 | DEF_HELPER_3(msa_nloc_d, void, env, i32, i32) | |
790 | ||
791 | DEF_HELPER_3(msa_nlzc_b, void, env, i32, i32) | |
792 | DEF_HELPER_3(msa_nlzc_h, void, env, i32, i32) | |
793 | DEF_HELPER_3(msa_nlzc_w, void, env, i32, i32) | |
794 | DEF_HELPER_3(msa_nlzc_d, void, env, i32, i32) | |
795 | ||
4c5daf38 AM |
796 | DEF_HELPER_3(msa_pcnt_b, void, env, i32, i32) |
797 | DEF_HELPER_3(msa_pcnt_h, void, env, i32, i32) | |
798 | DEF_HELPER_3(msa_pcnt_w, void, env, i32, i32) | |
799 | DEF_HELPER_3(msa_pcnt_d, void, env, i32, i32) | |
800 | ||
2e3eddb0 AM |
801 | DEF_HELPER_4(msa_binsl_b, void, env, i32, i32, i32) |
802 | DEF_HELPER_4(msa_binsl_h, void, env, i32, i32, i32) | |
803 | DEF_HELPER_4(msa_binsl_w, void, env, i32, i32, i32) | |
804 | DEF_HELPER_4(msa_binsl_d, void, env, i32, i32, i32) | |
805 | ||
806 | DEF_HELPER_4(msa_binsr_b, void, env, i32, i32, i32) | |
807 | DEF_HELPER_4(msa_binsr_h, void, env, i32, i32, i32) | |
808 | DEF_HELPER_4(msa_binsr_w, void, env, i32, i32, i32) | |
809 | DEF_HELPER_4(msa_binsr_d, void, env, i32, i32, i32) | |
810 | ||
c1ed3038 AM |
811 | DEF_HELPER_4(msa_bmnz_v, void, env, i32, i32, i32) |
812 | DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32) | |
813 | DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32) | |
814 | ||
a44d6d14 AM |
815 | DEF_HELPER_4(msa_bclr_b, void, env, i32, i32, i32) |
816 | DEF_HELPER_4(msa_bclr_h, void, env, i32, i32, i32) | |
817 | DEF_HELPER_4(msa_bclr_w, void, env, i32, i32, i32) | |
818 | DEF_HELPER_4(msa_bclr_d, void, env, i32, i32, i32) | |
819 | ||
820 | DEF_HELPER_4(msa_bneg_b, void, env, i32, i32, i32) | |
821 | DEF_HELPER_4(msa_bneg_h, void, env, i32, i32, i32) | |
822 | DEF_HELPER_4(msa_bneg_w, void, env, i32, i32, i32) | |
823 | DEF_HELPER_4(msa_bneg_d, void, env, i32, i32, i32) | |
824 | ||
825 | DEF_HELPER_4(msa_bset_b, void, env, i32, i32, i32) | |
826 | DEF_HELPER_4(msa_bset_h, void, env, i32, i32, i32) | |
827 | DEF_HELPER_4(msa_bset_w, void, env, i32, i32, i32) | |
828 | DEF_HELPER_4(msa_bset_d, void, env, i32, i32, i32) | |
829 | ||
c65ca134 AM |
830 | DEF_HELPER_4(msa_add_a_b, void, env, i32, i32, i32) |
831 | DEF_HELPER_4(msa_add_a_h, void, env, i32, i32, i32) | |
832 | DEF_HELPER_4(msa_add_a_w, void, env, i32, i32, i32) | |
833 | DEF_HELPER_4(msa_add_a_d, void, env, i32, i32, i32) | |
834 | ||
835 | DEF_HELPER_4(msa_adds_a_b, void, env, i32, i32, i32) | |
836 | DEF_HELPER_4(msa_adds_a_h, void, env, i32, i32, i32) | |
837 | DEF_HELPER_4(msa_adds_a_w, void, env, i32, i32, i32) | |
838 | DEF_HELPER_4(msa_adds_a_d, void, env, i32, i32, i32) | |
839 | ||
840 | DEF_HELPER_4(msa_adds_s_b, void, env, i32, i32, i32) | |
841 | DEF_HELPER_4(msa_adds_s_h, void, env, i32, i32, i32) | |
842 | DEF_HELPER_4(msa_adds_s_w, void, env, i32, i32, i32) | |
843 | DEF_HELPER_4(msa_adds_s_d, void, env, i32, i32, i32) | |
844 | ||
845 | DEF_HELPER_4(msa_adds_u_b, void, env, i32, i32, i32) | |
846 | DEF_HELPER_4(msa_adds_u_h, void, env, i32, i32, i32) | |
847 | DEF_HELPER_4(msa_adds_u_w, void, env, i32, i32, i32) | |
848 | DEF_HELPER_4(msa_adds_u_d, void, env, i32, i32, i32) | |
849 | ||
850 | DEF_HELPER_4(msa_addv_b, void, env, i32, i32, i32) | |
851 | DEF_HELPER_4(msa_addv_h, void, env, i32, i32, i32) | |
852 | DEF_HELPER_4(msa_addv_w, void, env, i32, i32, i32) | |
853 | DEF_HELPER_4(msa_addv_d, void, env, i32, i32, i32) | |
854 | ||
dc0af931 AM |
855 | DEF_HELPER_4(msa_hadd_s_h, void, env, i32, i32, i32) |
856 | DEF_HELPER_4(msa_hadd_s_w, void, env, i32, i32, i32) | |
857 | DEF_HELPER_4(msa_hadd_s_d, void, env, i32, i32, i32) | |
858 | ||
859 | DEF_HELPER_4(msa_hadd_u_h, void, env, i32, i32, i32) | |
860 | DEF_HELPER_4(msa_hadd_u_w, void, env, i32, i32, i32) | |
861 | DEF_HELPER_4(msa_hadd_u_d, void, env, i32, i32, i32) | |
862 | ||
7672edc4 AM |
863 | DEF_HELPER_4(msa_ave_s_b, void, env, i32, i32, i32) |
864 | DEF_HELPER_4(msa_ave_s_h, void, env, i32, i32, i32) | |
865 | DEF_HELPER_4(msa_ave_s_w, void, env, i32, i32, i32) | |
866 | DEF_HELPER_4(msa_ave_s_d, void, env, i32, i32, i32) | |
867 | ||
868 | DEF_HELPER_4(msa_ave_u_b, void, env, i32, i32, i32) | |
869 | DEF_HELPER_4(msa_ave_u_h, void, env, i32, i32, i32) | |
870 | DEF_HELPER_4(msa_ave_u_w, void, env, i32, i32, i32) | |
871 | DEF_HELPER_4(msa_ave_u_d, void, env, i32, i32, i32) | |
872 | ||
755107e2 AM |
873 | DEF_HELPER_4(msa_aver_s_b, void, env, i32, i32, i32) |
874 | DEF_HELPER_4(msa_aver_s_h, void, env, i32, i32, i32) | |
875 | DEF_HELPER_4(msa_aver_s_w, void, env, i32, i32, i32) | |
876 | DEF_HELPER_4(msa_aver_s_d, void, env, i32, i32, i32) | |
877 | ||
878 | DEF_HELPER_4(msa_aver_u_b, void, env, i32, i32, i32) | |
879 | DEF_HELPER_4(msa_aver_u_h, void, env, i32, i32, i32) | |
880 | DEF_HELPER_4(msa_aver_u_w, void, env, i32, i32, i32) | |
881 | DEF_HELPER_4(msa_aver_u_d, void, env, i32, i32, i32) | |
882 | ||
ade7e788 AM |
883 | DEF_HELPER_4(msa_ceq_b, void, env, i32, i32, i32) |
884 | DEF_HELPER_4(msa_ceq_h, void, env, i32, i32, i32) | |
885 | DEF_HELPER_4(msa_ceq_w, void, env, i32, i32, i32) | |
886 | DEF_HELPER_4(msa_ceq_d, void, env, i32, i32, i32) | |
887 | ||
0501bb1a AM |
888 | DEF_HELPER_4(msa_cle_s_b, void, env, i32, i32, i32) |
889 | DEF_HELPER_4(msa_cle_s_h, void, env, i32, i32, i32) | |
890 | DEF_HELPER_4(msa_cle_s_w, void, env, i32, i32, i32) | |
891 | DEF_HELPER_4(msa_cle_s_d, void, env, i32, i32, i32) | |
892 | ||
893 | DEF_HELPER_4(msa_cle_u_b, void, env, i32, i32, i32) | |
894 | DEF_HELPER_4(msa_cle_u_h, void, env, i32, i32, i32) | |
895 | DEF_HELPER_4(msa_cle_u_w, void, env, i32, i32, i32) | |
896 | DEF_HELPER_4(msa_cle_u_d, void, env, i32, i32, i32) | |
897 | ||
11656699 AM |
898 | DEF_HELPER_4(msa_clt_s_b, void, env, i32, i32, i32) |
899 | DEF_HELPER_4(msa_clt_s_h, void, env, i32, i32, i32) | |
900 | DEF_HELPER_4(msa_clt_s_w, void, env, i32, i32, i32) | |
901 | DEF_HELPER_4(msa_clt_s_d, void, env, i32, i32, i32) | |
902 | ||
903 | DEF_HELPER_4(msa_clt_u_b, void, env, i32, i32, i32) | |
904 | DEF_HELPER_4(msa_clt_u_h, void, env, i32, i32, i32) | |
905 | DEF_HELPER_4(msa_clt_u_w, void, env, i32, i32, i32) | |
906 | DEF_HELPER_4(msa_clt_u_d, void, env, i32, i32, i32) | |
907 | ||
64a0257f AM |
908 | DEF_HELPER_4(msa_div_s_b, void, env, i32, i32, i32) |
909 | DEF_HELPER_4(msa_div_s_h, void, env, i32, i32, i32) | |
910 | DEF_HELPER_4(msa_div_s_w, void, env, i32, i32, i32) | |
911 | DEF_HELPER_4(msa_div_s_d, void, env, i32, i32, i32) | |
912 | ||
913 | DEF_HELPER_4(msa_div_u_b, void, env, i32, i32, i32) | |
914 | DEF_HELPER_4(msa_div_u_h, void, env, i32, i32, i32) | |
915 | DEF_HELPER_4(msa_div_u_w, void, env, i32, i32, i32) | |
916 | DEF_HELPER_4(msa_div_u_d, void, env, i32, i32, i32) | |
917 | ||
e8e01ef0 AM |
918 | DEF_HELPER_4(msa_max_a_b, void, env, i32, i32, i32) |
919 | DEF_HELPER_4(msa_max_a_h, void, env, i32, i32, i32) | |
920 | DEF_HELPER_4(msa_max_a_w, void, env, i32, i32, i32) | |
921 | DEF_HELPER_4(msa_max_a_d, void, env, i32, i32, i32) | |
2db26305 AM |
922 | DEF_HELPER_4(msa_max_s_b, void, env, i32, i32, i32) |
923 | DEF_HELPER_4(msa_max_s_h, void, env, i32, i32, i32) | |
924 | DEF_HELPER_4(msa_max_s_w, void, env, i32, i32, i32) | |
925 | DEF_HELPER_4(msa_max_s_d, void, env, i32, i32, i32) | |
926 | DEF_HELPER_4(msa_max_u_b, void, env, i32, i32, i32) | |
927 | DEF_HELPER_4(msa_max_u_h, void, env, i32, i32, i32) | |
928 | DEF_HELPER_4(msa_max_u_w, void, env, i32, i32, i32) | |
929 | DEF_HELPER_4(msa_max_u_d, void, env, i32, i32, i32) | |
e8e01ef0 AM |
930 | DEF_HELPER_4(msa_min_a_b, void, env, i32, i32, i32) |
931 | DEF_HELPER_4(msa_min_a_h, void, env, i32, i32, i32) | |
932 | DEF_HELPER_4(msa_min_a_w, void, env, i32, i32, i32) | |
933 | DEF_HELPER_4(msa_min_a_d, void, env, i32, i32, i32) | |
2db26305 AM |
934 | DEF_HELPER_4(msa_min_s_b, void, env, i32, i32, i32) |
935 | DEF_HELPER_4(msa_min_s_h, void, env, i32, i32, i32) | |
936 | DEF_HELPER_4(msa_min_s_w, void, env, i32, i32, i32) | |
937 | DEF_HELPER_4(msa_min_s_d, void, env, i32, i32, i32) | |
938 | DEF_HELPER_4(msa_min_u_b, void, env, i32, i32, i32) | |
939 | DEF_HELPER_4(msa_min_u_h, void, env, i32, i32, i32) | |
940 | DEF_HELPER_4(msa_min_u_w, void, env, i32, i32, i32) | |
941 | DEF_HELPER_4(msa_min_u_d, void, env, i32, i32, i32) | |
e8e01ef0 | 942 | |
a6387ea5 AM |
943 | DEF_HELPER_4(msa_mod_u_b, void, env, i32, i32, i32) |
944 | DEF_HELPER_4(msa_mod_u_h, void, env, i32, i32, i32) | |
945 | DEF_HELPER_4(msa_mod_u_w, void, env, i32, i32, i32) | |
946 | DEF_HELPER_4(msa_mod_u_d, void, env, i32, i32, i32) | |
947 | ||
948 | DEF_HELPER_4(msa_mod_s_b, void, env, i32, i32, i32) | |
949 | DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32) | |
950 | DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32) | |
951 | DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32) | |
952 | ||
f392d134 AM |
953 | DEF_HELPER_4(msa_asub_s_b, void, env, i32, i32, i32) |
954 | DEF_HELPER_4(msa_asub_s_h, void, env, i32, i32, i32) | |
955 | DEF_HELPER_4(msa_asub_s_w, void, env, i32, i32, i32) | |
956 | DEF_HELPER_4(msa_asub_s_d, void, env, i32, i32, i32) | |
957 | ||
958 | DEF_HELPER_4(msa_asub_u_b, void, env, i32, i32, i32) | |
959 | DEF_HELPER_4(msa_asub_u_h, void, env, i32, i32, i32) | |
960 | DEF_HELPER_4(msa_asub_u_w, void, env, i32, i32, i32) | |
961 | DEF_HELPER_4(msa_asub_u_d, void, env, i32, i32, i32) | |
962 | ||
b24b9aec AM |
963 | DEF_HELPER_4(msa_hsub_s_h, void, env, i32, i32, i32) |
964 | DEF_HELPER_4(msa_hsub_s_w, void, env, i32, i32, i32) | |
965 | DEF_HELPER_4(msa_hsub_s_d, void, env, i32, i32, i32) | |
966 | ||
967 | DEF_HELPER_4(msa_hsub_u_h, void, env, i32, i32, i32) | |
968 | DEF_HELPER_4(msa_hsub_u_w, void, env, i32, i32, i32) | |
969 | DEF_HELPER_4(msa_hsub_u_d, void, env, i32, i32, i32) | |
970 | ||
fb5f59b4 AM |
971 | DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32) |
972 | DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32) | |
973 | DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32) | |
974 | DEF_HELPER_4(msa_ilvev_d, void, env, i32, i32, i32) | |
975 | DEF_HELPER_4(msa_ilvod_b, void, env, i32, i32, i32) | |
976 | DEF_HELPER_4(msa_ilvod_h, void, env, i32, i32, i32) | |
977 | DEF_HELPER_4(msa_ilvod_w, void, env, i32, i32, i32) | |
978 | DEF_HELPER_4(msa_ilvod_d, void, env, i32, i32, i32) | |
979 | DEF_HELPER_4(msa_ilvl_b, void, env, i32, i32, i32) | |
980 | DEF_HELPER_4(msa_ilvl_h, void, env, i32, i32, i32) | |
981 | DEF_HELPER_4(msa_ilvl_w, void, env, i32, i32, i32) | |
982 | DEF_HELPER_4(msa_ilvl_d, void, env, i32, i32, i32) | |
983 | DEF_HELPER_4(msa_ilvr_b, void, env, i32, i32, i32) | |
984 | DEF_HELPER_4(msa_ilvr_h, void, env, i32, i32, i32) | |
985 | DEF_HELPER_4(msa_ilvr_w, void, env, i32, i32, i32) | |
986 | DEF_HELPER_4(msa_ilvr_d, void, env, i32, i32, i32) | |
987 | ||
0a1bb912 AM |
988 | DEF_HELPER_4(msa_and_v, void, env, i32, i32, i32) |
989 | DEF_HELPER_4(msa_nor_v, void, env, i32, i32, i32) | |
990 | DEF_HELPER_4(msa_or_v, void, env, i32, i32, i32) | |
991 | DEF_HELPER_4(msa_xor_v, void, env, i32, i32, i32) | |
992 | ||
8a0ee380 AM |
993 | DEF_HELPER_4(msa_pckev_b, void, env, i32, i32, i32) |
994 | DEF_HELPER_4(msa_pckev_h, void, env, i32, i32, i32) | |
995 | DEF_HELPER_4(msa_pckev_w, void, env, i32, i32, i32) | |
996 | DEF_HELPER_4(msa_pckev_d, void, env, i32, i32, i32) | |
997 | DEF_HELPER_4(msa_pckod_b, void, env, i32, i32, i32) | |
998 | DEF_HELPER_4(msa_pckod_h, void, env, i32, i32, i32) | |
999 | DEF_HELPER_4(msa_pckod_w, void, env, i32, i32, i32) | |
1000 | DEF_HELPER_4(msa_pckod_d, void, env, i32, i32, i32) | |
1001 | ||
4d52cc2b AM |
1002 | DEF_HELPER_4(msa_sll_b, void, env, i32, i32, i32) |
1003 | DEF_HELPER_4(msa_sll_h, void, env, i32, i32, i32) | |
1004 | DEF_HELPER_4(msa_sll_w, void, env, i32, i32, i32) | |
1005 | DEF_HELPER_4(msa_sll_d, void, env, i32, i32, i32) | |
1006 | ||
1007 | DEF_HELPER_4(msa_sra_b, void, env, i32, i32, i32) | |
1008 | DEF_HELPER_4(msa_sra_h, void, env, i32, i32, i32) | |
1009 | DEF_HELPER_4(msa_sra_w, void, env, i32, i32, i32) | |
1010 | DEF_HELPER_4(msa_sra_d, void, env, i32, i32, i32) | |
1011 | ||
1012 | DEF_HELPER_4(msa_srar_b, void, env, i32, i32, i32) | |
1013 | DEF_HELPER_4(msa_srar_h, void, env, i32, i32, i32) | |
1014 | DEF_HELPER_4(msa_srar_w, void, env, i32, i32, i32) | |
1015 | DEF_HELPER_4(msa_srar_d, void, env, i32, i32, i32) | |
1016 | ||
1017 | DEF_HELPER_4(msa_srl_b, void, env, i32, i32, i32) | |
1018 | DEF_HELPER_4(msa_srl_h, void, env, i32, i32, i32) | |
1019 | DEF_HELPER_4(msa_srl_w, void, env, i32, i32, i32) | |
1020 | DEF_HELPER_4(msa_srl_d, void, env, i32, i32, i32) | |
1021 | ||
1022 | DEF_HELPER_4(msa_srlr_b, void, env, i32, i32, i32) | |
1023 | DEF_HELPER_4(msa_srlr_h, void, env, i32, i32, i32) | |
1024 | DEF_HELPER_4(msa_srlr_w, void, env, i32, i32, i32) | |
1025 | DEF_HELPER_4(msa_srlr_d, void, env, i32, i32, i32) | |
1026 | ||
26f0e079 | 1027 | DEF_HELPER_3(msa_move_v, void, env, i32, i32) |
81c4b059 | 1028 | |
4c789546 YK |
1029 | DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32) |
1030 | DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32) | |
1031 | DEF_HELPER_4(msa_nori_b, void, env, i32, i32, i32) | |
1032 | DEF_HELPER_4(msa_xori_b, void, env, i32, i32, i32) | |
1033 | DEF_HELPER_4(msa_bmnzi_b, void, env, i32, i32, i32) | |
1034 | DEF_HELPER_4(msa_bmzi_b, void, env, i32, i32, i32) | |
1035 | DEF_HELPER_4(msa_bseli_b, void, env, i32, i32, i32) | |
1036 | DEF_HELPER_5(msa_shf_df, void, env, i32, i32, i32, i32) | |
80e71591 YK |
1037 | |
1038 | DEF_HELPER_5(msa_addvi_df, void, env, i32, i32, i32, s32) | |
1039 | DEF_HELPER_5(msa_subvi_df, void, env, i32, i32, i32, s32) | |
1040 | DEF_HELPER_5(msa_maxi_s_df, void, env, i32, i32, i32, s32) | |
1041 | DEF_HELPER_5(msa_maxi_u_df, void, env, i32, i32, i32, s32) | |
1042 | DEF_HELPER_5(msa_mini_s_df, void, env, i32, i32, i32, s32) | |
1043 | DEF_HELPER_5(msa_mini_u_df, void, env, i32, i32, i32, s32) | |
1044 | DEF_HELPER_5(msa_ceqi_df, void, env, i32, i32, i32, s32) | |
1045 | DEF_HELPER_5(msa_clti_s_df, void, env, i32, i32, i32, s32) | |
1046 | DEF_HELPER_5(msa_clti_u_df, void, env, i32, i32, i32, s32) | |
1047 | DEF_HELPER_5(msa_clei_s_df, void, env, i32, i32, i32, s32) | |
1048 | DEF_HELPER_5(msa_clei_u_df, void, env, i32, i32, i32, s32) | |
1049 | DEF_HELPER_4(msa_ldi_df, void, env, i32, i32, s32) | |
d4cf28de YK |
1050 | |
1051 | DEF_HELPER_5(msa_slli_df, void, env, i32, i32, i32, i32) | |
1052 | DEF_HELPER_5(msa_srai_df, void, env, i32, i32, i32, i32) | |
1053 | DEF_HELPER_5(msa_srli_df, void, env, i32, i32, i32, i32) | |
1054 | DEF_HELPER_5(msa_bclri_df, void, env, i32, i32, i32, i32) | |
1055 | DEF_HELPER_5(msa_bseti_df, void, env, i32, i32, i32, i32) | |
1056 | DEF_HELPER_5(msa_bnegi_df, void, env, i32, i32, i32, i32) | |
1057 | DEF_HELPER_5(msa_binsli_df, void, env, i32, i32, i32, i32) | |
1058 | DEF_HELPER_5(msa_binsri_df, void, env, i32, i32, i32, i32) | |
1059 | DEF_HELPER_5(msa_sat_s_df, void, env, i32, i32, i32, i32) | |
1060 | DEF_HELPER_5(msa_sat_u_df, void, env, i32, i32, i32, i32) | |
1061 | DEF_HELPER_5(msa_srari_df, void, env, i32, i32, i32, i32) | |
1062 | DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32) | |
28f99f08 | 1063 | |
28f99f08 YK |
1064 | DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32) |
1065 | DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32) | |
28f99f08 | 1066 | DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32) |
28f99f08 YK |
1067 | DEF_HELPER_5(msa_subs_s_df, void, env, i32, i32, i32, i32) |
1068 | DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32) | |
1069 | DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32) | |
1070 | DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32) | |
28f99f08 YK |
1071 | DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32) |
1072 | DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32) | |
1073 | DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32) | |
28f99f08 YK |
1074 | DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32) |
1075 | DEF_HELPER_5(msa_dotp_u_df, void, env, i32, i32, i32, i32) | |
1076 | DEF_HELPER_5(msa_dpadd_s_df, void, env, i32, i32, i32, i32) | |
1077 | DEF_HELPER_5(msa_dpadd_u_df, void, env, i32, i32, i32, i32) | |
1078 | DEF_HELPER_5(msa_dpsub_s_df, void, env, i32, i32, i32, i32) | |
1079 | DEF_HELPER_5(msa_dpsub_u_df, void, env, i32, i32, i32, i32) | |
1080 | DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32) | |
1081 | DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32) | |
28f99f08 | 1082 | DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32) |
1e608ec1 YK |
1083 | |
1084 | DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32) | |
1085 | DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32) | |
631c4674 | 1086 | |
1e608ec1 YK |
1087 | DEF_HELPER_5(msa_insve_df, void, env, i32, i32, i32, i32) |
1088 | DEF_HELPER_3(msa_ctcmsa, void, env, tl, i32) | |
1089 | DEF_HELPER_2(msa_cfcmsa, tl, env, i32) | |
7d05b9c8 YK |
1090 | |
1091 | DEF_HELPER_5(msa_fcaf_df, void, env, i32, i32, i32, i32) | |
1092 | DEF_HELPER_5(msa_fcun_df, void, env, i32, i32, i32, i32) | |
1093 | DEF_HELPER_5(msa_fceq_df, void, env, i32, i32, i32, i32) | |
1094 | DEF_HELPER_5(msa_fcueq_df, void, env, i32, i32, i32, i32) | |
1095 | DEF_HELPER_5(msa_fclt_df, void, env, i32, i32, i32, i32) | |
1096 | DEF_HELPER_5(msa_fcult_df, void, env, i32, i32, i32, i32) | |
1097 | DEF_HELPER_5(msa_fcle_df, void, env, i32, i32, i32, i32) | |
1098 | DEF_HELPER_5(msa_fcule_df, void, env, i32, i32, i32, i32) | |
1099 | DEF_HELPER_5(msa_fsaf_df, void, env, i32, i32, i32, i32) | |
1100 | DEF_HELPER_5(msa_fsun_df, void, env, i32, i32, i32, i32) | |
1101 | DEF_HELPER_5(msa_fseq_df, void, env, i32, i32, i32, i32) | |
1102 | DEF_HELPER_5(msa_fsueq_df, void, env, i32, i32, i32, i32) | |
1103 | DEF_HELPER_5(msa_fslt_df, void, env, i32, i32, i32, i32) | |
1104 | DEF_HELPER_5(msa_fsult_df, void, env, i32, i32, i32, i32) | |
1105 | DEF_HELPER_5(msa_fsle_df, void, env, i32, i32, i32, i32) | |
1106 | DEF_HELPER_5(msa_fsule_df, void, env, i32, i32, i32, i32) | |
1107 | DEF_HELPER_5(msa_fadd_df, void, env, i32, i32, i32, i32) | |
1108 | DEF_HELPER_5(msa_fsub_df, void, env, i32, i32, i32, i32) | |
1109 | DEF_HELPER_5(msa_fmul_df, void, env, i32, i32, i32, i32) | |
1110 | DEF_HELPER_5(msa_fdiv_df, void, env, i32, i32, i32, i32) | |
1111 | DEF_HELPER_5(msa_fmadd_df, void, env, i32, i32, i32, i32) | |
1112 | DEF_HELPER_5(msa_fmsub_df, void, env, i32, i32, i32, i32) | |
1113 | DEF_HELPER_5(msa_fexp2_df, void, env, i32, i32, i32, i32) | |
1114 | DEF_HELPER_5(msa_fexdo_df, void, env, i32, i32, i32, i32) | |
1115 | DEF_HELPER_5(msa_ftq_df, void, env, i32, i32, i32, i32) | |
1116 | DEF_HELPER_5(msa_fmin_df, void, env, i32, i32, i32, i32) | |
1117 | DEF_HELPER_5(msa_fmin_a_df, void, env, i32, i32, i32, i32) | |
1118 | DEF_HELPER_5(msa_fmax_df, void, env, i32, i32, i32, i32) | |
1119 | DEF_HELPER_5(msa_fmax_a_df, void, env, i32, i32, i32, i32) | |
1120 | DEF_HELPER_5(msa_fcor_df, void, env, i32, i32, i32, i32) | |
1121 | DEF_HELPER_5(msa_fcune_df, void, env, i32, i32, i32, i32) | |
1122 | DEF_HELPER_5(msa_fcne_df, void, env, i32, i32, i32, i32) | |
1123 | DEF_HELPER_5(msa_mul_q_df, void, env, i32, i32, i32, i32) | |
1124 | DEF_HELPER_5(msa_madd_q_df, void, env, i32, i32, i32, i32) | |
1125 | DEF_HELPER_5(msa_msub_q_df, void, env, i32, i32, i32, i32) | |
1126 | DEF_HELPER_5(msa_fsor_df, void, env, i32, i32, i32, i32) | |
1127 | DEF_HELPER_5(msa_fsune_df, void, env, i32, i32, i32, i32) | |
1128 | DEF_HELPER_5(msa_fsne_df, void, env, i32, i32, i32, i32) | |
1129 | DEF_HELPER_5(msa_mulr_q_df, void, env, i32, i32, i32, i32) | |
1130 | DEF_HELPER_5(msa_maddr_q_df, void, env, i32, i32, i32, i32) | |
1131 | DEF_HELPER_5(msa_msubr_q_df, void, env, i32, i32, i32, i32) | |
cbe50b9a | 1132 | |
cbe50b9a | 1133 | DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32) |
3bdeb688 | 1134 | |
631c4674 MM |
1135 | DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32) |
1136 | DEF_HELPER_4(msa_copy_s_h, void, env, i32, i32, i32) | |
1137 | DEF_HELPER_4(msa_copy_s_w, void, env, i32, i32, i32) | |
1138 | DEF_HELPER_4(msa_copy_s_d, void, env, i32, i32, i32) | |
41d28858 MM |
1139 | DEF_HELPER_4(msa_copy_u_b, void, env, i32, i32, i32) |
1140 | DEF_HELPER_4(msa_copy_u_h, void, env, i32, i32, i32) | |
1141 | DEF_HELPER_4(msa_copy_u_w, void, env, i32, i32, i32) | |
c1c9a10f MM |
1142 | DEF_HELPER_4(msa_insert_b, void, env, i32, i32, i32) |
1143 | DEF_HELPER_4(msa_insert_h, void, env, i32, i32, i32) | |
1144 | DEF_HELPER_4(msa_insert_w, void, env, i32, i32, i32) | |
1145 | DEF_HELPER_4(msa_insert_d, void, env, i32, i32, i32) | |
631c4674 | 1146 | |
3bdeb688 YK |
1147 | DEF_HELPER_4(msa_fclass_df, void, env, i32, i32, i32) |
1148 | DEF_HELPER_4(msa_ftrunc_s_df, void, env, i32, i32, i32) | |
1149 | DEF_HELPER_4(msa_ftrunc_u_df, void, env, i32, i32, i32) | |
1150 | DEF_HELPER_4(msa_fsqrt_df, void, env, i32, i32, i32) | |
1151 | DEF_HELPER_4(msa_frsqrt_df, void, env, i32, i32, i32) | |
1152 | DEF_HELPER_4(msa_frcp_df, void, env, i32, i32, i32) | |
1153 | DEF_HELPER_4(msa_frint_df, void, env, i32, i32, i32) | |
1154 | DEF_HELPER_4(msa_flog2_df, void, env, i32, i32, i32) | |
1155 | DEF_HELPER_4(msa_fexupl_df, void, env, i32, i32, i32) | |
1156 | DEF_HELPER_4(msa_fexupr_df, void, env, i32, i32, i32) | |
1157 | DEF_HELPER_4(msa_ffql_df, void, env, i32, i32, i32) | |
1158 | DEF_HELPER_4(msa_ffqr_df, void, env, i32, i32, i32) | |
1159 | DEF_HELPER_4(msa_ftint_s_df, void, env, i32, i32, i32) | |
1160 | DEF_HELPER_4(msa_ftint_u_df, void, env, i32, i32, i32) | |
1161 | DEF_HELPER_4(msa_ffint_s_df, void, env, i32, i32, i32) | |
1162 | DEF_HELPER_4(msa_ffint_u_df, void, env, i32, i32, i32) | |
f7685877 | 1163 | |
adc370a4 YK |
1164 | #define MSALDST_PROTO(type) \ |
1165 | DEF_HELPER_3(msa_ld_ ## type, void, env, i32, tl) \ | |
1166 | DEF_HELPER_3(msa_st_ ## type, void, env, i32, tl) | |
1167 | MSALDST_PROTO(b) | |
1168 | MSALDST_PROTO(h) | |
1169 | MSALDST_PROTO(w) | |
1170 | MSALDST_PROTO(d) | |
1171 | #undef MSALDST_PROTO | |
0d74a222 LA |
1172 | |
1173 | DEF_HELPER_3(cache, void, env, tl, i32) |