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ca8e4bf4 DG |
1 | /* |
2 | * QTest testcase for PowerNV XSCOM bus | |
3 | * | |
4 | * Copyright (c) 2016, IBM Corporation. | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or | |
7 | * later. See the COPYING file in the top-level directory. | |
8 | */ | |
9 | #include "qemu/osdep.h" | |
10 | ||
11 | #include "libqtest.h" | |
12 | ||
13 | typedef enum PnvChipType { | |
14 | PNV_CHIP_POWER8E, /* AKA Murano (default) */ | |
15 | PNV_CHIP_POWER8, /* AKA Venice */ | |
16 | PNV_CHIP_POWER8NVL, /* AKA Naples */ | |
17 | PNV_CHIP_POWER9, /* AKA Nimbus */ | |
18 | } PnvChipType; | |
19 | ||
20 | typedef struct PnvChip { | |
21 | PnvChipType chip_type; | |
22 | const char *cpu_model; | |
23 | uint64_t xscom_base; | |
ca8e4bf4 DG |
24 | uint64_t cfam_id; |
25 | uint32_t first_core; | |
26 | } PnvChip; | |
27 | ||
28 | static const PnvChip pnv_chips[] = { | |
29 | { | |
30 | .chip_type = PNV_CHIP_POWER8, | |
31 | .cpu_model = "POWER8", | |
32 | .xscom_base = 0x0003fc0000000000ull, | |
ca8e4bf4 DG |
33 | .cfam_id = 0x220ea04980000000ull, |
34 | .first_core = 0x1, | |
35 | }, { | |
36 | .chip_type = PNV_CHIP_POWER8NVL, | |
37 | .cpu_model = "POWER8NVL", | |
38 | .xscom_base = 0x0003fc0000000000ull, | |
ca8e4bf4 DG |
39 | .cfam_id = 0x120d304980000000ull, |
40 | .first_core = 0x1, | |
eaa477ca DG |
41 | }, |
42 | #if 0 /* POWER9 support is not ready yet */ | |
43 | { | |
ca8e4bf4 DG |
44 | .chip_type = PNV_CHIP_POWER9, |
45 | .cpu_model = "POWER9", | |
46 | .xscom_base = 0x000603fc00000000ull, | |
83028a2b | 47 | .cfam_id = 0x220d104900008000ull, |
09279d7e | 48 | .first_core = 0x0, |
ca8e4bf4 | 49 | }, |
eaa477ca | 50 | #endif |
ca8e4bf4 DG |
51 | }; |
52 | ||
53 | static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba) | |
54 | { | |
55 | uint64_t addr = chip->xscom_base; | |
56 | ||
57 | if (chip->chip_type == PNV_CHIP_POWER9) { | |
58 | addr |= ((uint64_t) pcba << 3); | |
59 | } else { | |
60 | addr |= (((uint64_t) pcba << 4) & ~0xffull) | | |
61 | (((uint64_t) pcba << 3) & 0x78); | |
62 | } | |
63 | return addr; | |
64 | } | |
65 | ||
8a547c8d TH |
66 | static uint64_t pnv_xscom_read(QTestState *qts, const PnvChip *chip, |
67 | uint32_t pcba) | |
ca8e4bf4 | 68 | { |
8a547c8d | 69 | return qtest_readq(qts, pnv_xscom_addr(chip, pcba)); |
ca8e4bf4 DG |
70 | } |
71 | ||
8a547c8d | 72 | static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip) |
ca8e4bf4 | 73 | { |
8a547c8d | 74 | uint64_t f000f = pnv_xscom_read(qts, chip, 0xf000f); |
ca8e4bf4 DG |
75 | |
76 | g_assert_cmphex(f000f, ==, chip->cfam_id); | |
77 | } | |
78 | ||
79 | static void test_cfam_id(const void *data) | |
80 | { | |
ca8e4bf4 | 81 | const PnvChip *chip = data; |
8a547c8d | 82 | QTestState *qts; |
ca8e4bf4 | 83 | |
8a547c8d TH |
84 | qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model); |
85 | test_xscom_cfam_id(qts, chip); | |
86 | qtest_quit(qts); | |
ca8e4bf4 DG |
87 | } |
88 | ||
c035851a CLG |
89 | |
90 | #define PNV_XSCOM_EX_CORE_BASE 0x10000000ull | |
91 | #define PNV_XSCOM_EX_BASE(core) \ | |
92 | (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24)) | |
93 | #define PNV_XSCOM_P9_EC_BASE(core) \ | |
94 | ((uint64_t)(((core) & 0x1F) + 0x20) << 24) | |
95 | ||
ca8e4bf4 DG |
96 | #define PNV_XSCOM_EX_DTS_RESULT0 0x50000 |
97 | ||
8a547c8d | 98 | static void test_xscom_core(QTestState *qts, const PnvChip *chip) |
ca8e4bf4 | 99 | { |
c035851a CLG |
100 | uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0; |
101 | uint64_t dts0; | |
102 | ||
103 | if (chip->chip_type != PNV_CHIP_POWER9) { | |
104 | first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core); | |
105 | } else { | |
106 | first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core); | |
107 | } | |
108 | ||
8a547c8d | 109 | dts0 = pnv_xscom_read(qts, chip, first_core_dts0); |
ca8e4bf4 DG |
110 | |
111 | g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull); | |
112 | } | |
113 | ||
114 | static void test_core(const void *data) | |
115 | { | |
ca8e4bf4 | 116 | const PnvChip *chip = data; |
8a547c8d | 117 | QTestState *qts; |
ca8e4bf4 | 118 | |
8a547c8d TH |
119 | qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model); |
120 | test_xscom_core(qts, chip); | |
121 | qtest_quit(qts); | |
ca8e4bf4 DG |
122 | } |
123 | ||
124 | static void add_test(const char *name, void (*test)(const void *data)) | |
125 | { | |
126 | int i; | |
127 | ||
128 | for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) { | |
129 | char *tname = g_strdup_printf("pnv-xscom/%s/%s", name, | |
130 | pnv_chips[i].cpu_model); | |
131 | qtest_add_data_func(tname, &pnv_chips[i], test); | |
132 | g_free(tname); | |
133 | } | |
134 | } | |
135 | ||
136 | int main(int argc, char **argv) | |
137 | { | |
138 | g_test_init(&argc, &argv, NULL); | |
139 | ||
140 | add_test("cfam_id", test_cfam_id); | |
141 | add_test("core", test_core); | |
142 | return g_test_run(); | |
143 | } |