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Commit | Line | Data |
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a171fe39 AZ |
1 | /* |
2 | * Intel XScale PXA255/270 PC Card and CompactFlash Interface. | |
3 | * | |
4 | * Copyright (c) 2006 Openedhand Ltd. | |
5 | * Written by Andrzej Zaborowski <[email protected]> | |
6 | * | |
7 | * This code is licensed under the GPLv2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
a171fe39 AZ |
11 | */ |
12 | ||
8ef94f0b | 13 | #include "qemu/osdep.h" |
83c9f4ca | 14 | #include "hw/hw.h" |
80bbaee6 | 15 | #include "hw/sysbus.h" |
83c9f4ca | 16 | #include "hw/pcmcia.h" |
0d09e41a | 17 | #include "hw/arm/pxa.h" |
a171fe39 | 18 | |
80bbaee6 AF |
19 | #define TYPE_PXA2XX_PCMCIA "pxa2xx-pcmcia" |
20 | #define PXA2XX_PCMCIA(obj) \ | |
21 | OBJECT_CHECK(PXA2xxPCMCIAState, obj, TYPE_PXA2XX_PCMCIA) | |
4beeaa71 | 22 | |
bc24a225 | 23 | struct PXA2xxPCMCIAState { |
80bbaee6 AF |
24 | SysBusDevice parent_obj; |
25 | ||
bc24a225 | 26 | PCMCIASocket slot; |
80bbaee6 | 27 | MemoryRegion container_mem; |
354a8c06 | 28 | MemoryRegion common_iomem; |
4beeaa71 | 29 | MemoryRegion attr_iomem; |
59aee13c | 30 | MemoryRegion iomem; |
a171fe39 AZ |
31 | |
32 | qemu_irq irq; | |
33 | qemu_irq cd_irq; | |
80bbaee6 AF |
34 | |
35 | PCMCIACardState *card; | |
a171fe39 AZ |
36 | }; |
37 | ||
354a8c06 | 38 | static uint64_t pxa2xx_pcmcia_common_read(void *opaque, |
a8170e5e | 39 | hwaddr offset, unsigned size) |
a171fe39 | 40 | { |
bc24a225 | 41 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 42 | PCMCIACardClass *pcc; |
a171fe39 AZ |
43 | |
44 | if (s->slot.attached) { | |
d1f2c96a AF |
45 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
46 | return pcc->common_read(s->card, offset); | |
a171fe39 AZ |
47 | } |
48 | ||
49 | return 0; | |
50 | } | |
51 | ||
a8170e5e | 52 | static void pxa2xx_pcmcia_common_write(void *opaque, hwaddr offset, |
354a8c06 | 53 | uint64_t value, unsigned size) |
a171fe39 | 54 | { |
bc24a225 | 55 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 56 | PCMCIACardClass *pcc; |
a171fe39 AZ |
57 | |
58 | if (s->slot.attached) { | |
d1f2c96a AF |
59 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
60 | pcc->common_write(s->card, offset, value); | |
a171fe39 AZ |
61 | } |
62 | } | |
63 | ||
4beeaa71 | 64 | static uint64_t pxa2xx_pcmcia_attr_read(void *opaque, |
a8170e5e | 65 | hwaddr offset, unsigned size) |
a171fe39 | 66 | { |
bc24a225 | 67 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 68 | PCMCIACardClass *pcc; |
a171fe39 AZ |
69 | |
70 | if (s->slot.attached) { | |
d1f2c96a AF |
71 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
72 | return pcc->attr_read(s->card, offset); | |
a171fe39 AZ |
73 | } |
74 | ||
75 | return 0; | |
76 | } | |
77 | ||
a8170e5e | 78 | static void pxa2xx_pcmcia_attr_write(void *opaque, hwaddr offset, |
4beeaa71 | 79 | uint64_t value, unsigned size) |
a171fe39 | 80 | { |
bc24a225 | 81 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 82 | PCMCIACardClass *pcc; |
a171fe39 AZ |
83 | |
84 | if (s->slot.attached) { | |
d1f2c96a AF |
85 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
86 | pcc->attr_write(s->card, offset, value); | |
a171fe39 AZ |
87 | } |
88 | } | |
89 | ||
59aee13c | 90 | static uint64_t pxa2xx_pcmcia_io_read(void *opaque, |
a8170e5e | 91 | hwaddr offset, unsigned size) |
a171fe39 | 92 | { |
bc24a225 | 93 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 94 | PCMCIACardClass *pcc; |
a171fe39 AZ |
95 | |
96 | if (s->slot.attached) { | |
d1f2c96a AF |
97 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
98 | return pcc->io_read(s->card, offset); | |
a171fe39 AZ |
99 | } |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
a8170e5e | 104 | static void pxa2xx_pcmcia_io_write(void *opaque, hwaddr offset, |
59aee13c | 105 | uint64_t value, unsigned size) |
a171fe39 | 106 | { |
bc24a225 | 107 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a | 108 | PCMCIACardClass *pcc; |
a171fe39 AZ |
109 | |
110 | if (s->slot.attached) { | |
d1f2c96a AF |
111 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
112 | pcc->io_write(s->card, offset, value); | |
a171fe39 AZ |
113 | } |
114 | } | |
115 | ||
354a8c06 BC |
116 | static const MemoryRegionOps pxa2xx_pcmcia_common_ops = { |
117 | .read = pxa2xx_pcmcia_common_read, | |
118 | .write = pxa2xx_pcmcia_common_write, | |
119 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
120 | }; |
121 | ||
4beeaa71 BC |
122 | static const MemoryRegionOps pxa2xx_pcmcia_attr_ops = { |
123 | .read = pxa2xx_pcmcia_attr_read, | |
124 | .write = pxa2xx_pcmcia_attr_write, | |
125 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
126 | }; |
127 | ||
59aee13c BC |
128 | static const MemoryRegionOps pxa2xx_pcmcia_io_ops = { |
129 | .read = pxa2xx_pcmcia_io_read, | |
130 | .write = pxa2xx_pcmcia_io_write, | |
131 | .endianness = DEVICE_NATIVE_ENDIAN | |
a171fe39 AZ |
132 | }; |
133 | ||
134 | static void pxa2xx_pcmcia_set_irq(void *opaque, int line, int level) | |
135 | { | |
bc24a225 | 136 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
a171fe39 AZ |
137 | if (!s->irq) |
138 | return; | |
139 | ||
140 | qemu_set_irq(s->irq, level); | |
141 | } | |
142 | ||
354a8c06 | 143 | PXA2xxPCMCIAState *pxa2xx_pcmcia_init(MemoryRegion *sysmem, |
a8170e5e | 144 | hwaddr base) |
a171fe39 | 145 | { |
80bbaee6 | 146 | DeviceState *dev; |
bc24a225 | 147 | PXA2xxPCMCIAState *s; |
a171fe39 | 148 | |
80bbaee6 AF |
149 | dev = qdev_create(NULL, TYPE_PXA2XX_PCMCIA); |
150 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); | |
151 | s = PXA2XX_PCMCIA(dev); | |
152 | ||
80bbaee6 AF |
153 | qdev_init_nofail(dev); |
154 | ||
155 | return s; | |
156 | } | |
157 | ||
80bbaee6 AF |
158 | static void pxa2xx_pcmcia_initfn(Object *obj) |
159 | { | |
160 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | |
161 | PXA2xxPCMCIAState *s = PXA2XX_PCMCIA(obj); | |
162 | ||
163 | memory_region_init(&s->container_mem, obj, "container", 0x10000000); | |
164 | sysbus_init_mmio(sbd, &s->container_mem); | |
a171fe39 AZ |
165 | |
166 | /* Socket I/O Memory Space */ | |
81e0ab48 | 167 | memory_region_init_io(&s->iomem, obj, &pxa2xx_pcmcia_io_ops, s, |
59aee13c | 168 | "pxa2xx-pcmcia-io", 0x04000000); |
80bbaee6 | 169 | memory_region_add_subregion(&s->container_mem, 0x00000000, |
59aee13c | 170 | &s->iomem); |
a171fe39 AZ |
171 | |
172 | /* Then next 64 MB is reserved */ | |
173 | ||
174 | /* Socket Attribute Memory Space */ | |
81e0ab48 | 175 | memory_region_init_io(&s->attr_iomem, obj, &pxa2xx_pcmcia_attr_ops, s, |
4beeaa71 | 176 | "pxa2xx-pcmcia-attribute", 0x04000000); |
80bbaee6 | 177 | memory_region_add_subregion(&s->container_mem, 0x08000000, |
4beeaa71 | 178 | &s->attr_iomem); |
a171fe39 AZ |
179 | |
180 | /* Socket Common Memory Space */ | |
81e0ab48 | 181 | memory_region_init_io(&s->common_iomem, obj, &pxa2xx_pcmcia_common_ops, s, |
354a8c06 | 182 | "pxa2xx-pcmcia-common", 0x04000000); |
80bbaee6 | 183 | memory_region_add_subregion(&s->container_mem, 0x0c000000, |
354a8c06 | 184 | &s->common_iomem); |
a171fe39 | 185 | |
f3c7d038 | 186 | s->slot.irq = qemu_allocate_irq(pxa2xx_pcmcia_set_irq, s, 0); |
3f582262 | 187 | |
80bbaee6 | 188 | object_property_add_link(obj, "card", TYPE_PCMCIA_CARD, |
39f72ef9 SH |
189 | (Object **)&s->card, |
190 | NULL, /* read-only property */ | |
191 | 0, NULL); | |
a171fe39 AZ |
192 | } |
193 | ||
194 | /* Insert a new card into a slot */ | |
bc24a225 | 195 | int pxa2xx_pcmcia_attach(void *opaque, PCMCIACardState *card) |
a171fe39 | 196 | { |
bc24a225 | 197 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a AF |
198 | PCMCIACardClass *pcc; |
199 | ||
200 | if (s->slot.attached) { | |
a171fe39 | 201 | return -EEXIST; |
d1f2c96a | 202 | } |
a171fe39 AZ |
203 | |
204 | if (s->cd_irq) { | |
205 | qemu_irq_raise(s->cd_irq); | |
206 | } | |
207 | ||
208 | s->card = card; | |
d1f2c96a | 209 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
a171fe39 | 210 | |
d1f2c96a | 211 | s->slot.attached = true; |
a171fe39 | 212 | s->card->slot = &s->slot; |
d1f2c96a | 213 | pcc->attach(s->card); |
a171fe39 AZ |
214 | |
215 | return 0; | |
216 | } | |
217 | ||
218 | /* Eject card from the slot */ | |
853ca11d | 219 | int pxa2xx_pcmcia_detach(void *opaque) |
a171fe39 | 220 | { |
bc24a225 | 221 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
d1f2c96a AF |
222 | PCMCIACardClass *pcc; |
223 | ||
224 | if (!s->slot.attached) { | |
a171fe39 | 225 | return -ENOENT; |
d1f2c96a | 226 | } |
a171fe39 | 227 | |
d1f2c96a AF |
228 | pcc = PCMCIA_CARD_GET_CLASS(s->card); |
229 | pcc->detach(s->card); | |
b9d38e95 BS |
230 | s->card->slot = NULL; |
231 | s->card = NULL; | |
a171fe39 | 232 | |
d1f2c96a | 233 | s->slot.attached = false; |
a171fe39 | 234 | |
d1f2c96a | 235 | if (s->irq) { |
a171fe39 | 236 | qemu_irq_lower(s->irq); |
d1f2c96a AF |
237 | } |
238 | if (s->cd_irq) { | |
a171fe39 | 239 | qemu_irq_lower(s->cd_irq); |
d1f2c96a | 240 | } |
a171fe39 AZ |
241 | |
242 | return 0; | |
243 | } | |
244 | ||
245 | /* Who to notify on card events */ | |
246 | void pxa2xx_pcmcia_set_irq_cb(void *opaque, qemu_irq irq, qemu_irq cd_irq) | |
247 | { | |
bc24a225 | 248 | PXA2xxPCMCIAState *s = (PXA2xxPCMCIAState *) opaque; |
a171fe39 AZ |
249 | s->irq = irq; |
250 | s->cd_irq = cd_irq; | |
251 | } | |
80bbaee6 | 252 | |
80bbaee6 AF |
253 | static const TypeInfo pxa2xx_pcmcia_type_info = { |
254 | .name = TYPE_PXA2XX_PCMCIA, | |
255 | .parent = TYPE_SYS_BUS_DEVICE, | |
256 | .instance_size = sizeof(PXA2xxPCMCIAState), | |
257 | .instance_init = pxa2xx_pcmcia_initfn, | |
80bbaee6 AF |
258 | }; |
259 | ||
260 | static void pxa2xx_pcmcia_register_types(void) | |
261 | { | |
262 | type_register_static(&pxa2xx_pcmcia_type_info); | |
263 | } | |
264 | ||
265 | type_init(pxa2xx_pcmcia_register_types) |