]>
Commit | Line | Data |
---|---|---|
5fafdf24 | 1 | /* |
cdbdb648 PB |
2 | * Generic ARM Programmable Interrupt Controller support. |
3 | * | |
4 | * Copyright (c) 2006 CodeSourcery. | |
5 | * Written by Paul Brook | |
6 | * | |
7 | * This code is licenced under the LGPL | |
8 | */ | |
9 | ||
87ecb68b | 10 | #include "hw.h" |
376253ec | 11 | #include "pc.h" |
87ecb68b | 12 | #include "arm-misc.h" |
cdbdb648 PB |
13 | |
14 | /* Stub functions for hardware that doesn't exist. */ | |
376253ec | 15 | void pic_info(Monitor *mon) |
cdbdb648 PB |
16 | { |
17 | } | |
18 | ||
376253ec | 19 | void irq_info(Monitor *mon) |
cdbdb648 PB |
20 | { |
21 | } | |
22 | ||
23 | ||
d537cf6c | 24 | /* Input 0 is IRQ and input 1 is FIQ. */ |
cdbdb648 PB |
25 | static void arm_pic_cpu_handler(void *opaque, int irq, int level) |
26 | { | |
d537cf6c | 27 | CPUState *env = (CPUState *)opaque; |
cdbdb648 PB |
28 | switch (irq) { |
29 | case ARM_PIC_CPU_IRQ: | |
30 | if (level) | |
d537cf6c | 31 | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
cdbdb648 | 32 | else |
d537cf6c | 33 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
cdbdb648 PB |
34 | break; |
35 | case ARM_PIC_CPU_FIQ: | |
36 | if (level) | |
d537cf6c | 37 | cpu_interrupt(env, CPU_INTERRUPT_FIQ); |
cdbdb648 | 38 | else |
d537cf6c | 39 | cpu_reset_interrupt(env, CPU_INTERRUPT_FIQ); |
cdbdb648 PB |
40 | break; |
41 | default: | |
2ac71179 | 42 | hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq); |
cdbdb648 PB |
43 | } |
44 | } | |
45 | ||
d537cf6c | 46 | qemu_irq *arm_pic_init_cpu(CPUState *env) |
cdbdb648 | 47 | { |
d537cf6c | 48 | return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2); |
cdbdb648 | 49 | } |