[qemu.git] / hw / imx.h

/*
 * i.MX31 emulation
 *
 * Copyright (C) 2012 Peter Chubb
 * NICTA
 *
 * This code is released under the GPL, version 2.0 or later
 * See the file `../COPYING' for details.
 */

#ifndef IMX_H
#define IMX_H

void imx_serial_create(int uart, const hwaddr addr, qemu_irq irq);

typedef enum  {
    NOCLK,
    MCU,
    HSP,
    IPG,
    CLK_32k
} IMXClk;

uint32_t imx_clock_frequency(DeviceState *s, IMXClk clock);

void imx_timerp_create(const hwaddr addr,
                      qemu_irq irq,
                      DeviceState *ccm);
void imx_timerg_create(const hwaddr addr,
                      qemu_irq irq,
                      DeviceState *ccm);


#endif /* IMX_H */
Commit	Line	Data
40b6f911 PC	1	/*
	2	* i.MX31 emulation
	3	*
	4	* Copyright (C) 2012 Peter Chubb
	5	* NICTA
	6	*
	7	* This code is released under the GPL, version 2.0 or later
	8	* See the file `../COPYING' for details.
	9	*/
	10
	11	#ifndef IMX_H
	12	#define IMX_H
	13
a8170e5e	14	void imx_serial_create(int uart, const hwaddr addr, qemu_irq irq);
40b6f911	15
bcc181b0 PC	16	typedef enum {
	17	NOCLK,
	18	MCU,
	19	HSP,
	20	IPG,
	21	CLK_32k
	22	} IMXClk;
	23
	24	uint32_t imx_clock_frequency(DeviceState *s, IMXClk clock);
	25
a8170e5e	26	void imx_timerp_create(const hwaddr addr,
78d1404d PC	27	qemu_irq irq,
78d1404d PC	28	DeviceState *ccm);
a8170e5e	29	void imx_timerg_create(const hwaddr addr,
78d1404d PC	30	qemu_irq irq,
	31	DeviceState *ccm);
	32
	33
40b6f911	34	#endif /* IMX_H */