[qemu.git] / hw / mcf.h

#ifndef HW_MCF_H
#define HW_MCF_H
/* Motorola ColdFire device prototypes.  */

/* mcf_uart.c */
uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr);
void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val);
void *mcf_uart_init(qemu_irq irq, CharDriverState *chr);
void mcf_uart_mm_init(target_phys_addr_t base, qemu_irq irq,
                      CharDriverState *chr);

/* mcf_intc.c */
qemu_irq *mcf_intc_init(target_phys_addr_t base, CPUState *env);

/* mcf_fec.c */
void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq);

/* mcf5206.c */
qemu_irq *mcf5206_init(uint32_t base, CPUState *env);

#endif
Commit	Line	Data
87ecb68b PB	1	#ifndef HW_MCF_H
	2	#define HW_MCF_H
	3	/* Motorola ColdFire device prototypes. */
	4
	5	/* mcf_uart.c */
	6	uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr);
	7	void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val);
	8	void mcf_uart_init(qemu_irq irq, CharDriverState chr);
	9	void mcf_uart_mm_init(target_phys_addr_t base, qemu_irq irq,
	10	CharDriverState *chr);
	11
	12	/* mcf_intc.c */
	13	qemu_irq mcf_intc_init(target_phys_addr_t base, CPUState env);
	14
	15	/* mcf_fec.c */
	16	void mcf_fec_init(NICInfo nd, target_phys_addr_t base, qemu_irq irq);
	17
	18	/* mcf5206.c */
	19	qemu_irq mcf5206_init(uint32_t base, CPUState env);
	20
	21	#endif