projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| dd873966 | 1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ |
| b061808d AG |
2 | /* |
| 3 | * ARM Power State and Coordination Interface (PSCI) header | |
| 4 | * | |
| 5 | * This header holds common PSCI defines and macros shared | |
| 6 | * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. | |
| 7 | * | |
| 8 | * Copyright (C) 2014 Linaro Ltd. | |
| 9 | * Author: Anup Patel <[email protected]> | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef _LINUX_PSCI_H | |
| 13 | #define _LINUX_PSCI_H | |
| 14 | ||
| 15 | /* | |
| 16 | * PSCI v0.1 interface | |
| 17 | * | |
| 18 | * The PSCI v0.1 function numbers are implementation defined. | |
| 19 | * | |
| 20 | * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, | |
| 21 | * INVALID_PARAMS, and DENIED defined below are applicable | |
| 22 | * to PSCI v0.1. | |
| 23 | */ | |
| 24 | ||
| 25 | /* PSCI v0.2 interface */ | |
| 26 | #define PSCI_0_2_FN_BASE 0x84000000 | |
| 27 | #define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) | |
| 28 | #define PSCI_0_2_64BIT 0x40000000 | |
| 29 | #define PSCI_0_2_FN64_BASE \ | |
| 30 | (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) | |
| 31 | #define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) | |
| 32 | ||
| 33 | #define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) | |
| 34 | #define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) | |
| 35 | #define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) | |
| 36 | #define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) | |
| 37 | #define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) | |
| 38 | #define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) | |
| 39 | #define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) | |
| 40 | #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) | |
| 41 | #define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) | |
| 42 | #define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) | |
| 43 | ||
| 44 | #define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) | |
| 45 | #define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) | |
| 46 | #define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) | |
| 47 | #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) | |
| 48 | #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) | |
| 49 | ||
| fff02bc0 PB |
50 | #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) |
| 51 | #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) | |
| d9cb4336 CH |
52 | #define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) |
| 53 | #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) | |
| fff02bc0 PB |
54 | |
| 55 | #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) | |
| d9cb4336 | 56 | #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) |
| fff02bc0 | 57 | |
| b061808d AG |
58 | /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ |
| 59 | #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff | |
| 60 | #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 | |
| 61 | #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 | |
| 62 | #define PSCI_0_2_POWER_STATE_TYPE_MASK \ | |
| 63 | (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) | |
| 64 | #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 | |
| 65 | #define PSCI_0_2_POWER_STATE_AFFL_MASK \ | |
| 66 | (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) | |
| 67 | ||
| fff02bc0 PB |
68 | /* PSCI extended power state encoding for CPU_SUSPEND function */ |
| 69 | #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff | |
| 70 | #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 | |
| 71 | #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 | |
| 72 | #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ | |
| 73 | (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) | |
| 74 | ||
| b061808d AG |
75 | /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ |
| 76 | #define PSCI_0_2_AFFINITY_LEVEL_ON 0 | |
| 77 | #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 | |
| 78 | #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 | |
| 79 | ||
| 80 | /* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ | |
| 81 | #define PSCI_0_2_TOS_UP_MIGRATE 0 | |
| 82 | #define PSCI_0_2_TOS_UP_NO_MIGRATE 1 | |
| 83 | #define PSCI_0_2_TOS_MP 2 | |
| 84 | ||
| 85 | /* PSCI version decoding (independent of PSCI version) */ | |
| 86 | #define PSCI_VERSION_MAJOR_SHIFT 16 | |
| 87 | #define PSCI_VERSION_MINOR_MASK \ | |
| 88 | ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) | |
| 89 | #define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK | |
| 90 | #define PSCI_VERSION_MAJOR(ver) \ | |
| 91 | (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) | |
| 92 | #define PSCI_VERSION_MINOR(ver) \ | |
| 93 | ((ver) & PSCI_VERSION_MINOR_MASK) | |
| 9f2d175d PB |
94 | #define PSCI_VERSION(maj, min) \ |
| 95 | ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ | |
| 96 | ((min) & PSCI_VERSION_MINOR_MASK)) | |
| b061808d | 97 | |
| fff02bc0 PB |
98 | /* PSCI features decoding (>=1.0) */ |
| 99 | #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 | |
| 100 | #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ | |
| 101 | (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) | |
| 102 | ||
| d9cb4336 CH |
103 | #define PSCI_1_0_OS_INITIATED BIT(0) |
| 104 | #define PSCI_1_0_SUSPEND_MODE_PC 0 | |
| 105 | #define PSCI_1_0_SUSPEND_MODE_OSI 1 | |
| 106 | ||
| b061808d AG |
107 | /* PSCI return values (inclusive of all PSCI versions) */ |
| 108 | #define PSCI_RET_SUCCESS 0 | |
| 109 | #define PSCI_RET_NOT_SUPPORTED -1 | |
| 110 | #define PSCI_RET_INVALID_PARAMS -2 | |
| 111 | #define PSCI_RET_DENIED -3 | |
| 112 | #define PSCI_RET_ALREADY_ON -4 | |
| 113 | #define PSCI_RET_ON_PENDING -5 | |
| 114 | #define PSCI_RET_INTERNAL_FAILURE -6 | |
| 115 | #define PSCI_RET_NOT_PRESENT -7 | |
| 116 | #define PSCI_RET_DISABLED -8 | |
| fff02bc0 | 117 | #define PSCI_RET_INVALID_ADDRESS -9 |
| b061808d AG |
118 | |
| 119 | #endif /* _LINUX_PSCI_H */ |