]> Git Repo - qemu.git/blame - target-sh4/op_helper.c
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[qemu.git] / target-sh4 / op_helper.c
CommitLineData
fdf9b3e8
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1/*
2 * SH4 emulation
5fafdf24 3 *
fdf9b3e8
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4 * Copyright (c) 2005 Samuel Tardieu
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
fdf9b3e8 18 */
9d4c9946 19#include "qemu/osdep.h"
3e457172 20#include "cpu.h"
2ef6175a 21#include "exec/helper-proto.h"
f08b6170 22#include "exec/cpu_ldst.h"
fdf9b3e8 23
fdf9b3e8
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24#ifndef CONFIG_USER_ONLY
25
d5a11fef 26void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
20503968 27 uintptr_t retaddr)
fdf9b3e8 28{
fdf9b3e8
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29 int ret;
30
d5a11fef 31 ret = superh_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
fdf9b3e8 32 if (ret) {
21829e9b 33 /* now we have a real cpu fault */
a8a826a3 34 if (retaddr) {
3f38f309 35 cpu_restore_state(cs, retaddr);
a8a826a3 36 }
5638d180 37 cpu_loop_exit(cs);
fdf9b3e8 38 }
fdf9b3e8
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39}
40
41#endif
42
485d0035 43void helper_ldtlb(CPUSH4State *env)
ea2b542a
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44{
45#ifdef CONFIG_USER_ONLY
a47dddd7
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46 SuperHCPU *cpu = sh_env_get_cpu(env);
47
ea2b542a 48 /* XXXXX */
a47dddd7 49 cpu_abort(CPU(cpu), "Unhandled ldtlb");
ea2b542a
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50#else
51 cpu_load_tlb(env);
52#endif
53}
54
10127400
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55static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
56 uintptr_t retaddr)
e6afc2f4 57{
27103424
AF
58 CPUState *cs = CPU(sh_env_get_cpu(env));
59
60 cs->exception_index = index;
a8a826a3 61 if (retaddr) {
3f38f309 62 cpu_restore_state(cs, retaddr);
a8a826a3 63 }
5638d180 64 cpu_loop_exit(cs);
e6afc2f4
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65}
66
485d0035 67void helper_raise_illegal_instruction(CPUSH4State *env)
fd4bab10 68{
10127400 69 raise_exception(env, 0x180, 0);
fd4bab10
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70}
71
485d0035 72void helper_raise_slot_illegal_instruction(CPUSH4State *env)
e6afc2f4 73{
10127400 74 raise_exception(env, 0x1a0, 0);
e6afc2f4
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75}
76
485d0035 77void helper_raise_fpu_disable(CPUSH4State *env)
d8299bcc 78{
10127400 79 raise_exception(env, 0x800, 0);
d8299bcc
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80}
81
485d0035 82void helper_raise_slot_fpu_disable(CPUSH4State *env)
d8299bcc 83{
10127400 84 raise_exception(env, 0x820, 0);
d8299bcc
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85}
86
485d0035 87void helper_debug(CPUSH4State *env)
e6afc2f4 88{
10127400 89 raise_exception(env, EXCP_DEBUG, 0);
e6afc2f4
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90}
91
10127400 92void helper_sleep(CPUSH4State *env)
e6afc2f4 93{
259186a7
AF
94 CPUState *cs = CPU(sh_env_get_cpu(env));
95
96 cs->halted = 1;
efac4154 97 env->in_sleep = 1;
10127400 98 raise_exception(env, EXCP_HLT, 0);
e6afc2f4
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99}
100
485d0035 101void helper_trapa(CPUSH4State *env, uint32_t tra)
e6afc2f4
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102{
103 env->tra = tra << 2;
10127400 104 raise_exception(env, 0x160, 0);
e6afc2f4
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105}
106
485d0035 107void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value)
852d481f
EI
108{
109 if (cpu_sh4_is_cached (env, address))
110 {
111 memory_content *r = malloc (sizeof(memory_content));
112 r->address = address;
113 r->value = value;
114 r->next = NULL;
115
116 *(env->movcal_backup_tail) = r;
117 env->movcal_backup_tail = &(r->next);
118 }
119}
120
485d0035 121void helper_discard_movcal_backup(CPUSH4State *env)
852d481f
EI
122{
123 memory_content *current = env->movcal_backup;
124
125 while(current)
126 {
127 memory_content *next = current->next;
128 free (current);
129 env->movcal_backup = current = next;
b9d38e95 130 if (current == NULL)
852d481f
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131 env->movcal_backup_tail = &(env->movcal_backup);
132 }
133}
134
485d0035 135void helper_ocbi(CPUSH4State *env, uint32_t address)
852d481f
EI
136{
137 memory_content **current = &(env->movcal_backup);
138 while (*current)
139 {
140 uint32_t a = (*current)->address;
141 if ((a & ~0x1F) == (address & ~0x1F))
142 {
143 memory_content *next = (*current)->next;
485d0035 144 cpu_stl_data(env, a, (*current)->value);
852d481f 145
b9d38e95 146 if (next == NULL)
852d481f
EI
147 {
148 env->movcal_backup_tail = current;
149 }
150
151 free (*current);
152 *current = next;
153 break;
154 }
155 }
156}
157
485d0035 158void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
fdf9b3e8
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159{
160 int64_t res;
161
162 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 163 res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
fdf9b3e8
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164 env->mach = (res >> 32) & 0xffffffff;
165 env->macl = res & 0xffffffff;
5ed9a259 166 if (env->sr & (1u << SR_S)) {
fdf9b3e8
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167 if (res < 0)
168 env->mach |= 0xffff0000;
169 else
170 env->mach &= 0x00007fff;
171 }
172}
173
485d0035 174void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
fdf9b3e8
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175{
176 int64_t res;
177
178 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 179 res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
fdf9b3e8
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180 env->mach = (res >> 32) & 0xffffffff;
181 env->macl = res & 0xffffffff;
5ed9a259 182 if (env->sr & (1u << SR_S)) {
fdf9b3e8
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183 if (res < -0x80000000) {
184 env->mach = 1;
185 env->macl = 0x80000000;
186 } else if (res > 0x000000007fffffff) {
187 env->mach = 1;
188 env->macl = 0x7fffffff;
189 }
190 }
191}
192
485d0035 193void helper_ld_fpscr(CPUSH4State *env, uint32_t val)
390af821 194{
26ac1ea5
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195 env->fpscr = val & FPSCR_MASK;
196 if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
390af821 197 set_float_rounding_mode(float_round_to_zero, &env->fp_status);
26ac1ea5 198 } else {
390af821 199 set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
26ac1ea5 200 }
a0d4ac33 201 set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
390af821 202}
cc4ba6a9 203
485d0035 204static void update_fpscr(CPUSH4State *env, uintptr_t retaddr)
21829e9b
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205{
206 int xcpt, cause, enable;
207
208 xcpt = get_float_exception_flags(&env->fp_status);
209
210 /* Clear the flag entries */
211 env->fpscr &= ~FPSCR_FLAG_MASK;
212
213 if (unlikely(xcpt)) {
214 if (xcpt & float_flag_invalid) {
215 env->fpscr |= FPSCR_FLAG_V;
216 }
217 if (xcpt & float_flag_divbyzero) {
218 env->fpscr |= FPSCR_FLAG_Z;
219 }
220 if (xcpt & float_flag_overflow) {
221 env->fpscr |= FPSCR_FLAG_O;
222 }
223 if (xcpt & float_flag_underflow) {
224 env->fpscr |= FPSCR_FLAG_U;
225 }
226 if (xcpt & float_flag_inexact) {
227 env->fpscr |= FPSCR_FLAG_I;
228 }
229
230 /* Accumulate in cause entries */
231 env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
232 << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
233
234 /* Generate an exception if enabled */
235 cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
236 enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
237 if (cause & enable) {
10127400 238 raise_exception(env, 0x120, retaddr);
21829e9b
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239 }
240 }
241}
242
d6c424c5 243float32 helper_fabs_FT(float32 t0)
cc4ba6a9 244{
d6c424c5 245 return float32_abs(t0);
cc4ba6a9
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246}
247
d6c424c5 248float64 helper_fabs_DT(float64 t0)
cc4ba6a9 249{
d6c424c5 250 return float64_abs(t0);
cc4ba6a9
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251}
252
485d0035 253float32 helper_fadd_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 254{
21829e9b 255 set_float_exception_flags(0, &env->fp_status);
d6c424c5 256 t0 = float32_add(t0, t1, &env->fp_status);
485d0035 257 update_fpscr(env, GETPC());
d6c424c5 258 return t0;
cc4ba6a9
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259}
260
485d0035 261float64 helper_fadd_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 262{
21829e9b 263 set_float_exception_flags(0, &env->fp_status);
d6c424c5 264 t0 = float64_add(t0, t1, &env->fp_status);
485d0035 265 update_fpscr(env, GETPC());
d6c424c5 266 return t0;
cc4ba6a9
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267}
268
485d0035 269void helper_fcmp_eq_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 270{
21829e9b 271 int relation;
9850d1e8 272
21829e9b 273 set_float_exception_flags(0, &env->fp_status);
d6c424c5 274 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b 275 if (unlikely(relation == float_relation_unordered)) {
485d0035 276 update_fpscr(env, GETPC());
21829e9b 277 } else {
34086945 278 env->sr_t = (relation == float_relation_equal);
21829e9b 279 }
cc4ba6a9
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280}
281
485d0035 282void helper_fcmp_eq_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 283{
21829e9b 284 int relation;
9850d1e8 285
21829e9b 286 set_float_exception_flags(0, &env->fp_status);
d6c424c5 287 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b 288 if (unlikely(relation == float_relation_unordered)) {
485d0035 289 update_fpscr(env, GETPC());
21829e9b 290 } else {
34086945 291 env->sr_t = (relation == float_relation_equal);
21829e9b 292 }
cc4ba6a9
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293}
294
485d0035 295void helper_fcmp_gt_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 296{
21829e9b 297 int relation;
9850d1e8 298
21829e9b 299 set_float_exception_flags(0, &env->fp_status);
d6c424c5 300 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b 301 if (unlikely(relation == float_relation_unordered)) {
485d0035 302 update_fpscr(env, GETPC());
21829e9b 303 } else {
34086945 304 env->sr_t = (relation == float_relation_greater);
21829e9b 305 }
cc4ba6a9
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306}
307
485d0035 308void helper_fcmp_gt_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 309{
21829e9b 310 int relation;
9850d1e8 311
21829e9b 312 set_float_exception_flags(0, &env->fp_status);
d6c424c5 313 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b 314 if (unlikely(relation == float_relation_unordered)) {
485d0035 315 update_fpscr(env, GETPC());
21829e9b 316 } else {
34086945 317 env->sr_t = (relation == float_relation_greater);
21829e9b 318 }
cc4ba6a9
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319}
320
485d0035 321float64 helper_fcnvsd_FT_DT(CPUSH4State *env, float32 t0)
cc4ba6a9 322{
d6c424c5 323 float64 ret;
21829e9b 324 set_float_exception_flags(0, &env->fp_status);
d6c424c5 325 ret = float32_to_float64(t0, &env->fp_status);
485d0035 326 update_fpscr(env, GETPC());
d6c424c5 327 return ret;
cc4ba6a9
AJ
328}
329
485d0035 330float32 helper_fcnvds_DT_FT(CPUSH4State *env, float64 t0)
cc4ba6a9 331{
d6c424c5 332 float32 ret;
21829e9b 333 set_float_exception_flags(0, &env->fp_status);
d6c424c5 334 ret = float64_to_float32(t0, &env->fp_status);
485d0035 335 update_fpscr(env, GETPC());
d6c424c5 336 return ret;
cc4ba6a9
AJ
337}
338
485d0035 339float32 helper_fdiv_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 340{
21829e9b 341 set_float_exception_flags(0, &env->fp_status);
d6c424c5 342 t0 = float32_div(t0, t1, &env->fp_status);
485d0035 343 update_fpscr(env, GETPC());
d6c424c5 344 return t0;
cc4ba6a9
AJ
345}
346
485d0035 347float64 helper_fdiv_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 348{
21829e9b 349 set_float_exception_flags(0, &env->fp_status);
d6c424c5 350 t0 = float64_div(t0, t1, &env->fp_status);
485d0035 351 update_fpscr(env, GETPC());
d6c424c5 352 return t0;
cc4ba6a9
AJ
353}
354
485d0035 355float32 helper_float_FT(CPUSH4State *env, uint32_t t0)
cc4ba6a9 356{
d6c424c5 357 float32 ret;
21829e9b 358 set_float_exception_flags(0, &env->fp_status);
d6c424c5 359 ret = int32_to_float32(t0, &env->fp_status);
485d0035 360 update_fpscr(env, GETPC());
d6c424c5 361 return ret;
cc4ba6a9
AJ
362}
363
485d0035 364float64 helper_float_DT(CPUSH4State *env, uint32_t t0)
cc4ba6a9 365{
d6c424c5 366 float64 ret;
21829e9b 367 set_float_exception_flags(0, &env->fp_status);
d6c424c5 368 ret = int32_to_float64(t0, &env->fp_status);
485d0035 369 update_fpscr(env, GETPC());
d6c424c5 370 return ret;
cc4ba6a9
AJ
371}
372
485d0035 373float32 helper_fmac_FT(CPUSH4State *env, float32 t0, float32 t1, float32 t2)
5b7141a1 374{
21829e9b 375 set_float_exception_flags(0, &env->fp_status);
ff2086fe 376 t0 = float32_muladd(t0, t1, t2, 0, &env->fp_status);
485d0035 377 update_fpscr(env, GETPC());
d6c424c5 378 return t0;
5b7141a1
AJ
379}
380
485d0035 381float32 helper_fmul_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 382{
21829e9b 383 set_float_exception_flags(0, &env->fp_status);
d6c424c5 384 t0 = float32_mul(t0, t1, &env->fp_status);
485d0035 385 update_fpscr(env, GETPC());
d6c424c5 386 return t0;
cc4ba6a9
AJ
387}
388
485d0035 389float64 helper_fmul_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 390{
21829e9b 391 set_float_exception_flags(0, &env->fp_status);
d6c424c5 392 t0 = float64_mul(t0, t1, &env->fp_status);
485d0035 393 update_fpscr(env, GETPC());
d6c424c5 394 return t0;
cc4ba6a9
AJ
395}
396
d6c424c5 397float32 helper_fneg_T(float32 t0)
7fdf924f 398{
d6c424c5 399 return float32_chs(t0);
7fdf924f
AJ
400}
401
485d0035 402float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0)
cc4ba6a9 403{
21829e9b 404 set_float_exception_flags(0, &env->fp_status);
d6c424c5 405 t0 = float32_sqrt(t0, &env->fp_status);
485d0035 406 update_fpscr(env, GETPC());
d6c424c5 407 return t0;
cc4ba6a9
AJ
408}
409
485d0035 410float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0)
cc4ba6a9 411{
21829e9b 412 set_float_exception_flags(0, &env->fp_status);
d6c424c5 413 t0 = float64_sqrt(t0, &env->fp_status);
485d0035 414 update_fpscr(env, GETPC());
d6c424c5 415 return t0;
cc4ba6a9
AJ
416}
417
485d0035 418float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1)
cc4ba6a9 419{
21829e9b 420 set_float_exception_flags(0, &env->fp_status);
d6c424c5 421 t0 = float32_sub(t0, t1, &env->fp_status);
485d0035 422 update_fpscr(env, GETPC());
d6c424c5 423 return t0;
cc4ba6a9
AJ
424}
425
485d0035 426float64 helper_fsub_DT(CPUSH4State *env, float64 t0, float64 t1)
cc4ba6a9 427{
21829e9b 428 set_float_exception_flags(0, &env->fp_status);
d6c424c5 429 t0 = float64_sub(t0, t1, &env->fp_status);
485d0035 430 update_fpscr(env, GETPC());
d6c424c5 431 return t0;
cc4ba6a9
AJ
432}
433
485d0035 434uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0)
cc4ba6a9 435{
21829e9b 436 uint32_t ret;
21829e9b 437 set_float_exception_flags(0, &env->fp_status);
d6c424c5 438 ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
485d0035 439 update_fpscr(env, GETPC());
21829e9b 440 return ret;
cc4ba6a9
AJ
441}
442
485d0035 443uint32_t helper_ftrc_DT(CPUSH4State *env, float64 t0)
cc4ba6a9 444{
21829e9b 445 uint32_t ret;
21829e9b 446 set_float_exception_flags(0, &env->fp_status);
d6c424c5 447 ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
485d0035 448 update_fpscr(env, GETPC());
21829e9b 449 return ret;
cc4ba6a9 450}
af8c2bde 451
485d0035 452void helper_fipr(CPUSH4State *env, uint32_t m, uint32_t n)
af8c2bde
AJ
453{
454 int bank, i;
455 float32 r, p;
456
457 bank = (env->sr & FPSCR_FR) ? 16 : 0;
458 r = float32_zero;
459 set_float_exception_flags(0, &env->fp_status);
460
461 for (i = 0 ; i < 4 ; i++) {
462 p = float32_mul(env->fregs[bank + m + i],
463 env->fregs[bank + n + i],
464 &env->fp_status);
465 r = float32_add(r, p, &env->fp_status);
466 }
485d0035 467 update_fpscr(env, GETPC());
af8c2bde
AJ
468
469 env->fregs[bank + n + 3] = r;
470}
17075f10 471
485d0035 472void helper_ftrv(CPUSH4State *env, uint32_t n)
17075f10
AJ
473{
474 int bank_matrix, bank_vector;
475 int i, j;
476 float32 r[4];
477 float32 p;
478
479 bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
480 bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
481 set_float_exception_flags(0, &env->fp_status);
482 for (i = 0 ; i < 4 ; i++) {
483 r[i] = float32_zero;
484 for (j = 0 ; j < 4 ; j++) {
485 p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
486 env->fregs[bank_vector + j],
487 &env->fp_status);
488 r[i] = float32_add(r[i], p, &env->fp_status);
489 }
490 }
485d0035 491 update_fpscr(env, GETPC());
17075f10
AJ
492
493 for (i = 0 ; i < 4 ; i++) {
494 env->fregs[bank_vector + i] = r[i];
495 }
496}
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