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fixed ldq() macros
[qemu.git] / target-i386 / exec.h
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2c0262af
FB		 1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include "dyngen-exec.h"
21
22/* at least 4 register variables are defines */
23register struct CPUX86State *env asm(AREG0);
24register uint32_t T0 asm(AREG1);
25register uint32_t T1 asm(AREG2);
26register uint32_t T2 asm(AREG3);
27
28#define A0 T2
29
30/* if more registers are available, we define some registers too */
31#ifdef AREG4
32register uint32_t EAX asm(AREG4);
33#define reg_EAX
34#endif
35
36#ifdef AREG5
37register uint32_t ESP asm(AREG5);
38#define reg_ESP
39#endif
40
41#ifdef AREG6
42register uint32_t EBP asm(AREG6);
43#define reg_EBP
44#endif
45
46#ifdef AREG7
47register uint32_t ECX asm(AREG7);
48#define reg_ECX
49#endif
50
51#ifdef AREG8
52register uint32_t EDX asm(AREG8);
53#define reg_EDX
54#endif
55
56#ifdef AREG9
57register uint32_t EBX asm(AREG9);
58#define reg_EBX
59#endif
60
61#ifdef AREG10
62register uint32_t ESI asm(AREG10);
63#define reg_ESI
64#endif
65
66#ifdef AREG11
67register uint32_t EDI asm(AREG11);
68#define reg_EDI
69#endif
70
71extern FILE *logfile;
72extern int loglevel;
73
74#ifndef reg_EAX
75#define EAX (env->regs[R_EAX])
76#endif
77#ifndef reg_ECX
78#define ECX (env->regs[R_ECX])
79#endif
80#ifndef reg_EDX
81#define EDX (env->regs[R_EDX])
82#endif
83#ifndef reg_EBX
84#define EBX (env->regs[R_EBX])
85#endif
86#ifndef reg_ESP
87#define ESP (env->regs[R_ESP])
88#endif
89#ifndef reg_EBP
90#define EBP (env->regs[R_EBP])
91#endif
92#ifndef reg_ESI
93#define ESI (env->regs[R_ESI])
94#endif
95#ifndef reg_EDI
96#define EDI (env->regs[R_EDI])
97#endif
98#define EIP (env->eip)
99#define DF (env->df)
100
101#define CC_SRC (env->cc_src)
102#define CC_DST (env->cc_dst)
103#define CC_OP (env->cc_op)
104
105/* float macros */
106#define FT0 (env->ft0)
107#define ST0 (env->fpregs[env->fpstt])
108#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7])
109#define ST1 ST(1)
110
111#ifdef USE_FP_CONVERT
112#define FP_CONVERT (env->fp_convert)
113#endif
114
115#include "cpu.h"
116#include "exec-all.h"
117
118typedef struct CCTable {
119 int (*compute_all)(void); /* return all the flags */
120 int (*compute_c)(void); /* return the C flag */
121} CCTable;
122
123extern CCTable cc_table[];
124
125void load_seg(int seg_reg, int selector, unsigned cur_eip);
126void helper_ljmp_protected_T0_T1(void);
127void helper_lcall_real_T0_T1(int shift, int next_eip);
128void helper_lcall_protected_T0_T1(int shift, int next_eip);
129void helper_iret_real(int shift);
130void helper_iret_protected(int shift);
131void helper_lret_protected(int shift, int addend);
132void helper_lldt_T0(void);
133void helper_ltr_T0(void);
134void helper_movl_crN_T0(int reg);
135void helper_movl_drN_T0(int reg);
136void helper_invlpg(unsigned int addr);
137void cpu_x86_update_cr0(CPUX86State *env);
138void cpu_x86_update_cr3(CPUX86State *env);
139void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
61382a50
FB		 140int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr,
141 int is_write, int is_user, int is_softmmu);
142void tlb_fill(unsigned long addr, int is_write, int is_user,
143 void *retaddr);
2c0262af
FB		 144void __hidden cpu_lock(void);
145void __hidden cpu_unlock(void);
146void do_interrupt(int intno, int is_int, int error_code,
147 unsigned int next_eip, int is_hw);
148void do_interrupt_user(int intno, int is_int, int error_code,
149 unsigned int next_eip);
150void raise_interrupt(int intno, int is_int, int error_code,
151 unsigned int next_eip);
152void raise_exception_err(int exception_index, int error_code);
153void raise_exception(int exception_index);
154void __hidden cpu_loop_exit(void);
155void helper_fsave(uint8_t *ptr, int data32);
156void helper_frstor(uint8_t *ptr, int data32);
157
158void OPPROTO op_movl_eflags_T0(void);
159void OPPROTO op_movl_T0_eflags(void);
160void raise_interrupt(int intno, int is_int, int error_code,
161 unsigned int next_eip);
162void raise_exception_err(int exception_index, int error_code);
163void raise_exception(int exception_index);
164void helper_divl_EAX_T0(uint32_t eip);
165void helper_idivl_EAX_T0(uint32_t eip);
166void helper_cmpxchg8b(void);
167void helper_cpuid(void);
168void helper_rdtsc(void);
169void helper_rdmsr(void);
170void helper_wrmsr(void);
171void helper_lsl(void);
172void helper_lar(void);
173
174#ifdef USE_X86LDOUBLE
175/* use long double functions */
176#define lrint lrintl
177#define llrint llrintl
178#define fabs fabsl
179#define sin sinl
180#define cos cosl
181#define sqrt sqrtl
182#define pow powl
183#define log logl
184#define tan tanl
185#define atan2 atan2l
186#define floor floorl
187#define ceil ceill
188#define rint rintl
189#endif
190
191extern int lrint(CPU86_LDouble x);
192extern int64_t llrint(CPU86_LDouble x);
193extern CPU86_LDouble fabs(CPU86_LDouble x);
194extern CPU86_LDouble sin(CPU86_LDouble x);
195extern CPU86_LDouble cos(CPU86_LDouble x);
196extern CPU86_LDouble sqrt(CPU86_LDouble x);
197extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
198extern CPU86_LDouble log(CPU86_LDouble x);
199extern CPU86_LDouble tan(CPU86_LDouble x);
200extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
201extern CPU86_LDouble floor(CPU86_LDouble x);
202extern CPU86_LDouble ceil(CPU86_LDouble x);
203extern CPU86_LDouble rint(CPU86_LDouble x);
204
205#define RC_MASK 0xc00
206#define RC_NEAR 0x000
207#define RC_DOWN 0x400
208#define RC_UP 0x800
209#define RC_CHOP 0xc00
210
211#define MAXTAN 9223372036854775808.0
212
213#ifdef __arm__
214/* we have no way to do correct rounding - a FPU emulator is needed */
215#define FE_DOWNWARD FE_TONEAREST
216#define FE_UPWARD FE_TONEAREST
217#define FE_TOWARDZERO FE_TONEAREST
218#endif
219
220#ifdef USE_X86LDOUBLE
221
222/* only for x86 */
223typedef union {
224 long double d;
225 struct {
226 unsigned long long lower;
227 unsigned short upper;
228 } l;
229} CPU86_LDoubleU;
230
231/* the following deal with x86 long double-precision numbers */
232#define MAXEXPD 0x7fff
233#define EXPBIAS 16383
234#define EXPD(fp) (fp.l.upper & 0x7fff)
235#define SIGND(fp) ((fp.l.upper) & 0x8000)
236#define MANTD(fp) (fp.l.lower)
237#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
238
239#else
240
241/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
242typedef union {
243 double d;
244#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
245 struct {
246 uint32_t lower;
247 int32_t upper;
248 } l;
249#else
250 struct {
251 int32_t upper;
252 uint32_t lower;
253 } l;
254#endif
255#ifndef __arm__
256 int64_t ll;
257#endif
258} CPU86_LDoubleU;
259
260/* the following deal with IEEE double-precision numbers */
261#define MAXEXPD 0x7ff
262#define EXPBIAS 1023
263#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
264#define SIGND(fp) ((fp.l.upper) & 0x80000000)
265#ifdef __arm__
266#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
267#else
268#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
269#endif
270#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
271#endif
272
273static inline void fpush(void)
274{
275 env->fpstt = (env->fpstt - 1) & 7;
276 env->fptags[env->fpstt] = 0; /* validate stack entry */
277}
278
279static inline void fpop(void)
280{
281 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
282 env->fpstt = (env->fpstt + 1) & 7;
283}
284
285#ifndef USE_X86LDOUBLE
286static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
287{
288 CPU86_LDoubleU temp;
289 int upper, e;
290 uint64_t ll;
291
292 /* mantissa */
293 upper = lduw(ptr + 8);
294 /* XXX: handle overflow ? */
295 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
296 e |= (upper >> 4) & 0x800; /* sign */
297 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
298#ifdef __arm__
299 temp.l.upper = (e << 20) | (ll >> 32);
300 temp.l.lower = ll;
301#else
302 temp.ll = ll | ((uint64_t)e << 52);
303#endif
304 return temp.d;
305}
306
307static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
308{
309 CPU86_LDoubleU temp;
310 int e;
311
312 temp.d = f;
313 /* mantissa */
314 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
315 /* exponent + sign */
316 e = EXPD(temp) - EXPBIAS + 16383;
317 e |= SIGND(temp) >> 16;
318 stw(ptr + 8, e);
319}
320#endif
321
322const CPU86_LDouble f15rk[7];
323
324void helper_fldt_ST0_A0(void);
325void helper_fstt_ST0_A0(void);
326void helper_fbld_ST0_A0(void);
327void helper_fbst_ST0_A0(void);
328void helper_f2xm1(void);
329void helper_fyl2x(void);
330void helper_fptan(void);
331void helper_fpatan(void);
332void helper_fxtract(void);
333void helper_fprem1(void);
334void helper_fprem(void);
335void helper_fyl2xp1(void);
336void helper_fsqrt(void);
337void helper_fsincos(void);
338void helper_frndint(void);
339void helper_fscale(void);
340void helper_fsin(void);
341void helper_fcos(void);
342void helper_fxam_ST0(void);
343void helper_fstenv(uint8_t *ptr, int data32);
344void helper_fldenv(uint8_t *ptr, int data32);
345void helper_fsave(uint8_t *ptr, int data32);
346void helper_frstor(uint8_t *ptr, int data32);
347
348const uint8_t parity_table[256];
349const uint8_t rclw_table[32];
350const uint8_t rclb_table[32];
351
352static inline uint32_t compute_eflags(void)
353{
354 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
355}
356
357#define FL_UPDATE_MASK32 (TF_MASK | AC_MASK | ID_MASK)
358
359#define FL_UPDATE_CPL0_MASK (TF_MASK | IF_MASK | IOPL_MASK | NT_MASK | \
360 RF_MASK | AC_MASK | ID_MASK)
361
362/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
363static inline void load_eflags(int eflags, int update_mask)
364{
365 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
366 DF = 1 - (2 * ((eflags >> 10) & 1));
367 env->eflags = (env->eflags & ~update_mask) |
368 (eflags & update_mask);
369}
370
61382a50
FB		 371/* XXX: move that to a generic header */
372#if !defined(CONFIG_USER_ONLY)
2c0262af 373
2c0262af
FB		 374#define ldul_user ldl_user
375#define ldul_kernel ldl_kernel
376
61382a50
FB		 377#define ACCESS_TYPE 0
378#define MEMSUFFIX _kernel
379#define DATA_SIZE 1
380#include "softmmu_header.h"
381
382#define DATA_SIZE 2
383#include "softmmu_header.h"
2c0262af 384
61382a50
FB		 385#define DATA_SIZE 4
386#include "softmmu_header.h"
387
388#define DATA_SIZE 8
389#include "softmmu_header.h"
390#undef ACCESS_TYPE
391#undef MEMSUFFIX
2c0262af 392
61382a50
FB		 393#define ACCESS_TYPE 1
394#define MEMSUFFIX _user
2c0262af
FB		 395#define DATA_SIZE 1
396#include "softmmu_header.h"
397
398#define DATA_SIZE 2
399#include "softmmu_header.h"
400
401#define DATA_SIZE 4
402#include "softmmu_header.h"
403
404#define DATA_SIZE 8
405#include "softmmu_header.h"
61382a50
FB		 406#undef ACCESS_TYPE
407#undef MEMSUFFIX
2c0262af 408
61382a50
FB		 409/* these access are slower, they must be as rare as possible */
410#define ACCESS_TYPE 2
411#define MEMSUFFIX _data
2c0262af
FB		 412#define DATA_SIZE 1
413#include "softmmu_header.h"
414
415#define DATA_SIZE 2
416#include "softmmu_header.h"
417
418#define DATA_SIZE 4
419#include "softmmu_header.h"
420
421#define DATA_SIZE 8
422#include "softmmu_header.h"
61382a50
FB		 423#undef ACCESS_TYPE
424#undef MEMSUFFIX
425
426#define ldub(p) ldub_data(p)
427#define ldsb(p) ldsb_data(p)
428#define lduw(p) lduw_data(p)
429#define ldsw(p) ldsw_data(p)
430#define ldl(p) ldl_data(p)
431#define ldq(p) ldq_data(p)
432
433#define stb(p, v) stb_data(p, v)
434#define stw(p, v) stw_data(p, v)
435#define stl(p, v) stl_data(p, v)
436#define stq(p, v) stq_data(p, v)
437
438static inline double ldfq(void *ptr)
439{
440 union {
441 double d;
442 uint64_t i;
443 } u;
444 u.i = ldq(ptr);
445 return u.d;
446}
447
448static inline void stfq(void *ptr, double v)
449{
450 union {
451 double d;
452 uint64_t i;
453 } u;
454 u.d = v;
455 stq(ptr, u.i);
456}
2c0262af 457
61382a50
FB		 458static inline float ldfl(void *ptr)
459{
460 union {
461 float f;
462 uint32_t i;
463 } u;
464 u.i = ldl(ptr);
465 return u.f;
466}
467
468static inline void stfl(void *ptr, float v)
469{
470 union {
471 float f;
472 uint32_t i;
473 } u;
474 u.f = v;
475 stl(ptr, u.i);
476}
2c0262af 477
61382a50 478#endif /* !defined(CONFIG_USER_ONLY) */
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