]>
Commit | Line | Data |
---|---|---|
66e2ec24 GH |
1 | /* |
2 | * QTest testcase for Q35 northbridge | |
3 | * | |
4 | * Copyright (c) 2015 Red Hat, Inc. | |
5 | * | |
6 | * Author: Gerd Hoffmann <[email protected]> | |
7 | * | |
8 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
9 | * See the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
681c28a3 | 12 | #include "qemu/osdep.h" |
66e2ec24 | 13 | #include <glib.h> |
66e2ec24 GH |
14 | #include "libqtest.h" |
15 | #include "libqos/pci.h" | |
16 | #include "libqos/pci-pc.h" | |
66e2ec24 GH |
17 | #include "hw/pci-host/q35.h" |
18 | ||
19 | static void smram_set_bit(QPCIDevice *pcidev, uint8_t mask, bool enabled) | |
20 | { | |
21 | uint8_t smram; | |
22 | ||
23 | smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM); | |
24 | if (enabled) { | |
25 | smram |= mask; | |
26 | } else { | |
27 | smram &= ~mask; | |
28 | } | |
29 | qpci_config_writeb(pcidev, MCH_HOST_BRIDGE_SMRAM, smram); | |
30 | } | |
31 | ||
32 | static bool smram_test_bit(QPCIDevice *pcidev, uint8_t mask) | |
33 | { | |
34 | uint8_t smram; | |
35 | ||
36 | smram = qpci_config_readb(pcidev, MCH_HOST_BRIDGE_SMRAM); | |
37 | return smram & mask; | |
38 | } | |
39 | ||
40 | static void test_smram_lock(void) | |
41 | { | |
42 | QPCIBus *pcibus; | |
43 | QPCIDevice *pcidev; | |
44 | QDict *response; | |
45 | ||
46 | pcibus = qpci_init_pc(); | |
47 | g_assert(pcibus != NULL); | |
48 | ||
49 | pcidev = qpci_device_find(pcibus, 0); | |
50 | g_assert(pcidev != NULL); | |
51 | ||
52 | /* check open is settable */ | |
53 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false); | |
54 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false); | |
55 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true); | |
56 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true); | |
57 | ||
58 | /* lock, check open is cleared & not settable */ | |
59 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_LCK, true); | |
60 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false); | |
61 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true); | |
62 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false); | |
63 | ||
64 | /* reset */ | |
65 | response = qmp("{'execute': 'system_reset', 'arguments': {} }"); | |
66 | g_assert(response); | |
67 | g_assert(!qdict_haskey(response, "error")); | |
68 | QDECREF(response); | |
69 | ||
70 | /* check open is settable again */ | |
71 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, false); | |
72 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == false); | |
73 | smram_set_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN, true); | |
74 | g_assert(smram_test_bit(pcidev, MCH_HOST_BRIDGE_SMRAM_D_OPEN) == true); | |
75 | } | |
76 | ||
77 | int main(int argc, char **argv) | |
78 | { | |
79 | int ret; | |
80 | ||
81 | g_test_init(&argc, &argv, NULL); | |
82 | ||
83 | qtest_add_func("/q35/smram/lock", test_smram_lock); | |
84 | ||
85 | qtest_start("-M q35"); | |
86 | ret = g_test_run(); | |
87 | qtest_end(); | |
88 | ||
89 | return ret; | |
90 | } |