]> Git Repo - qemu.git/blame - target/loongarch/op_helper.c
target/loongarch: Add fixed point extra instruction translation
[qemu.git] / target / loongarch / op_helper.c
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1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * LoongArch emulation helpers for QEMU.
4 *
5 * Copyright (c) 2021 Loongson Technology Corporation Limited
6 */
7
8#include "qemu/osdep.h"
9#include "qemu/main-loop.h"
10#include "cpu.h"
11#include "qemu/host-utils.h"
12#include "exec/helper-proto.h"
13#include "exec/exec-all.h"
14#include "exec/cpu_ldst.h"
15#include "internals.h"
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16#include "qemu/crc32c.h"
17#include <zlib.h>
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18
19/* Exceptions helpers */
20void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
21{
22 do_raise_exception(env, exception, GETPC());
23}
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24
25target_ulong helper_bitrev_w(target_ulong rj)
26{
27 return (int32_t)revbit32(rj);
28}
29
30target_ulong helper_bitrev_d(target_ulong rj)
31{
32 return revbit64(rj);
33}
34
35target_ulong helper_bitswap(target_ulong v)
36{
37 v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
38 ((v & (target_ulong)0x5555555555555555ULL) << 1);
39 v = ((v >> 2) & (target_ulong)0x3333333333333333ULL) |
40 ((v & (target_ulong)0x3333333333333333ULL) << 2);
41 v = ((v >> 4) & (target_ulong)0x0F0F0F0F0F0F0F0FULL) |
42 ((v & (target_ulong)0x0F0F0F0F0F0F0F0FULL) << 4);
43 return v;
44}
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45
46/* loongarch assert op */
47void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
48{
49 if (rj > rk) {
50 do_raise_exception(env, EXCCODE_ADEM, GETPC());
51 }
52}
53
54void helper_asrtgt_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
55{
56 if (rj <= rk) {
57 do_raise_exception(env, EXCCODE_ADEM, GETPC());
58 }
59}
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60
61target_ulong helper_crc32(target_ulong val, target_ulong m, uint64_t sz)
62{
63 uint8_t buf[8];
64 target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1);
65
66 m &= mask;
67 stq_le_p(buf, m);
68 return (int32_t) (crc32(val ^ 0xffffffff, buf, sz) ^ 0xffffffff);
69}
70
71target_ulong helper_crc32c(target_ulong val, target_ulong m, uint64_t sz)
72{
73 uint8_t buf[8];
74 target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1);
75 m &= mask;
76 stq_le_p(buf, m);
77 return (int32_t) (crc32c(val, buf, sz) ^ 0xffffffff);
78}
79
80target_ulong helper_cpucfg(CPULoongArchState *env, target_ulong rj)
81{
82 return rj > 21 ? 0 : env->cpucfg[rj];
83}
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