projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 4d5c29ca SW |
1 | /* |
| 2 | * Generic device-tree-driven paravirt PPC e500 platform | |
| 3 | * | |
| 4 | * Copyright 2012 Freescale Semiconductor, Inc. | |
| 5 | * | |
| 6 | * This is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License as published by | |
| 8 | * the Free Software Foundation; either version 2 of the License, or | |
| 9 | * (at your option) any later version. | |
| 10 | */ | |
| 11 | ||
| 12 | #include "config.h" | |
| 13 | #include "qemu-common.h" | |
| 14 | #include "e500.h" | |
| 7948b4b0 | 15 | #include "hw/boards.h" |
| 9c17d615 PB |
16 | #include "sysemu/device_tree.h" |
| 17 | #include "hw/pci/pci.h" | |
| 0d09e41a | 18 | #include "hw/ppc/openpic.h" |
| 3b961124 | 19 | #include "kvm_ppc.h" |
| 4d5c29ca SW |
20 | |
| 21 | static void e500plat_fixup_devtree(PPCE500Params *params, void *fdt) | |
| 22 | { | |
| 23 | const char model[] = "QEMU ppce500"; | |
| 24 | const char compatible[] = "fsl,qemu-e500"; | |
| 25 | ||
| 5a4348d1 PC |
26 | qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model)); |
| 27 | qemu_fdt_setprop(fdt, "/", "compatible", compatible, | |
| 28 | sizeof(compatible)); | |
| 4d5c29ca SW |
29 | } |
| 30 | ||
| 3ef96221 | 31 | static void e500plat_init(MachineState *machine) |
| 4d5c29ca SW |
32 | { |
| 33 | PPCE500Params params = { | |
| 3bb7e02a AG |
34 | .pci_first_slot = 0x1, |
| 35 | .pci_nr_slots = PCI_SLOT_MAX - 1, | |
| 4d5c29ca | 36 | .fixup_devtree = e500plat_fixup_devtree, |
| f5fba9d2 | 37 | .mpic_version = OPENPIC_MODEL_FSL_MPIC_42, |
| b88e77f4 | 38 | .has_mpc8xxx_gpio = true, |
| f7087343 AG |
39 | .has_platform_bus = true, |
| 40 | .platform_bus_base = 0xf00000000ULL, | |
| 41 | .platform_bus_size = (128ULL * 1024 * 1024), | |
| 42 | .platform_bus_first_irq = 5, | |
| 43 | .platform_bus_num_irqs = 10, | |
| e6b4e5f4 AG |
44 | .ccsrbar_base = 0xFE0000000ULL, |
| 45 | .pci_pio_base = 0xFE1000000ULL, | |
| cb3778a0 AG |
46 | .pci_mmio_base = 0xC00000000ULL, |
| 47 | .pci_mmio_bus_base = 0xE0000000ULL, | |
| e6b4e5f4 | 48 | .spin_base = 0xFEF000000ULL, |
| 4d5c29ca SW |
49 | }; |
| 50 | ||
| 3b961124 SY |
51 | /* Older KVM versions don't support EPR which breaks guests when we announce |
| 52 | MPIC variants that support EPR. Revert to an older one for those */ | |
| 53 | if (kvm_enabled() && !kvmppc_has_cap_epr()) { | |
| 54 | params.mpic_version = OPENPIC_MODEL_FSL_MPIC_20; | |
| 55 | } | |
| 56 | ||
| 3ef96221 | 57 | ppce500_init(machine, ¶ms); |
| 4d5c29ca SW |
58 | } |
| 59 | ||
| e264d29d | 60 | static void e500plat_machine_init(MachineClass *mc) |
| 4d5c29ca | 61 | { |
| e264d29d EH |
62 | mc->desc = "generic paravirt e500 platform"; |
| 63 | mc->init = e500plat_init; | |
| 64 | mc->max_cpus = 32; | |
| 65 | mc->has_dynamic_sysbus = true; | |
| 4d5c29ca SW |
66 | } |
| 67 | ||
| e264d29d | 68 | DEFINE_MACHINE("ppce500", e500plat_machine_init) |