[qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "qemu-common.h"
#include "disas/bfd.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "disas/disas.h"

typedef struct CPUDebug {
    struct disassemble_info info;
    CPUState *cpu;
} CPUDebug;

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save minuscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Print address in hex, truncated to the width of a target virtual address. */
static void
generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
    generic_print_address(addr & mask, info);
}

/* Print address in hex, truncated to the width of a host virtual address. */
static void
generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
    generic_print_address(addr & mask, info);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
                              const char *prefix)
{
    int i, n = info->buffer_length;
    uint8_t *buf = g_malloc(n);

    info->read_memory_func(pc, buf, n, info);

    for (i = 0; i < n; ++i) {
        if (i % 32 == 0) {
            info->fprintf_func(info->stream, "\n%s: ", prefix);
        }
        info->fprintf_func(info->stream, "%02x", buf[i]);
    }

    g_free(buf);
    return n;
}

static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-H");
}

static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-T");
}

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - 1 means 16 bit code, 2 means 64 bit code
    ppc  - bits 0:15 specify (optionally) the machine instruction set;
           bit 16 indicates little endian.
    other targets - unused
 */
void target_disas(FILE *out, CPUState *cpu, target_ulong code,
                  target_ulong size, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    target_ulong pc;
    int count;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

    s.cpu = cpu;
    s.info.read_memory_func = target_read_memory;
    s.info.buffer_vma = code;
    s.info.buffer_length = size;
    s.info.print_address_func = generic_print_target_address;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_SPARC)
    s.info.print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    s.info.disassembler_options = (char *)"any";
    s.info.print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    s.info.print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    s.info.print_insn = print_insn_big_mips;
#else
    s.info.print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    s.info.print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    s.info.mach = bfd_mach_alpha_ev6;
    s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    s.info.print_insn = print_insn_s390;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    s.info.print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    s.info.print_insn = print_insn_lm32;
#endif
    if (s.info.print_insn == NULL) {
        s.info.print_insn = print_insn_od_target;
    }

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = s.info.print_insn(pc, &s.info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &s.info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to [email protected]\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    uintptr_t pc;
    int count;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
    s.info.print_address_func = generic_print_host_address;

    s.info.buffer = code;
    s.info.buffer_vma = (uintptr_t)code;
    s.info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(CONFIG_TCG_INTERPRETER)
    print_insn = print_insn_tci;
#elif defined(__i386__)
    s.info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    s.info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    s.info.disassembler_options = (char *)"any";
    print_insn = print_insn_ppc;
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
    print_insn = print_insn_arm_a64;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
    s.info.mach = bfd_mach_sparc_v9b;
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#endif
    if (print_insn == NULL) {
        print_insn = print_insn_od_host;
    }
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
        count = print_insn(pc, &s.info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor/monitor.h"

static int monitor_disas_is_physical;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    if (monitor_disas_is_physical) {
        cpu_physical_memory_read(memaddr, myaddr, length);
    } else {
        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    }
    return 0;
}

static int GCC_FMT_ATTR(2, 3)
monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    monitor_vprintf((Monitor *)stream, fmt, ap);
    va_end(ap);
    return 0;
}

/* Disassembler for the monitor.
   See target_disas for a description of flags. */
void monitor_disas(Monitor *mon, CPUState *cpu,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    int count, i;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);

    s.cpu = cpu;
    monitor_disas_is_physical = is_physical;
    s.info.read_memory_func = monitor_read_memory;
    s.info.print_address_func = generic_print_target_address;

    s.info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_ALPHA)
    s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    s.info.print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    s.info.print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    s.info.print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    s.info.print_insn = print_insn_big_mips;
#else
    s.info.print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    s.info.print_insn = print_insn_sh;
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    s.info.print_insn = print_insn_s390;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    s.info.print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    s.info.print_insn = print_insn_lm32;
#endif
    if (!s.info.print_insn) {
        monitor_printf(mon, "0x" TARGET_FMT_lx
                       ": Asm output not supported on this arch\n", pc);
        return;
    }

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
        count = s.info.print_insn(pc, &s.info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
37b9de46	3	#include "qemu-common.h"
76cad711	4	#include "disas/bfd.h"
b9adb4a6	5	#include "elf.h"
aa0aa4fa	6	#include <errno.h>
b9adb4a6	7
c6105c0a	8	#include "cpu.h"
76cad711	9	#include "disas/disas.h"
c6105c0a	10
f4359b9f BS	11	typedef struct CPUDebug {
f4359b9f BS	12	struct disassemble_info info;
d49190c4	13	CPUState *cpu;
f4359b9f BS	14	} CPUDebug;
f4359b9f BS	15
b9adb4a6	16	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	17	struct syminfo *syminfos = NULL;
b9adb4a6	18
aa0aa4fa FB	19	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	20	Transfer them to myaddr. */
	21	int
3a742b76 PB	22	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	23	struct disassemble_info *info)
aa0aa4fa	24	{
c6105c0a FB	25	if (memaddr < info->buffer_vma
	26	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	27	/* Out of bounds. Use EIO because GDB uses it. */
	28	return EIO;
	29	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	30	return 0;
aa0aa4fa FB	31	}
aa0aa4fa FB	32
c6105c0a FB	33	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	34	Transfer them to myaddr. */
	35	static int
c27004ec FB	36	target_read_memory (bfd_vma memaddr,
	37	bfd_byte *myaddr,
	38	int length,
	39	struct disassemble_info *info)
c6105c0a	40	{
f4359b9f BS	41	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	42
d49190c4	43	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
c6105c0a FB	44	return 0;
c6105c0a FB	45	}
c6105c0a	46
aa0aa4fa FB	47	/* Print an error message. We can assume that this is in response to
	48	an error return from buffer_read_memory. */
	49	void
3a742b76	50	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	51	{
	52	if (status != EIO)
	53	/* Can't happen. */
	54	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	55	else
	56	/* Actually, address between memaddr and memaddr + len was
	57	out of bounds. */
	58	(*info->fprintf_func) (info->stream,
26a76461	59	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	60	}
aa0aa4fa FB	61
a31f0531	62	/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa FB	63	in statically linked executables. */
	64
	65	/* Just print the address is hex. This is included for completeness even
	66	though both GDB and objdump provide their own (to print symbolic
	67	addresses). */
	68
	69	void
3a742b76	70	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	71	{
26a76461	72	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	73	}
aa0aa4fa FB	74
636bd289 PM	75	/* Print address in hex, truncated to the width of a target virtual address. */
	76	static void
	77	generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
	78	{
	79	uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
	80	generic_print_address(addr & mask, info);
	81	}
	82
	83	/* Print address in hex, truncated to the width of a host virtual address. */
	84	static void
	85	generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
	86	{
	87	uint64_t mask = ~0ULL >> (64 - (sizeof(void ) 8));
	88	generic_print_address(addr & mask, info);
	89	}
	90
aa0aa4fa FB	91	/* Just return the given address. */
	92
	93	int
3a742b76	94	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	95	{
	96	return 1;
	97	}
	98
903ec55c AJ	99	bfd_vma bfd_getl64 (const bfd_byte *addr)
	100	{
	101	unsigned long long v;
	102
	103	v = (unsigned long long) addr[0];
	104	v \|= (unsigned long long) addr[1] << 8;
	105	v \|= (unsigned long long) addr[2] << 16;
	106	v \|= (unsigned long long) addr[3] << 24;
	107	v \|= (unsigned long long) addr[4] << 32;
	108	v \|= (unsigned long long) addr[5] << 40;
	109	v \|= (unsigned long long) addr[6] << 48;
	110	v \|= (unsigned long long) addr[7] << 56;
	111	return (bfd_vma) v;
	112	}
	113
aa0aa4fa FB	114	bfd_vma bfd_getl32 (const bfd_byte *addr)
	115	{
	116	unsigned long v;
	117
	118	v = (unsigned long) addr[0];
	119	v \|= (unsigned long) addr[1] << 8;
	120	v \|= (unsigned long) addr[2] << 16;
	121	v \|= (unsigned long) addr[3] << 24;
	122	return (bfd_vma) v;
	123	}
	124
	125	bfd_vma bfd_getb32 (const bfd_byte *addr)
	126	{
	127	unsigned long v;
	128
	129	v = (unsigned long) addr[0] << 24;
	130	v \|= (unsigned long) addr[1] << 16;
	131	v \|= (unsigned long) addr[2] << 8;
	132	v \|= (unsigned long) addr[3];
	133	return (bfd_vma) v;
	134	}
	135
6af0bf9c FB	136	bfd_vma bfd_getl16 (const bfd_byte *addr)
	137	{
	138	unsigned long v;
	139
	140	v = (unsigned long) addr[0];
	141	v \|= (unsigned long) addr[1] << 8;
	142	return (bfd_vma) v;
	143	}
	144
	145	bfd_vma bfd_getb16 (const bfd_byte *addr)
	146	{
	147	unsigned long v;
	148
	149	v = (unsigned long) addr[0] << 24;
	150	v \|= (unsigned long) addr[1] << 16;
	151	return (bfd_vma) v;
	152	}
	153
c46ffd57 RH	154	static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
	155	const char *prefix)
	156	{
	157	int i, n = info->buffer_length;
	158	uint8_t *buf = g_malloc(n);
	159
	160	info->read_memory_func(pc, buf, n, info);
	161
	162	for (i = 0; i < n; ++i) {
	163	if (i % 32 == 0) {
	164	info->fprintf_func(info->stream, "\n%s: ", prefix);
	165	}
	166	info->fprintf_func(info->stream, "%02x", buf[i]);
	167	}
	168
	169	g_free(buf);
	170	return n;
	171	}
	172
	173	static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
	174	{
	175	return print_insn_objdump(pc, info, "OBJD-H");
	176	}
	177
	178	static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
	179	{
	180	return print_insn_objdump(pc, info, "OBJD-T");
	181	}
	182
e91c8a77	183	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff	184	values:
e99722f6	185	i386 - 1 means 16 bit code, 2 means 64 bit code
e13951f8 TM	186	ppc - bits 0:15 specify (optionally) the machine instruction set;
e13951f8 TM	187	bit 16 indicates little endian.
c2d551ff FB	188	other targets - unused
c2d551ff FB	189	*/
d49190c4	190	void target_disas(FILE out, CPUState cpu, target_ulong code,
f4359b9f	191	target_ulong size, int flags)
b9adb4a6	192	{
37b9de46	193	CPUClass *cc = CPU_GET_CLASS(cpu);
c27004ec	194	target_ulong pc;
b9adb4a6	195	int count;
f4359b9f	196	CPUDebug s;
b9adb4a6	197
f4359b9f	198	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
b9adb4a6	199
d49190c4	200	s.cpu = cpu;
f4359b9f BS	201	s.info.read_memory_func = target_read_memory;
	202	s.info.buffer_vma = code;
	203	s.info.buffer_length = size;
	204	s.info.print_address_func = generic_print_target_address;
c27004ec FB	205
c27004ec FB	206	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	207	s.info.endian = BFD_ENDIAN_BIG;
c27004ec	208	#else
f4359b9f	209	s.info.endian = BFD_ENDIAN_LITTLE;
c27004ec	210	#endif
37b9de46 PC	211
	212	if (cc->disas_set_info) {
	213	cc->disas_set_info(cpu, &s.info);
	214	}
	215
c27004ec	216	#if defined(TARGET_I386)
f4359b9f BS	217	if (flags == 2) {
	218	s.info.mach = bfd_mach_x86_64;
	219	} else if (flags == 1) {
	220	s.info.mach = bfd_mach_i386_i8086;
	221	} else {
	222	s.info.mach = bfd_mach_i386_i386;
	223	}
2de295c5	224	s.info.print_insn = print_insn_i386;
c27004ec	225	#elif defined(TARGET_SPARC)
2de295c5	226	s.info.print_insn = print_insn_sparc;
3475187d	227	#ifdef TARGET_SPARC64
f4359b9f	228	s.info.mach = bfd_mach_sparc_v9b;
3b46e624	229	#endif
c27004ec	230	#elif defined(TARGET_PPC)
e13951f8	231	if ((flags >> 16) & 1) {
f4359b9f BS	232	s.info.endian = BFD_ENDIAN_LITTLE;
f4359b9f BS	233	}
237c0af0	234	if (flags & 0xFFFF) {
e13951f8	235	/* If we have a precise definition of the instruction set, use it. */
f4359b9f	236	s.info.mach = flags & 0xFFFF;
237c0af0	237	} else {
a2458627	238	#ifdef TARGET_PPC64
f4359b9f	239	s.info.mach = bfd_mach_ppc64;
a2458627	240	#else
f4359b9f	241	s.info.mach = bfd_mach_ppc;
a2458627	242	#endif
237c0af0	243	}
88770fec	244	s.info.disassembler_options = (char *)"any";
2de295c5	245	s.info.print_insn = print_insn_ppc;
e6e5906b	246	#elif defined(TARGET_M68K)
2de295c5	247	s.info.print_insn = print_insn_m68k;
6af0bf9c	248	#elif defined(TARGET_MIPS)
76b3030c	249	#ifdef TARGET_WORDS_BIGENDIAN
2de295c5	250	s.info.print_insn = print_insn_big_mips;
76b3030c	251	#else
2de295c5	252	s.info.print_insn = print_insn_little_mips;
76b3030c	253	#endif
fdf9b3e8	254	#elif defined(TARGET_SH4)
f4359b9f	255	s.info.mach = bfd_mach_sh4;
2de295c5	256	s.info.print_insn = print_insn_sh;
eddf68a6	257	#elif defined(TARGET_ALPHA)
f4359b9f	258	s.info.mach = bfd_mach_alpha_ev6;
2de295c5	259	s.info.print_insn = print_insn_alpha;
db500609	260	#elif defined(TARGET_S390X)
f4359b9f	261	s.info.mach = bfd_mach_s390_64;
2de295c5	262	s.info.print_insn = print_insn_s390;
bd86a88e AG	263	#elif defined(TARGET_MOXIE)
bd86a88e AG	264	s.info.mach = bfd_arch_moxie;
2de295c5	265	s.info.print_insn = print_insn_moxie;
79368f49	266	#elif defined(TARGET_LM32)
f4359b9f	267	s.info.mach = bfd_mach_lm32;
2de295c5	268	s.info.print_insn = print_insn_lm32;
c6105c0a	269	#endif
2de295c5 PC	270	if (s.info.print_insn == NULL) {
2de295c5 PC	271	s.info.print_insn = print_insn_od_target;
c46ffd57	272	}
c6105c0a	273
7e000c2e	274	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	275	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	276	count = s.info.print_insn(pc, &s.info);
c27004ec FB	277	#if 0
	278	{
	279	int i;
	280	uint8_t b;
	281	fprintf(out, " {");
	282	for(i = 0; i < count; i++) {
f4359b9f	283	target_read_memory(pc + i, &b, 1, &s.info);
c27004ec FB	284	fprintf(out, " %02x", b);
	285	}
	286	fprintf(out, " }");
	287	}
	288	#endif
	289	fprintf(out, "\n");
	290	if (count < 0)
	291	break;
754d00ae	292	if (size < count) {
	293	fprintf(out,
	294	"Disassembler disagrees with translator over instruction "
	295	"decoding\n"
	296	"Please report this to [email protected]\n");
	297	break;
	298	}
c27004ec FB	299	}
	300	}
	301
	302	/* Disassemble this for me please... (debugging). */
	303	void disas(FILE out, void code, unsigned long size)
	304	{
b0b0f1c9	305	uintptr_t pc;
c27004ec	306	int count;
f4359b9f	307	CPUDebug s;
c46ffd57	308	int (print_insn)(bfd_vma pc, disassemble_info info) = NULL;
c27004ec	309
f4359b9f BS	310	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
f4359b9f BS	311	s.info.print_address_func = generic_print_host_address;
c27004ec	312
f4359b9f BS	313	s.info.buffer = code;
	314	s.info.buffer_vma = (uintptr_t)code;
	315	s.info.buffer_length = size;
b9adb4a6	316
e2542fe2	317	#ifdef HOST_WORDS_BIGENDIAN
f4359b9f	318	s.info.endian = BFD_ENDIAN_BIG;
b9adb4a6	319	#else
f4359b9f	320	s.info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	321	#endif
5826e519 SW	322	#if defined(CONFIG_TCG_INTERPRETER)
	323	print_insn = print_insn_tci;
	324	#elif defined(__i386__)
f4359b9f	325	s.info.mach = bfd_mach_i386_i386;
c27004ec	326	print_insn = print_insn_i386;
bc51c5c9	327	#elif defined(__x86_64__)
f4359b9f	328	s.info.mach = bfd_mach_x86_64;
c27004ec	329	print_insn = print_insn_i386;
e58ffeb3	330	#elif defined(_ARCH_PPC)
66d4f6a3	331	s.info.disassembler_options = (char *)"any";
c27004ec	332	print_insn = print_insn_ppc;
999b53ec CF	333	#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
999b53ec CF	334	print_insn = print_insn_arm_a64;
a993ba85	335	#elif defined(__alpha__)
c27004ec	336	print_insn = print_insn_alpha;
aa0aa4fa	337	#elif defined(__sparc__)
c27004ec	338	print_insn = print_insn_sparc;
f4359b9f	339	s.info.mach = bfd_mach_sparc_v9b;
5fafdf24	340	#elif defined(__arm__)
c27004ec	341	print_insn = print_insn_arm;
6af0bf9c FB	342	#elif defined(__MIPSEB__)
	343	print_insn = print_insn_big_mips;
	344	#elif defined(__MIPSEL__)
	345	print_insn = print_insn_little_mips;
48024e4a FB	346	#elif defined(__m68k__)
48024e4a FB	347	print_insn = print_insn_m68k;
8f860bb8 TS	348	#elif defined(__s390__)
8f860bb8 TS	349	print_insn = print_insn_s390;
f54b3f92 AJ	350	#elif defined(__hppa__)
f54b3f92 AJ	351	print_insn = print_insn_hppa;
903ec55c AJ	352	#elif defined(__ia64__)
903ec55c AJ	353	print_insn = print_insn_ia64;
b9adb4a6	354	#endif
c46ffd57 RH	355	if (print_insn == NULL) {
	356	print_insn = print_insn_od_host;
	357	}
b0b0f1c9 SW	358	for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
b0b0f1c9 SW	359	fprintf(out, "0x%08" PRIxPTR ": ", pc);
f4359b9f	360	count = print_insn(pc, &s.info);
b9adb4a6 FB	361	fprintf(out, "\n");
	362	if (count < 0)
	363	break;
	364	}
	365	}
	366
	367	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	368	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	369	{
49918a75	370	const char *symbol = "";
e80cfcfc	371	struct syminfo *s;
3b46e624	372
e80cfcfc	373	for (s = syminfos; s; s = s->next) {
49918a75 PB	374	symbol = s->lookup_symbol(s, orig_addr);
	375	if (symbol[0] != '\0') {
	376	break;
	377	}
b9adb4a6	378	}
49918a75 PB	379
49918a75 PB	380	return symbol;
b9adb4a6	381	}
9307c4c1 FB	382
	383	#if !defined(CONFIG_USER_ONLY)
	384
83c9089e	385	#include "monitor/monitor.h"
3d2cfdf1	386
9307c4c1 FB	387	static int monitor_disas_is_physical;
	388
	389	static int
a5f1b965 BS	390	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	391	struct disassemble_info *info)
9307c4c1	392	{
f4359b9f BS	393	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	394
9307c4c1	395	if (monitor_disas_is_physical) {
54f7b4a3	396	cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1	397	} else {
d49190c4	398	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
9307c4c1 FB	399	}
	400	return 0;
	401	}
	402
8b7968f7 SW	403	static int GCC_FMT_ATTR(2, 3)
8b7968f7 SW	404	monitor_fprintf(FILE stream, const char fmt, ...)
3d2cfdf1 FB	405	{
	406	va_list ap;
	407	va_start(ap, fmt);
376253ec	408	monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1 FB	409	va_end(ap);
	410	return 0;
	411	}
	412
1c38f843 TM	413	/* Disassembler for the monitor.
1c38f843 TM	414	See target_disas for a description of flags. */
d49190c4	415	void monitor_disas(Monitor mon, CPUState cpu,
6a00d601	416	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	417	{
37b9de46	418	CPUClass *cc = CPU_GET_CLASS(cpu);
9307c4c1	419	int count, i;
f4359b9f	420	CPUDebug s;
9307c4c1	421
f4359b9f	422	INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
9307c4c1	423
d49190c4	424	s.cpu = cpu;
9307c4c1	425	monitor_disas_is_physical = is_physical;
f4359b9f BS	426	s.info.read_memory_func = monitor_read_memory;
f4359b9f BS	427	s.info.print_address_func = generic_print_target_address;
9307c4c1	428
f4359b9f	429	s.info.buffer_vma = pc;
9307c4c1 FB	430
9307c4c1 FB	431	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	432	s.info.endian = BFD_ENDIAN_BIG;
9307c4c1	433	#else
f4359b9f	434	s.info.endian = BFD_ENDIAN_LITTLE;
9307c4c1	435	#endif
37b9de46 PC	436
	437	if (cc->disas_set_info) {
	438	cc->disas_set_info(cpu, &s.info);
	439	}
	440
9307c4c1	441	#if defined(TARGET_I386)
f4359b9f BS	442	if (flags == 2) {
	443	s.info.mach = bfd_mach_x86_64;
	444	} else if (flags == 1) {
	445	s.info.mach = bfd_mach_i386_i8086;
	446	} else {
	447	s.info.mach = bfd_mach_i386_i386;
	448	}
2de295c5	449	s.info.print_insn = print_insn_i386;
cbd669da	450	#elif defined(TARGET_ALPHA)
2de295c5	451	s.info.print_insn = print_insn_alpha;
9307c4c1	452	#elif defined(TARGET_SPARC)
2de295c5	453	s.info.print_insn = print_insn_sparc;
682c4f15	454	#ifdef TARGET_SPARC64
f4359b9f	455	s.info.mach = bfd_mach_sparc_v9b;
682c4f15	456	#endif
9307c4c1	457	#elif defined(TARGET_PPC)
1c38f843 TM	458	if (flags & 0xFFFF) {
	459	/* If we have a precise definition of the instruction set, use it. */
	460	s.info.mach = flags & 0xFFFF;
	461	} else {
a2458627	462	#ifdef TARGET_PPC64
1c38f843	463	s.info.mach = bfd_mach_ppc64;
a2458627	464	#else
1c38f843	465	s.info.mach = bfd_mach_ppc;
a2458627	466	#endif
1c38f843 TM	467	}
	468	if ((flags >> 16) & 1) {
	469	s.info.endian = BFD_ENDIAN_LITTLE;
	470	}
2de295c5	471	s.info.print_insn = print_insn_ppc;
e6e5906b	472	#elif defined(TARGET_M68K)
2de295c5	473	s.info.print_insn = print_insn_m68k;
6af0bf9c	474	#elif defined(TARGET_MIPS)
76b3030c	475	#ifdef TARGET_WORDS_BIGENDIAN
2de295c5	476	s.info.print_insn = print_insn_big_mips;
76b3030c	477	#else
2de295c5	478	s.info.print_insn = print_insn_little_mips;
76b3030c	479	#endif
b4e1f077	480	#elif defined(TARGET_SH4)
f4359b9f	481	s.info.mach = bfd_mach_sh4;
2de295c5	482	s.info.print_insn = print_insn_sh;
db500609	483	#elif defined(TARGET_S390X)
f4359b9f	484	s.info.mach = bfd_mach_s390_64;
2de295c5	485	s.info.print_insn = print_insn_s390;
bd86a88e AG	486	#elif defined(TARGET_MOXIE)
bd86a88e AG	487	s.info.mach = bfd_arch_moxie;
2de295c5	488	s.info.print_insn = print_insn_moxie;
79368f49	489	#elif defined(TARGET_LM32)
f4359b9f	490	s.info.mach = bfd_mach_lm32;
2de295c5	491	s.info.print_insn = print_insn_lm32;
9307c4c1	492	#endif
37b9de46 PC	493	if (!s.info.print_insn) {
	494	monitor_printf(mon, "0x" TARGET_FMT_lx
	495	": Asm output not supported on this arch\n", pc);
	496	return;
	497	}
9307c4c1 FB	498
9307c4c1 FB	499	for(i = 0; i < nb_insn; i++) {
376253ec	500	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	501	count = s.info.print_insn(pc, &s.info);
376253ec	502	monitor_printf(mon, "\n");
9307c4c1 FB	503	if (count < 0)
	504	break;
	505	pc += count;
	506	}
	507	}
	508	#endif