projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| 87e0331c | 1 | # See docs/devel/tracing.txt for syntax documentation. |
| 6b5bacf6 DB |
2 | |
| 3 | # hw/misc/eccmemctl.c | |
| 8908eb1a VSO |
4 | ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" |
| 5 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" | |
| 6 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" | |
| 7 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x" | |
| 8 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x" | |
| 9 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x" | |
| 10 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x" | |
| 11 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x" | |
| 12 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x" | |
| 13 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x" | |
| 14 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x" | |
| 15 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x" | |
| 16 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x" | |
| 17 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x" | |
| 18 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x" | |
| 19 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" | |
| 20 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" | |
| 21 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" | |
| 6b5bacf6 DB |
22 | |
| 23 | # hw/misc/slavio_misc.c | |
| 24 | slavio_misc_update_irq_raise(void) "Raise IRQ" | |
| 25 | slavio_misc_update_irq_lower(void) "Lower IRQ" | |
| 26 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
| 8908eb1a VSO |
27 | slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x" |
| 28 | slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x" | |
| 29 | slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x" | |
| 30 | slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x" | |
| 31 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x" | |
| 32 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x" | |
| 33 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x" | |
| 34 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x" | |
| 35 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x" | |
| 36 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x" | |
| 37 | apc_mem_writeb(uint32_t val) "Write power management 0x%02x" | |
| 38 | apc_mem_readb(uint32_t ret) "Read power management 0x%02x" | |
| 39 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x" | |
| 40 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" | |
| 41 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" | |
| 42 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" | |
| 6b5bacf6 DB |
43 | |
| 44 | # hw/misc/milkymist-hpdmc.c | |
| 8908eb1a VSO |
45 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" |
| 46 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" | |
| 6b5bacf6 DB |
47 | |
| 48 | # hw/misc/milkymist-pfpu.c | |
| 8908eb1a VSO |
49 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
| 50 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
| 51 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" | |
| 6b5bacf6 | 52 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
| 1c8a2388 AJ |
53 | |
| 54 | # hw/misc/aspeed_scu.c | |
| 55 | aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 | |
| dd73185b PM |
56 | |
| 57 | # hw/misc/mps2_scc.c | |
| 58 | mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 59 | mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 60 | mps2_scc_reset(void) "MPS2 SCC: reset" | |
| 61 | mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c" | |
| 62 | mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 | |
| 63 | mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 | |
| 0ee1e1f4 | 64 | |
| 9a52d999 PM |
65 | # hw/misc/mps2_fpgaio.c |
| 66 | mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 67 | mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 68 | mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" | |
| 69 | mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c" | |
| 70 | ||
| 0ee1e1f4 | 71 | # hw/misc/msf2-sysreg.c |
| 787bbc30 DB |
72 | msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 |
| 73 | msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 | |
| 0ee1e1f4 | 74 | msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" |
| 30b2f870 AS |
75 | |
| 76 | #hw/misc/imx7_gpr.c | |
| 787bbc30 DB |
77 | imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 |
| 78 | imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 | |
| 51f233ec MCA |
79 | |
| 80 | # hw/misc/mos6522.c | |
| 81 | mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" | |
| 82 | mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 | |
| 83 | mos6522_set_sr_int(void) "set sr_int" | |
| 84 | mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 | |
| 85 | mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" | |
| 9eb8040c | 86 | |
| 344f4b15 PM |
87 | # hw/misc/tz-mpc.c |
| 88 | tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 89 | tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 90 | tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" | |
| 91 | tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |
| 92 | tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" | |
| dd29d068 | 93 | tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 |
| 344f4b15 | 94 | |
| 211e701d PM |
95 | # hw/misc/tz-msc.c |
| 96 | tz_msc_reset(void) "TZ MSC: reset" | |
| 97 | tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" | |
| 98 | tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" | |
| 99 | tz_msc_irq_enable(int level) "TZ MSC: int_enable = %d" | |
| 100 | tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" | |
| 101 | tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" | |
| 102 | tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" | |
| 103 | ||
| 9eb8040c PM |
104 | # hw/misc/tz-ppc.c |
| 105 | tz_ppc_reset(void) "TZ PPC: reset" | |
| 106 | tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" | |
| 107 | tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" | |
| 108 | tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d" | |
| 109 | tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d" | |
| 110 | tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d" | |
| 111 | tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" | |
| f32408f3 DB |
112 | tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" |
| 113 | tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" | |
| de343bb6 PM |
114 | |
| 115 | # hw/misc/iotkit-secctl.c | |
| 116 | iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 117 | iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 118 | iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 119 | iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
| 120 | iotkit_secctl_reset(void) "IoTKit SecCtl: reset" | |
| 781182e1 JCD |
121 | |
| 122 | # hw/misc/imx6ul_ccm.c | |
| 123 | ccm_entry(void) "\n" | |
| 124 | ccm_freq(uint32_t freq) "freq = %d\n" | |
| 125 | ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d\n" | |
| 126 | ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 "\n" | |
| 127 | ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 "\n" | |
| 75750e4d PM |
128 | |
| 129 | # hw/misc/iotkit-sysctl.c | |
| 130 | iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 131 | iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 132 | iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 133 | iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
| 134 | iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" |