]> Git Repo - qemu.git/blame - hw/sparc/trace-events
Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging
[qemu.git] / hw / sparc / trace-events
CommitLineData
87e0331c 1# See docs/devel/tracing.txt for syntax documentation.
f0b9e356
DB
2
3# hw/sparc/sun4m.c
4sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
5sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
6sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
7sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
8
ba51ef25
MCA
9# hw/sparc/sun4m_iommu.c
10sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
11sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
12sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64
13sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x"
14sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x"
15sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x"
16sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x"
17sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64
18
f0b9e356
DB
19# hw/sparc/leon3.c
20leon3_set_irq(int intno) "Set CPU IRQ %d"
21leon3_reset_irq(int intno) "Reset CPU IRQ %d"
This page took 0.11246 seconds and 4 git commands to generate.