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e6eaabeb SW |
1 | /* |
2 | * Support for the PPC e500-based mpc8544ds board | |
3 | * | |
4 | * Copyright 2012 Freescale Semiconductor, Inc. | |
5 | * | |
6 | * This is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
0d75590d | 12 | #include "qemu/osdep.h" |
e6eaabeb SW |
13 | #include "qemu-common.h" |
14 | #include "e500.h" | |
7948b4b0 | 15 | #include "hw/boards.h" |
9c17d615 | 16 | #include "sysemu/device_tree.h" |
0d09e41a | 17 | #include "hw/ppc/openpic.h" |
44045ce9 | 18 | #include "qemu/error-report.h" |
59e816fd | 19 | #include "cpu.h" |
e6eaabeb | 20 | |
03f04809 | 21 | static void mpc8544ds_fixup_devtree(void *fdt) |
e6eaabeb SW |
22 | { |
23 | const char model[] = "MPC8544DS"; | |
24 | const char compatible[] = "MPC8544DS\0MPC85xxDS"; | |
25 | ||
5a4348d1 PC |
26 | qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model)); |
27 | qemu_fdt_setprop(fdt, "/", "compatible", compatible, | |
28 | sizeof(compatible)); | |
e6eaabeb SW |
29 | } |
30 | ||
3ef96221 | 31 | static void mpc8544ds_init(MachineState *machine) |
e6eaabeb | 32 | { |
44045ce9 AG |
33 | if (machine->ram_size > 0xc0000000) { |
34 | error_report("The MPC8544DS board only supports up to 3GB of RAM"); | |
35 | exit(1); | |
36 | } | |
37 | ||
03f04809 | 38 | ppce500_init(machine); |
e6eaabeb SW |
39 | } |
40 | ||
03f04809 | 41 | static void e500plat_machine_class_init(ObjectClass *oc, void *data) |
e6eaabeb | 42 | { |
03f04809 IM |
43 | MachineClass *mc = MACHINE_CLASS(oc); |
44 | PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc); | |
45 | ||
46 | pmc->pci_first_slot = 0x11; | |
47 | pmc->pci_nr_slots = 2; | |
48 | pmc->fixup_devtree = mpc8544ds_fixup_devtree; | |
49 | pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20; | |
50 | pmc->ccsrbar_base = 0xE0000000ULL; | |
51 | pmc->pci_mmio_base = 0xC0000000ULL; | |
52 | pmc->pci_mmio_bus_base = 0xC0000000ULL; | |
53 | pmc->pci_pio_base = 0xE1000000ULL; | |
54 | pmc->spin_base = 0xEF000000ULL; | |
55 | ||
e264d29d EH |
56 | mc->desc = "mpc8544ds"; |
57 | mc->init = mpc8544ds_init; | |
58 | mc->max_cpus = 15; | |
59e816fd | 59 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30"); |
e6eaabeb SW |
60 | } |
61 | ||
03f04809 IM |
62 | #define TYPE_MPC8544DS_MACHINE MACHINE_TYPE_NAME("mpc8544ds") |
63 | ||
64 | static const TypeInfo mpc8544ds_info = { | |
65 | .name = TYPE_MPC8544DS_MACHINE, | |
66 | .parent = TYPE_PPCE500_MACHINE, | |
67 | .class_init = e500plat_machine_class_init, | |
68 | }; | |
69 | ||
70 | static void mpc8544ds_register_types(void) | |
71 | { | |
72 | type_register_static(&mpc8544ds_info); | |
73 | } | |
74 | ||
75 | type_init(mpc8544ds_register_types) |