]> Git Repo - qemu.git/blame - hw/microblaze/petalogix_s3adsp1800_mmu.c
Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0' into staging
[qemu.git] / hw / microblaze / petalogix_s3adsp1800_mmu.c
CommitLineData
6a8b1ae2
EI
1/*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
3 * boards.
4 *
5 * Copyright (c) 2009 Edgar E. Iglesias.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
8fd9dece 26#include "qemu/osdep.h"
a4fb331d 27#include "qemu/units.h"
da34e65c 28#include "qapi/error.h"
4771d756
PB
29#include "qemu-common.h"
30#include "cpu.h"
83c9f4ca
PB
31#include "hw/sysbus.h"
32#include "hw/hw.h"
1422e32d 33#include "net/net.h"
0d09e41a 34#include "hw/block/flash.h"
9c17d615 35#include "sysemu/sysemu.h"
bd2be150 36#include "hw/devices.h"
83c9f4ca 37#include "hw/boards.h"
022c62cb 38#include "exec/address-spaces.h"
1b6d0781 39#include "hw/char/xilinx_uartlite.h"
6a8b1ae2 40
47b43a1f 41#include "boot.h"
b861b741 42
a4fb331d
PMD
43#define LMB_BRAM_SIZE (128 * KiB)
44#define FLASH_SIZE (16 * MiB)
6a8b1ae2 45
6a8b1ae2 46#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
409dbce5 47
cba1fd36
PC
48#define MEMORY_BASEADDR 0x90000000
49#define FLASH_BASEADDR 0xa0000000
50#define INTC_BASEADDR 0x81800000
51#define TIMER_BASEADDR 0x83c00000
52#define UARTLITE_BASEADDR 0x84000000
53#define ETHLITE_BASEADDR 0x81000000
54
05a738c4
PC
55#define TIMER_IRQ 0
56#define ETHLITE_IRQ 1
57#define UARTLITE_IRQ 3
58
6a8b1ae2 59static void
3ef96221 60petalogix_s3adsp1800_init(MachineState *machine)
6a8b1ae2 61{
3ef96221 62 ram_addr_t ram_size = machine->ram_size;
6a8b1ae2 63 DeviceState *dev;
3ed60733 64 MicroBlazeCPU *cpu;
751c6a17 65 DriveInfo *dinfo;
6a8b1ae2 66 int i;
a8170e5e 67 hwaddr ddr_base = MEMORY_BASEADDR;
589f0aad
AK
68 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
69 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
73c69456 70 qemu_irq irq[32];
589f0aad 71 MemoryRegion *sysmem = get_system_memory();
6a8b1ae2 72
d87636b1 73 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
ad24f947 74 object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort);
d87636b1 75 object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
6a8b1ae2 76
6a8b1ae2 77 /* Attach emulated BRAM through the LMB. */
98a99ce0 78 memory_region_init_ram(phys_lmb_bram, NULL,
49946538 79 "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
f8ed85ac 80 &error_fatal);
589f0aad 81 memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
6a8b1ae2 82
98a99ce0 83 memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
f8ed85ac 84 ram_size, &error_fatal);
589f0aad 85 memory_region_add_subregion(sysmem, ddr_base, phys_ram);
6a8b1ae2 86
751c6a17 87 dinfo = drive_get(IF_PFLASH, 0, 0);
cba1fd36 88 pflash_cfi01_register(FLASH_BASEADDR,
cfe5f011 89 NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
4be74634 90 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
a4fb331d 91 64 * KiB, FLASH_SIZE >> 16,
01e0451a 92 1, 0x89, 0x18, 0x0000, 0x0, 1);
6a8b1ae2 93
13c9bfbf
PC
94 dev = qdev_create(NULL, "xlnx.xps-intc");
95 qdev_prop_set_uint32(dev, "kind-of-intr",
96 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
97 qdev_init_nofail(dev);
98 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
99 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
100 qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
6a8b1ae2
EI
101 for (i = 0; i < 32; i++) {
102 irq[i] = qdev_get_gpio_in(dev, i);
103 }
104
1b6d0781 105 xilinx_uartlite_create(UARTLITE_BASEADDR, irq[UARTLITE_IRQ],
9bca0edb 106 serial_hd(0));
29873712 107
6a8b1ae2 108 /* 2 timers at irq 2 @ 62 Mhz. */
29873712
PC
109 dev = qdev_create(NULL, "xlnx.xps-timer");
110 qdev_prop_set_uint32(dev, "one-timer-only", 0);
111 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
112 qdev_init_nofail(dev);
113 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
114 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
115
b8d4e1c4
PC
116 qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
117 dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
118 qdev_set_nic_properties(dev, &nd_table[0]);
119 qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
120 qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
121 qdev_init_nofail(dev);
122 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
123 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
6a8b1ae2 124
bf494367 125 microblaze_load_kernel(cpu, ddr_base, ram_size,
3ef96221 126 machine->initrd_filename,
ec426ff8 127 BINARY_DEVICE_TREE_FILE,
033af8e9 128 NULL);
6a8b1ae2
EI
129}
130
e264d29d 131static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
6a8b1ae2 132{
e264d29d
EH
133 mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
134 mc->init = petalogix_s3adsp1800_init;
135 mc->is_default = 1;
6a8b1ae2
EI
136}
137
e264d29d 138DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)
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