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3ead03bd AZ |
1 | /* |
2 | * Bit-Bang i2c emulation extracted from | |
3 | * Marvell MV88W8618 / Freecom MusicPal emulation. | |
4 | * | |
5 | * Copyright (c) 2008 Jan Kiszka | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GNU GPL v2. |
3ead03bd AZ |
8 | */ |
9 | #include "hw.h" | |
3cd035d8 | 10 | #include "bitbang_i2c.h" |
3ead03bd AZ |
11 | #include "sysbus.h" |
12 | ||
3cd035d8 PB |
13 | //#define DEBUG_BITBANG_I2C |
14 | ||
15 | #ifdef DEBUG_BITBANG_I2C | |
16 | #define DPRINTF(fmt, ...) \ | |
17 | do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) | |
18 | #else | |
19 | #define DPRINTF(fmt, ...) do {} while(0) | |
20 | #endif | |
21 | ||
3ead03bd AZ |
22 | typedef enum bitbang_i2c_state { |
23 | STOPPED = 0, | |
3ead03bd AZ |
24 | SENDING_BIT7, |
25 | SENDING_BIT6, | |
26 | SENDING_BIT5, | |
27 | SENDING_BIT4, | |
28 | SENDING_BIT3, | |
29 | SENDING_BIT2, | |
30 | SENDING_BIT1, | |
31 | SENDING_BIT0, | |
32 | WAITING_FOR_ACK, | |
33 | RECEIVING_BIT7, | |
34 | RECEIVING_BIT6, | |
35 | RECEIVING_BIT5, | |
36 | RECEIVING_BIT4, | |
37 | RECEIVING_BIT3, | |
38 | RECEIVING_BIT2, | |
39 | RECEIVING_BIT1, | |
40 | RECEIVING_BIT0, | |
2eb9f241 MC |
41 | SENDING_ACK, |
42 | SENT_NACK | |
3ead03bd AZ |
43 | } bitbang_i2c_state; |
44 | ||
3cd035d8 | 45 | struct bitbang_i2c_interface { |
3ead03bd AZ |
46 | i2c_bus *bus; |
47 | bitbang_i2c_state state; | |
48 | int last_data; | |
49 | int last_clock; | |
3cd035d8 | 50 | int device_out; |
3ead03bd AZ |
51 | uint8_t buffer; |
52 | int current_addr; | |
3cd035d8 | 53 | }; |
3ead03bd AZ |
54 | |
55 | static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) | |
56 | { | |
3cd035d8 | 57 | DPRINTF("STOP\n"); |
3ead03bd AZ |
58 | if (i2c->current_addr >= 0) |
59 | i2c_end_transfer(i2c->bus); | |
60 | i2c->current_addr = -1; | |
61 | i2c->state = STOPPED; | |
62 | } | |
63 | ||
3cd035d8 PB |
64 | /* Set device data pin. */ |
65 | static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) | |
66 | { | |
67 | i2c->device_out = level; | |
68 | //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); | |
69 | return level & i2c->last_data; | |
70 | } | |
71 | ||
72 | /* Leave device data pin unodified. */ | |
73 | static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) | |
74 | { | |
75 | return bitbang_i2c_ret(i2c, i2c->device_out); | |
76 | } | |
77 | ||
78 | /* Returns data line level. */ | |
79 | int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) | |
3ead03bd | 80 | { |
3ead03bd | 81 | int data; |
3ead03bd | 82 | |
3cd035d8 PB |
83 | if (level != 0 && level != 1) { |
84 | abort(); | |
85 | } | |
3ead03bd | 86 | |
3cd035d8 PB |
87 | if (line == BITBANG_I2C_SDA) { |
88 | if (level == i2c->last_data) { | |
89 | return bitbang_i2c_nop(i2c); | |
90 | } | |
91 | i2c->last_data = level; | |
92 | if (i2c->last_clock == 0) { | |
93 | return bitbang_i2c_nop(i2c); | |
94 | } | |
95 | if (level == 0) { | |
96 | DPRINTF("START\n"); | |
97 | /* START condition. */ | |
3ead03bd | 98 | i2c->state = SENDING_BIT7; |
3cd035d8 PB |
99 | i2c->current_addr = -1; |
100 | } else { | |
101 | /* STOP condition. */ | |
3ead03bd | 102 | bitbang_i2c_enter_stop(i2c); |
3cd035d8 PB |
103 | } |
104 | return bitbang_i2c_ret(i2c, 1); | |
105 | } | |
106 | ||
107 | data = i2c->last_data; | |
108 | if (i2c->last_clock == level) { | |
109 | return bitbang_i2c_nop(i2c); | |
110 | } | |
111 | i2c->last_clock = level; | |
112 | if (level == 0) { | |
113 | /* State is set/read at the start of the clock pulse. | |
114 | release the data line at the end. */ | |
115 | return bitbang_i2c_ret(i2c, 1); | |
116 | } | |
117 | switch (i2c->state) { | |
118 | case STOPPED: | |
2eb9f241 | 119 | case SENT_NACK: |
3cd035d8 | 120 | return bitbang_i2c_ret(i2c, 1); |
3ead03bd AZ |
121 | |
122 | case SENDING_BIT7 ... SENDING_BIT0: | |
3cd035d8 PB |
123 | i2c->buffer = (i2c->buffer << 1) | data; |
124 | /* will end up in WAITING_FOR_ACK */ | |
125 | i2c->state++; | |
126 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd AZ |
127 | |
128 | case WAITING_FOR_ACK: | |
3cd035d8 PB |
129 | if (i2c->current_addr < 0) { |
130 | i2c->current_addr = i2c->buffer; | |
131 | DPRINTF("Address 0x%02x\n", i2c->current_addr); | |
132 | i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, | |
133 | i2c->current_addr & 1); | |
134 | } else { | |
135 | DPRINTF("Sent 0x%02x\n", i2c->buffer); | |
136 | i2c_send(i2c->bus, i2c->buffer); | |
137 | } | |
138 | if (i2c->current_addr & 1) { | |
139 | i2c->state = RECEIVING_BIT7; | |
140 | } else { | |
141 | i2c->state = SENDING_BIT7; | |
142 | } | |
143 | return bitbang_i2c_ret(i2c, 0); | |
144 | ||
145 | case RECEIVING_BIT7: | |
146 | i2c->buffer = i2c_recv(i2c->bus); | |
147 | DPRINTF("RX byte 0x%02x\n", i2c->buffer); | |
148 | /* Fall through... */ | |
149 | case RECEIVING_BIT6 ... RECEIVING_BIT0: | |
150 | data = i2c->buffer >> 7; | |
151 | /* will end up in SENDING_ACK */ | |
152 | i2c->state++; | |
153 | i2c->buffer <<= 1; | |
154 | return bitbang_i2c_ret(i2c, data); | |
3ead03bd AZ |
155 | |
156 | case SENDING_ACK: | |
3cd035d8 PB |
157 | i2c->state = RECEIVING_BIT7; |
158 | if (data != 0) { | |
159 | DPRINTF("NACKED\n"); | |
2eb9f241 | 160 | i2c->state = SENT_NACK; |
3cd035d8 PB |
161 | i2c_nack(i2c->bus); |
162 | } else { | |
163 | DPRINTF("ACKED\n"); | |
164 | } | |
165 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd | 166 | } |
3cd035d8 PB |
167 | abort(); |
168 | } | |
169 | ||
170 | bitbang_i2c_interface *bitbang_i2c_init(i2c_bus *bus) | |
171 | { | |
172 | bitbang_i2c_interface *s; | |
173 | ||
7267c094 | 174 | s = g_malloc0(sizeof(bitbang_i2c_interface)); |
3cd035d8 PB |
175 | |
176 | s->bus = bus; | |
177 | s->last_data = 1; | |
178 | s->last_clock = 1; | |
179 | s->device_out = 1; | |
180 | ||
181 | return s; | |
182 | } | |
3ead03bd | 183 | |
3cd035d8 PB |
184 | /* GPIO interface. */ |
185 | typedef struct { | |
186 | SysBusDevice busdev; | |
187 | bitbang_i2c_interface *bitbang; | |
188 | int last_level; | |
189 | qemu_irq out; | |
190 | } GPIOI2CState; | |
191 | ||
192 | static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) | |
193 | { | |
194 | GPIOI2CState *s = opaque; | |
195 | ||
196 | level = bitbang_i2c_set(s->bitbang, irq, level); | |
197 | if (level != s->last_level) { | |
198 | s->last_level = level; | |
199 | qemu_set_irq(s->out, level); | |
200 | } | |
3ead03bd AZ |
201 | } |
202 | ||
3cd035d8 | 203 | static int gpio_i2c_init(SysBusDevice *dev) |
3ead03bd | 204 | { |
3cd035d8 | 205 | GPIOI2CState *s = FROM_SYSBUS(GPIOI2CState, dev); |
3ead03bd AZ |
206 | i2c_bus *bus; |
207 | ||
208 | sysbus_init_mmio(dev, 0x0, 0); | |
209 | ||
210 | bus = i2c_init_bus(&dev->qdev, "i2c"); | |
3cd035d8 | 211 | s->bitbang = bitbang_i2c_init(bus); |
3ead03bd AZ |
212 | |
213 | qdev_init_gpio_in(&dev->qdev, bitbang_i2c_gpio_set, 2); | |
214 | qdev_init_gpio_out(&dev->qdev, &s->out, 1); | |
81a322d4 GH |
215 | |
216 | return 0; | |
3ead03bd AZ |
217 | } |
218 | ||
3cd035d8 PB |
219 | static SysBusDeviceInfo gpio_i2c_info = { |
220 | .init = gpio_i2c_init, | |
221 | .qdev.name = "gpio_i2c", | |
222 | .qdev.desc = "Virtual GPIO to I2C bridge", | |
223 | .qdev.size = sizeof(GPIOI2CState), | |
224 | }; | |
225 | ||
3ead03bd AZ |
226 | static void bitbang_i2c_register(void) |
227 | { | |
3cd035d8 | 228 | sysbus_register_withprop(&gpio_i2c_info); |
3ead03bd AZ |
229 | } |
230 | ||
231 | device_init(bitbang_i2c_register) |