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25d8ac0e AF |
1 | /* |
2 | * Xtensa gdb server stub | |
3 | * | |
4 | * Copyright (c) 2003-2005 Fabrice Bellard | |
5 | * Copyright (c) 2013 SUSE LINUX Products GmbH | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
19 | */ | |
5b50e790 AF |
20 | #include "config.h" |
21 | #include "qemu-common.h" | |
22 | #include "exec/gdbstub.h" | |
25d8ac0e | 23 | |
5b50e790 | 24 | int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) |
25d8ac0e | 25 | { |
5b50e790 AF |
26 | XtensaCPU *cpu = XTENSA_CPU(cs); |
27 | CPUXtensaState *env = &cpu->env; | |
25d8ac0e AF |
28 | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; |
29 | ||
30 | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { | |
31 | return 0; | |
32 | } | |
33 | ||
34 | switch (reg->type) { | |
35 | case 9: /*pc*/ | |
986a2998 | 36 | return gdb_get_reg32(mem_buf, env->pc); |
25d8ac0e AF |
37 | |
38 | case 1: /*ar*/ | |
39 | xtensa_sync_phys_from_window(env); | |
986a2998 AF |
40 | return gdb_get_reg32(mem_buf, env->phys_regs[(reg->targno & 0xff) |
41 | % env->config->nareg]); | |
25d8ac0e AF |
42 | |
43 | case 2: /*SR*/ | |
986a2998 | 44 | return gdb_get_reg32(mem_buf, env->sregs[reg->targno & 0xff]); |
25d8ac0e AF |
45 | |
46 | case 3: /*UR*/ | |
986a2998 | 47 | return gdb_get_reg32(mem_buf, env->uregs[reg->targno & 0xff]); |
25d8ac0e AF |
48 | |
49 | case 4: /*f*/ | |
986a2998 AF |
50 | return gdb_get_reg32(mem_buf, float32_val(env->fregs[reg->targno |
51 | & 0x0f])); | |
25d8ac0e AF |
52 | |
53 | case 8: /*a*/ | |
986a2998 | 54 | return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]); |
25d8ac0e AF |
55 | |
56 | default: | |
57 | qemu_log("%s from reg %d of unsupported type %d\n", | |
58 | __func__, n, reg->type); | |
59 | return 0; | |
60 | } | |
61 | } | |
62 | ||
5b50e790 | 63 | int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) |
25d8ac0e | 64 | { |
5b50e790 AF |
65 | XtensaCPU *cpu = XTENSA_CPU(cs); |
66 | CPUXtensaState *env = &cpu->env; | |
25d8ac0e AF |
67 | uint32_t tmp; |
68 | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n; | |
69 | ||
70 | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { | |
71 | return 0; | |
72 | } | |
73 | ||
74 | tmp = ldl_p(mem_buf); | |
75 | ||
76 | switch (reg->type) { | |
77 | case 9: /*pc*/ | |
78 | env->pc = tmp; | |
79 | break; | |
80 | ||
81 | case 1: /*ar*/ | |
82 | env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp; | |
83 | xtensa_sync_window_from_phys(env); | |
84 | break; | |
85 | ||
86 | case 2: /*SR*/ | |
87 | env->sregs[reg->targno & 0xff] = tmp; | |
88 | break; | |
89 | ||
90 | case 3: /*UR*/ | |
91 | env->uregs[reg->targno & 0xff] = tmp; | |
92 | break; | |
93 | ||
94 | case 4: /*f*/ | |
95 | env->fregs[reg->targno & 0x0f] = make_float32(tmp); | |
96 | break; | |
97 | ||
98 | case 8: /*a*/ | |
99 | env->regs[reg->targno & 0x0f] = tmp; | |
100 | break; | |
101 | ||
102 | default: | |
103 | qemu_log("%s to reg %d of unsupported type %d\n", | |
104 | __func__, n, reg->type); | |
105 | return 0; | |
106 | } | |
107 | ||
108 | return 4; | |
109 | } |