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Commit | Line | Data |
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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
c896fe29 FB |
25 | /* define it to use liveness analysis (better code) */ |
26 | #define USE_LIVENESS_ANALYSIS | |
8f2e8c07 | 27 | #define USE_TCG_OPTIMIZATIONS |
c896fe29 | 28 | |
cca82982 AJ |
29 | #include "config.h" |
30 | ||
813da627 RH |
31 | /* Define to jump the ELF file used to communicate with GDB. */ |
32 | #undef DEBUG_JIT | |
33 | ||
a6c6f76c | 34 | #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) |
cca82982 AJ |
35 | /* define it to suppress various consistency checks (faster) */ |
36 | #define NDEBUG | |
37 | #endif | |
38 | ||
ca10f867 | 39 | #include "qemu-common.h" |
902b3d5c | 40 | #include "cache-utils.h" |
379f6698 | 41 | #include "host-utils.h" |
2d8ebcf9 | 42 | #include "qemu-timer.h" |
c896fe29 FB |
43 | |
44 | /* Note: the long term plan is to reduce the dependancies on the QEMU | |
45 | CPU definitions. Currently they are used for qemu_ld/st | |
46 | instructions */ | |
47 | #define NO_CPU_IO_DEFS | |
48 | #include "cpu.h" | |
c896fe29 FB |
49 | |
50 | #include "tcg-op.h" | |
813da627 RH |
51 | |
52 | #if TCG_TARGET_REG_BITS == 64 | |
53 | # define ELF_CLASS ELFCLASS64 | |
54 | #else | |
55 | # define ELF_CLASS ELFCLASS32 | |
56 | #endif | |
57 | #ifdef HOST_WORDS_BIGENDIAN | |
58 | # define ELF_DATA ELFDATA2MSB | |
59 | #else | |
60 | # define ELF_DATA ELFDATA2LSB | |
61 | #endif | |
62 | ||
c896fe29 FB |
63 | #include "elf.h" |
64 | ||
c0ad3001 | 65 | /* Forward declarations for functions declared in tcg-target.c and used here. */ |
e4d58b41 RH |
66 | static void tcg_target_init(TCGContext *s); |
67 | static void tcg_target_qemu_prologue(TCGContext *s); | |
c896fe29 | 68 | static void patch_reloc(uint8_t *code_ptr, int type, |
f54b3f92 | 69 | tcg_target_long value, tcg_target_long addend); |
c896fe29 | 70 | |
813da627 RH |
71 | static void tcg_register_jit_int(void *buf, size_t size, |
72 | void *debug_frame, size_t debug_frame_size) | |
73 | __attribute__((unused)); | |
74 | ||
c0ad3001 SW |
75 | /* Forward declarations for functions declared and used in tcg-target.c. */ |
76 | static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); | |
2a534aff | 77 | static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, |
c0ad3001 | 78 | tcg_target_long arg2); |
2a534aff | 79 | static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); |
c0ad3001 | 80 | static void tcg_out_movi(TCGContext *s, TCGType type, |
2a534aff | 81 | TCGReg ret, tcg_target_long arg); |
c0ad3001 SW |
82 | static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, |
83 | const int *const_args); | |
2a534aff | 84 | static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, |
c0ad3001 SW |
85 | tcg_target_long arg2); |
86 | static int tcg_target_const_match(tcg_target_long val, | |
87 | const TCGArgConstraint *arg_ct); | |
c0ad3001 | 88 | |
8399ad59 | 89 | TCGOpDef tcg_op_defs[] = { |
0e2029a0 | 90 | #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, |
c896fe29 FB |
91 | #include "tcg-opc.h" |
92 | #undef DEF | |
c896fe29 | 93 | }; |
2a24374a | 94 | const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); |
c896fe29 | 95 | |
b1d8e52e BS |
96 | static TCGRegSet tcg_target_available_regs[2]; |
97 | static TCGRegSet tcg_target_call_clobber_regs; | |
c896fe29 FB |
98 | |
99 | /* XXX: move that inside the context */ | |
100 | uint16_t *gen_opc_ptr; | |
101 | TCGArg *gen_opparam_ptr; | |
102 | ||
103 | static inline void tcg_out8(TCGContext *s, uint8_t v) | |
104 | { | |
105 | *s->code_ptr++ = v; | |
106 | } | |
107 | ||
108 | static inline void tcg_out16(TCGContext *s, uint16_t v) | |
109 | { | |
110 | *(uint16_t *)s->code_ptr = v; | |
111 | s->code_ptr += 2; | |
112 | } | |
113 | ||
114 | static inline void tcg_out32(TCGContext *s, uint32_t v) | |
115 | { | |
116 | *(uint32_t *)s->code_ptr = v; | |
117 | s->code_ptr += 4; | |
118 | } | |
119 | ||
120 | /* label relocation processing */ | |
121 | ||
a5ad5916 SW |
122 | static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, |
123 | int label_index, long addend) | |
c896fe29 FB |
124 | { |
125 | TCGLabel *l; | |
126 | TCGRelocation *r; | |
127 | ||
128 | l = &s->labels[label_index]; | |
129 | if (l->has_value) { | |
623e265c PB |
130 | /* FIXME: This may break relocations on RISC targets that |
131 | modify instruction fields in place. The caller may not have | |
132 | written the initial value. */ | |
f54b3f92 | 133 | patch_reloc(code_ptr, type, l->u.value, addend); |
c896fe29 FB |
134 | } else { |
135 | /* add a new relocation entry */ | |
136 | r = tcg_malloc(sizeof(TCGRelocation)); | |
137 | r->type = type; | |
138 | r->ptr = code_ptr; | |
139 | r->addend = addend; | |
140 | r->next = l->u.first_reloc; | |
141 | l->u.first_reloc = r; | |
142 | } | |
143 | } | |
144 | ||
9d6fca70 | 145 | static void tcg_out_label(TCGContext *s, int label_index, void *ptr) |
c896fe29 FB |
146 | { |
147 | TCGLabel *l; | |
148 | TCGRelocation *r; | |
9d6fca70 | 149 | tcg_target_long value = (tcg_target_long)ptr; |
c896fe29 FB |
150 | |
151 | l = &s->labels[label_index]; | |
152 | if (l->has_value) | |
153 | tcg_abort(); | |
154 | r = l->u.first_reloc; | |
155 | while (r != NULL) { | |
f54b3f92 | 156 | patch_reloc(r->ptr, r->type, value, r->addend); |
c896fe29 FB |
157 | r = r->next; |
158 | } | |
159 | l->has_value = 1; | |
160 | l->u.value = value; | |
161 | } | |
162 | ||
163 | int gen_new_label(void) | |
164 | { | |
165 | TCGContext *s = &tcg_ctx; | |
166 | int idx; | |
167 | TCGLabel *l; | |
168 | ||
169 | if (s->nb_labels >= TCG_MAX_LABELS) | |
170 | tcg_abort(); | |
171 | idx = s->nb_labels++; | |
172 | l = &s->labels[idx]; | |
173 | l->has_value = 0; | |
174 | l->u.first_reloc = NULL; | |
175 | return idx; | |
176 | } | |
177 | ||
178 | #include "tcg-target.c" | |
179 | ||
c896fe29 FB |
180 | /* pool based memory allocation */ |
181 | void *tcg_malloc_internal(TCGContext *s, int size) | |
182 | { | |
183 | TCGPool *p; | |
184 | int pool_size; | |
185 | ||
186 | if (size > TCG_POOL_CHUNK_SIZE) { | |
187 | /* big malloc: insert a new pool (XXX: could optimize) */ | |
7267c094 | 188 | p = g_malloc(sizeof(TCGPool) + size); |
c896fe29 | 189 | p->size = size; |
4055299e KB |
190 | p->next = s->pool_first_large; |
191 | s->pool_first_large = p; | |
192 | return p->data; | |
c896fe29 FB |
193 | } else { |
194 | p = s->pool_current; | |
195 | if (!p) { | |
196 | p = s->pool_first; | |
197 | if (!p) | |
198 | goto new_pool; | |
199 | } else { | |
200 | if (!p->next) { | |
201 | new_pool: | |
202 | pool_size = TCG_POOL_CHUNK_SIZE; | |
7267c094 | 203 | p = g_malloc(sizeof(TCGPool) + pool_size); |
c896fe29 FB |
204 | p->size = pool_size; |
205 | p->next = NULL; | |
206 | if (s->pool_current) | |
207 | s->pool_current->next = p; | |
208 | else | |
209 | s->pool_first = p; | |
210 | } else { | |
211 | p = p->next; | |
212 | } | |
213 | } | |
214 | } | |
215 | s->pool_current = p; | |
216 | s->pool_cur = p->data + size; | |
217 | s->pool_end = p->data + p->size; | |
218 | return p->data; | |
219 | } | |
220 | ||
221 | void tcg_pool_reset(TCGContext *s) | |
222 | { | |
4055299e KB |
223 | TCGPool *p, *t; |
224 | for (p = s->pool_first_large; p; p = t) { | |
225 | t = p->next; | |
226 | g_free(p); | |
227 | } | |
228 | s->pool_first_large = NULL; | |
c896fe29 FB |
229 | s->pool_cur = s->pool_end = NULL; |
230 | s->pool_current = NULL; | |
231 | } | |
232 | ||
c896fe29 FB |
233 | void tcg_context_init(TCGContext *s) |
234 | { | |
235 | int op, total_args, n; | |
236 | TCGOpDef *def; | |
237 | TCGArgConstraint *args_ct; | |
238 | int *sorted_args; | |
239 | ||
240 | memset(s, 0, sizeof(*s)); | |
c896fe29 FB |
241 | s->nb_globals = 0; |
242 | ||
243 | /* Count total number of arguments and allocate the corresponding | |
244 | space */ | |
245 | total_args = 0; | |
246 | for(op = 0; op < NB_OPS; op++) { | |
247 | def = &tcg_op_defs[op]; | |
248 | n = def->nb_iargs + def->nb_oargs; | |
249 | total_args += n; | |
250 | } | |
251 | ||
7267c094 AL |
252 | args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); |
253 | sorted_args = g_malloc(sizeof(int) * total_args); | |
c896fe29 FB |
254 | |
255 | for(op = 0; op < NB_OPS; op++) { | |
256 | def = &tcg_op_defs[op]; | |
257 | def->args_ct = args_ct; | |
258 | def->sorted_args = sorted_args; | |
259 | n = def->nb_iargs + def->nb_oargs; | |
260 | sorted_args += n; | |
261 | args_ct += n; | |
262 | } | |
263 | ||
264 | tcg_target_init(s); | |
9002ec79 | 265 | } |
b03cce8e | 266 | |
9002ec79 RH |
267 | void tcg_prologue_init(TCGContext *s) |
268 | { | |
b03cce8e FB |
269 | /* init global prologue and epilogue */ |
270 | s->code_buf = code_gen_prologue; | |
271 | s->code_ptr = s->code_buf; | |
272 | tcg_target_qemu_prologue(s); | |
2aeabc08 SW |
273 | flush_icache_range((tcg_target_ulong)s->code_buf, |
274 | (tcg_target_ulong)s->code_ptr); | |
c896fe29 FB |
275 | } |
276 | ||
277 | void tcg_set_frame(TCGContext *s, int reg, | |
278 | tcg_target_long start, tcg_target_long size) | |
279 | { | |
280 | s->frame_start = start; | |
281 | s->frame_end = start + size; | |
282 | s->frame_reg = reg; | |
283 | } | |
284 | ||
c896fe29 FB |
285 | void tcg_func_start(TCGContext *s) |
286 | { | |
e8996ee0 | 287 | int i; |
c896fe29 FB |
288 | tcg_pool_reset(s); |
289 | s->nb_temps = s->nb_globals; | |
641d5fbe | 290 | for(i = 0; i < (TCG_TYPE_COUNT * 2); i++) |
e8996ee0 | 291 | s->first_free_temp[i] = -1; |
c896fe29 FB |
292 | s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS); |
293 | s->nb_labels = 0; | |
294 | s->current_frame_offset = s->frame_start; | |
295 | ||
0a209d4b RH |
296 | #ifdef CONFIG_DEBUG_TCG |
297 | s->goto_tb_issue_mask = 0; | |
298 | #endif | |
299 | ||
c896fe29 FB |
300 | gen_opc_ptr = gen_opc_buf; |
301 | gen_opparam_ptr = gen_opparam_buf; | |
b76f0d8c YL |
302 | |
303 | #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU) | |
304 | /* Initialize qemu_ld/st labels to assist code generation at the end of TB | |
305 | for TLB miss cases at the end of TB */ | |
306 | s->qemu_ldst_labels = tcg_malloc(sizeof(TCGLabelQemuLdst) * | |
307 | TCG_MAX_QEMU_LDST); | |
308 | s->nb_qemu_ldst_labels = 0; | |
309 | #endif | |
c896fe29 FB |
310 | } |
311 | ||
312 | static inline void tcg_temp_alloc(TCGContext *s, int n) | |
313 | { | |
314 | if (n > TCG_MAX_TEMPS) | |
315 | tcg_abort(); | |
316 | } | |
317 | ||
a7812ae4 PB |
318 | static inline int tcg_global_reg_new_internal(TCGType type, int reg, |
319 | const char *name) | |
c896fe29 FB |
320 | { |
321 | TCGContext *s = &tcg_ctx; | |
322 | TCGTemp *ts; | |
323 | int idx; | |
324 | ||
325 | #if TCG_TARGET_REG_BITS == 32 | |
326 | if (type != TCG_TYPE_I32) | |
327 | tcg_abort(); | |
328 | #endif | |
329 | if (tcg_regset_test_reg(s->reserved_regs, reg)) | |
330 | tcg_abort(); | |
331 | idx = s->nb_globals; | |
332 | tcg_temp_alloc(s, s->nb_globals + 1); | |
333 | ts = &s->temps[s->nb_globals]; | |
334 | ts->base_type = type; | |
335 | ts->type = type; | |
336 | ts->fixed_reg = 1; | |
337 | ts->reg = reg; | |
c896fe29 FB |
338 | ts->name = name; |
339 | s->nb_globals++; | |
340 | tcg_regset_set_reg(s->reserved_regs, reg); | |
a7812ae4 PB |
341 | return idx; |
342 | } | |
343 | ||
344 | TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) | |
345 | { | |
346 | int idx; | |
347 | ||
348 | idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); | |
349 | return MAKE_TCGV_I32(idx); | |
350 | } | |
351 | ||
352 | TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) | |
353 | { | |
354 | int idx; | |
355 | ||
356 | idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); | |
357 | return MAKE_TCGV_I64(idx); | |
c896fe29 FB |
358 | } |
359 | ||
a7812ae4 PB |
360 | static inline int tcg_global_mem_new_internal(TCGType type, int reg, |
361 | tcg_target_long offset, | |
362 | const char *name) | |
c896fe29 FB |
363 | { |
364 | TCGContext *s = &tcg_ctx; | |
365 | TCGTemp *ts; | |
366 | int idx; | |
367 | ||
368 | idx = s->nb_globals; | |
369 | #if TCG_TARGET_REG_BITS == 32 | |
370 | if (type == TCG_TYPE_I64) { | |
371 | char buf[64]; | |
c588979b | 372 | tcg_temp_alloc(s, s->nb_globals + 2); |
c896fe29 FB |
373 | ts = &s->temps[s->nb_globals]; |
374 | ts->base_type = type; | |
375 | ts->type = TCG_TYPE_I32; | |
376 | ts->fixed_reg = 0; | |
377 | ts->mem_allocated = 1; | |
378 | ts->mem_reg = reg; | |
379 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
380 | ts->mem_offset = offset + 4; | |
381 | #else | |
382 | ts->mem_offset = offset; | |
383 | #endif | |
c896fe29 FB |
384 | pstrcpy(buf, sizeof(buf), name); |
385 | pstrcat(buf, sizeof(buf), "_0"); | |
386 | ts->name = strdup(buf); | |
387 | ts++; | |
388 | ||
389 | ts->base_type = type; | |
390 | ts->type = TCG_TYPE_I32; | |
391 | ts->fixed_reg = 0; | |
392 | ts->mem_allocated = 1; | |
393 | ts->mem_reg = reg; | |
394 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
395 | ts->mem_offset = offset; | |
396 | #else | |
397 | ts->mem_offset = offset + 4; | |
398 | #endif | |
c896fe29 FB |
399 | pstrcpy(buf, sizeof(buf), name); |
400 | pstrcat(buf, sizeof(buf), "_1"); | |
401 | ts->name = strdup(buf); | |
402 | ||
403 | s->nb_globals += 2; | |
404 | } else | |
405 | #endif | |
406 | { | |
407 | tcg_temp_alloc(s, s->nb_globals + 1); | |
408 | ts = &s->temps[s->nb_globals]; | |
409 | ts->base_type = type; | |
410 | ts->type = type; | |
411 | ts->fixed_reg = 0; | |
412 | ts->mem_allocated = 1; | |
413 | ts->mem_reg = reg; | |
414 | ts->mem_offset = offset; | |
c896fe29 FB |
415 | ts->name = name; |
416 | s->nb_globals++; | |
417 | } | |
a7812ae4 PB |
418 | return idx; |
419 | } | |
420 | ||
421 | TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset, | |
422 | const char *name) | |
423 | { | |
424 | int idx; | |
425 | ||
426 | idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); | |
427 | return MAKE_TCGV_I32(idx); | |
428 | } | |
429 | ||
430 | TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset, | |
431 | const char *name) | |
432 | { | |
433 | int idx; | |
434 | ||
435 | idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); | |
436 | return MAKE_TCGV_I64(idx); | |
c896fe29 FB |
437 | } |
438 | ||
a7812ae4 | 439 | static inline int tcg_temp_new_internal(TCGType type, int temp_local) |
c896fe29 FB |
440 | { |
441 | TCGContext *s = &tcg_ctx; | |
442 | TCGTemp *ts; | |
641d5fbe | 443 | int idx, k; |
c896fe29 | 444 | |
641d5fbe FB |
445 | k = type; |
446 | if (temp_local) | |
447 | k += TCG_TYPE_COUNT; | |
448 | idx = s->first_free_temp[k]; | |
e8996ee0 FB |
449 | if (idx != -1) { |
450 | /* There is already an available temp with the | |
451 | right type */ | |
452 | ts = &s->temps[idx]; | |
641d5fbe | 453 | s->first_free_temp[k] = ts->next_free_temp; |
e8996ee0 | 454 | ts->temp_allocated = 1; |
641d5fbe | 455 | assert(ts->temp_local == temp_local); |
e8996ee0 FB |
456 | } else { |
457 | idx = s->nb_temps; | |
c896fe29 | 458 | #if TCG_TARGET_REG_BITS == 32 |
e8996ee0 | 459 | if (type == TCG_TYPE_I64) { |
8df1ca4b | 460 | tcg_temp_alloc(s, s->nb_temps + 2); |
e8996ee0 FB |
461 | ts = &s->temps[s->nb_temps]; |
462 | ts->base_type = type; | |
463 | ts->type = TCG_TYPE_I32; | |
464 | ts->temp_allocated = 1; | |
641d5fbe | 465 | ts->temp_local = temp_local; |
e8996ee0 FB |
466 | ts->name = NULL; |
467 | ts++; | |
468 | ts->base_type = TCG_TYPE_I32; | |
469 | ts->type = TCG_TYPE_I32; | |
470 | ts->temp_allocated = 1; | |
641d5fbe | 471 | ts->temp_local = temp_local; |
e8996ee0 FB |
472 | ts->name = NULL; |
473 | s->nb_temps += 2; | |
474 | } else | |
c896fe29 | 475 | #endif |
e8996ee0 FB |
476 | { |
477 | tcg_temp_alloc(s, s->nb_temps + 1); | |
478 | ts = &s->temps[s->nb_temps]; | |
479 | ts->base_type = type; | |
480 | ts->type = type; | |
481 | ts->temp_allocated = 1; | |
641d5fbe | 482 | ts->temp_local = temp_local; |
e8996ee0 FB |
483 | ts->name = NULL; |
484 | s->nb_temps++; | |
485 | } | |
c896fe29 | 486 | } |
27bfd83c PM |
487 | |
488 | #if defined(CONFIG_DEBUG_TCG) | |
489 | s->temps_in_use++; | |
490 | #endif | |
a7812ae4 | 491 | return idx; |
c896fe29 FB |
492 | } |
493 | ||
a7812ae4 PB |
494 | TCGv_i32 tcg_temp_new_internal_i32(int temp_local) |
495 | { | |
496 | int idx; | |
497 | ||
498 | idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); | |
499 | return MAKE_TCGV_I32(idx); | |
500 | } | |
501 | ||
502 | TCGv_i64 tcg_temp_new_internal_i64(int temp_local) | |
503 | { | |
504 | int idx; | |
505 | ||
506 | idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); | |
507 | return MAKE_TCGV_I64(idx); | |
508 | } | |
509 | ||
510 | static inline void tcg_temp_free_internal(int idx) | |
c896fe29 FB |
511 | { |
512 | TCGContext *s = &tcg_ctx; | |
513 | TCGTemp *ts; | |
641d5fbe | 514 | int k; |
c896fe29 | 515 | |
27bfd83c PM |
516 | #if defined(CONFIG_DEBUG_TCG) |
517 | s->temps_in_use--; | |
518 | if (s->temps_in_use < 0) { | |
519 | fprintf(stderr, "More temporaries freed than allocated!\n"); | |
520 | } | |
521 | #endif | |
522 | ||
e8996ee0 | 523 | assert(idx >= s->nb_globals && idx < s->nb_temps); |
c896fe29 | 524 | ts = &s->temps[idx]; |
e8996ee0 FB |
525 | assert(ts->temp_allocated != 0); |
526 | ts->temp_allocated = 0; | |
641d5fbe FB |
527 | k = ts->base_type; |
528 | if (ts->temp_local) | |
529 | k += TCG_TYPE_COUNT; | |
530 | ts->next_free_temp = s->first_free_temp[k]; | |
531 | s->first_free_temp[k] = idx; | |
c896fe29 FB |
532 | } |
533 | ||
a7812ae4 PB |
534 | void tcg_temp_free_i32(TCGv_i32 arg) |
535 | { | |
536 | tcg_temp_free_internal(GET_TCGV_I32(arg)); | |
537 | } | |
538 | ||
539 | void tcg_temp_free_i64(TCGv_i64 arg) | |
540 | { | |
541 | tcg_temp_free_internal(GET_TCGV_I64(arg)); | |
542 | } | |
e8996ee0 | 543 | |
a7812ae4 | 544 | TCGv_i32 tcg_const_i32(int32_t val) |
c896fe29 | 545 | { |
a7812ae4 PB |
546 | TCGv_i32 t0; |
547 | t0 = tcg_temp_new_i32(); | |
e8996ee0 FB |
548 | tcg_gen_movi_i32(t0, val); |
549 | return t0; | |
550 | } | |
c896fe29 | 551 | |
a7812ae4 | 552 | TCGv_i64 tcg_const_i64(int64_t val) |
e8996ee0 | 553 | { |
a7812ae4 PB |
554 | TCGv_i64 t0; |
555 | t0 = tcg_temp_new_i64(); | |
e8996ee0 FB |
556 | tcg_gen_movi_i64(t0, val); |
557 | return t0; | |
c896fe29 FB |
558 | } |
559 | ||
a7812ae4 | 560 | TCGv_i32 tcg_const_local_i32(int32_t val) |
bdffd4a9 | 561 | { |
a7812ae4 PB |
562 | TCGv_i32 t0; |
563 | t0 = tcg_temp_local_new_i32(); | |
bdffd4a9 AJ |
564 | tcg_gen_movi_i32(t0, val); |
565 | return t0; | |
566 | } | |
567 | ||
a7812ae4 | 568 | TCGv_i64 tcg_const_local_i64(int64_t val) |
bdffd4a9 | 569 | { |
a7812ae4 PB |
570 | TCGv_i64 t0; |
571 | t0 = tcg_temp_local_new_i64(); | |
bdffd4a9 AJ |
572 | tcg_gen_movi_i64(t0, val); |
573 | return t0; | |
574 | } | |
575 | ||
27bfd83c PM |
576 | #if defined(CONFIG_DEBUG_TCG) |
577 | void tcg_clear_temp_count(void) | |
578 | { | |
579 | TCGContext *s = &tcg_ctx; | |
580 | s->temps_in_use = 0; | |
581 | } | |
582 | ||
583 | int tcg_check_temp_count(void) | |
584 | { | |
585 | TCGContext *s = &tcg_ctx; | |
586 | if (s->temps_in_use) { | |
587 | /* Clear the count so that we don't give another | |
588 | * warning immediately next time around. | |
589 | */ | |
590 | s->temps_in_use = 0; | |
591 | return 1; | |
592 | } | |
593 | return 0; | |
594 | } | |
595 | #endif | |
596 | ||
c896fe29 FB |
597 | void tcg_register_helper(void *func, const char *name) |
598 | { | |
599 | TCGContext *s = &tcg_ctx; | |
600 | int n; | |
601 | if ((s->nb_helpers + 1) > s->allocated_helpers) { | |
602 | n = s->allocated_helpers; | |
603 | if (n == 0) { | |
604 | n = 4; | |
605 | } else { | |
606 | n *= 2; | |
607 | } | |
608 | s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo)); | |
609 | s->allocated_helpers = n; | |
610 | } | |
4dc81f28 | 611 | s->helpers[s->nb_helpers].func = (tcg_target_ulong)func; |
c896fe29 FB |
612 | s->helpers[s->nb_helpers].name = name; |
613 | s->nb_helpers++; | |
614 | } | |
615 | ||
39cf05d3 FB |
616 | /* Note: we convert the 64 bit args to 32 bit and do some alignment |
617 | and endian swap. Maybe it would be better to do the alignment | |
618 | and endian swap in tcg_reg_alloc_call(). */ | |
a7812ae4 PB |
619 | void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, |
620 | int sizemask, TCGArg ret, int nargs, TCGArg *args) | |
c896fe29 | 621 | { |
a7812ae4 PB |
622 | int i; |
623 | int real_args; | |
624 | int nb_rets; | |
625 | TCGArg *nparam; | |
2bece2c8 RH |
626 | |
627 | #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 | |
628 | for (i = 0; i < nargs; ++i) { | |
629 | int is_64bit = sizemask & (1 << (i+1)*2); | |
630 | int is_signed = sizemask & (2 << (i+1)*2); | |
631 | if (!is_64bit) { | |
632 | TCGv_i64 temp = tcg_temp_new_i64(); | |
633 | TCGv_i64 orig = MAKE_TCGV_I64(args[i]); | |
634 | if (is_signed) { | |
635 | tcg_gen_ext32s_i64(temp, orig); | |
636 | } else { | |
637 | tcg_gen_ext32u_i64(temp, orig); | |
638 | } | |
639 | args[i] = GET_TCGV_I64(temp); | |
640 | } | |
641 | } | |
642 | #endif /* TCG_TARGET_EXTEND_ARGS */ | |
643 | ||
a7812ae4 PB |
644 | *gen_opc_ptr++ = INDEX_op_call; |
645 | nparam = gen_opparam_ptr++; | |
a7812ae4 PB |
646 | if (ret != TCG_CALL_DUMMY_ARG) { |
647 | #if TCG_TARGET_REG_BITS < 64 | |
648 | if (sizemask & 1) { | |
39cf05d3 | 649 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
a7812ae4 PB |
650 | *gen_opparam_ptr++ = ret + 1; |
651 | *gen_opparam_ptr++ = ret; | |
39cf05d3 | 652 | #else |
a7812ae4 PB |
653 | *gen_opparam_ptr++ = ret; |
654 | *gen_opparam_ptr++ = ret + 1; | |
39cf05d3 | 655 | #endif |
a7812ae4 PB |
656 | nb_rets = 2; |
657 | } else | |
658 | #endif | |
659 | { | |
660 | *gen_opparam_ptr++ = ret; | |
661 | nb_rets = 1; | |
c896fe29 | 662 | } |
a7812ae4 PB |
663 | } else { |
664 | nb_rets = 0; | |
c896fe29 | 665 | } |
a7812ae4 PB |
666 | real_args = 0; |
667 | for (i = 0; i < nargs; i++) { | |
668 | #if TCG_TARGET_REG_BITS < 64 | |
2bece2c8 RH |
669 | int is_64bit = sizemask & (1 << (i+1)*2); |
670 | if (is_64bit) { | |
39cf05d3 FB |
671 | #ifdef TCG_TARGET_CALL_ALIGN_ARGS |
672 | /* some targets want aligned 64 bit args */ | |
ebd486d5 | 673 | if (real_args & 1) { |
a7812ae4 | 674 | *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG; |
ebd486d5 | 675 | real_args++; |
39cf05d3 FB |
676 | } |
677 | #endif | |
3f90f252 RH |
678 | /* If stack grows up, then we will be placing successive |
679 | arguments at lower addresses, which means we need to | |
680 | reverse the order compared to how we would normally | |
681 | treat either big or little-endian. For those arguments | |
682 | that will wind up in registers, this still works for | |
683 | HPPA (the only current STACK_GROWSUP target) since the | |
684 | argument registers are *also* allocated in decreasing | |
685 | order. If another such target is added, this logic may | |
686 | have to get more complicated to differentiate between | |
687 | stack arguments and register arguments. */ | |
688 | #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) | |
a7812ae4 PB |
689 | *gen_opparam_ptr++ = args[i] + 1; |
690 | *gen_opparam_ptr++ = args[i]; | |
c896fe29 | 691 | #else |
a7812ae4 PB |
692 | *gen_opparam_ptr++ = args[i]; |
693 | *gen_opparam_ptr++ = args[i] + 1; | |
c896fe29 | 694 | #endif |
a7812ae4 | 695 | real_args += 2; |
2bece2c8 | 696 | continue; |
c896fe29 | 697 | } |
2bece2c8 RH |
698 | #endif /* TCG_TARGET_REG_BITS < 64 */ |
699 | ||
700 | *gen_opparam_ptr++ = args[i]; | |
701 | real_args++; | |
c896fe29 | 702 | } |
a7812ae4 PB |
703 | *gen_opparam_ptr++ = GET_TCGV_PTR(func); |
704 | ||
705 | *gen_opparam_ptr++ = flags; | |
706 | ||
707 | *nparam = (nb_rets << 16) | (real_args + 1); | |
708 | ||
709 | /* total parameters, needed to go backward in the instruction stream */ | |
710 | *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3; | |
2bece2c8 RH |
711 | |
712 | #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 | |
713 | for (i = 0; i < nargs; ++i) { | |
714 | int is_64bit = sizemask & (1 << (i+1)*2); | |
715 | if (!is_64bit) { | |
716 | TCGv_i64 temp = MAKE_TCGV_I64(args[i]); | |
717 | tcg_temp_free_i64(temp); | |
718 | } | |
719 | } | |
720 | #endif /* TCG_TARGET_EXTEND_ARGS */ | |
c896fe29 | 721 | } |
c896fe29 | 722 | |
ac56dd48 | 723 | #if TCG_TARGET_REG_BITS == 32 |
a7812ae4 | 724 | void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, |
c896fe29 FB |
725 | int c, int right, int arith) |
726 | { | |
cf60bce4 | 727 | if (c == 0) { |
a7812ae4 | 728 | tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); |
cf60bce4 FB |
729 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1)); |
730 | } else if (c >= 32) { | |
c896fe29 FB |
731 | c -= 32; |
732 | if (right) { | |
733 | if (arith) { | |
a7812ae4 | 734 | tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); |
ac56dd48 | 735 | tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31); |
c896fe29 | 736 | } else { |
a7812ae4 | 737 | tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); |
ac56dd48 | 738 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
739 | } |
740 | } else { | |
a7812ae4 PB |
741 | tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); |
742 | tcg_gen_movi_i32(TCGV_LOW(ret), 0); | |
c896fe29 FB |
743 | } |
744 | } else { | |
a7812ae4 | 745 | TCGv_i32 t0, t1; |
c896fe29 | 746 | |
a7812ae4 PB |
747 | t0 = tcg_temp_new_i32(); |
748 | t1 = tcg_temp_new_i32(); | |
c896fe29 | 749 | if (right) { |
ac56dd48 | 750 | tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); |
c896fe29 | 751 | if (arith) |
ac56dd48 | 752 | tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); |
a7812ae4 | 753 | else |
ac56dd48 | 754 | tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); |
a7812ae4 PB |
755 | tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); |
756 | tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); | |
ac56dd48 | 757 | tcg_gen_mov_i32(TCGV_HIGH(ret), t1); |
c896fe29 | 758 | } else { |
a7812ae4 | 759 | tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); |
c896fe29 | 760 | /* Note: ret can be the same as arg1, so we use t1 */ |
a7812ae4 | 761 | tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); |
ac56dd48 PB |
762 | tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); |
763 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); | |
a7812ae4 | 764 | tcg_gen_mov_i32(TCGV_LOW(ret), t1); |
c896fe29 | 765 | } |
a7812ae4 PB |
766 | tcg_temp_free_i32(t0); |
767 | tcg_temp_free_i32(t1); | |
c896fe29 FB |
768 | } |
769 | } | |
ac56dd48 | 770 | #endif |
c896fe29 | 771 | |
be210acb | 772 | |
8fcd3692 | 773 | static void tcg_reg_alloc_start(TCGContext *s) |
c896fe29 FB |
774 | { |
775 | int i; | |
776 | TCGTemp *ts; | |
777 | for(i = 0; i < s->nb_globals; i++) { | |
778 | ts = &s->temps[i]; | |
779 | if (ts->fixed_reg) { | |
780 | ts->val_type = TEMP_VAL_REG; | |
781 | } else { | |
782 | ts->val_type = TEMP_VAL_MEM; | |
783 | } | |
784 | } | |
e8996ee0 FB |
785 | for(i = s->nb_globals; i < s->nb_temps; i++) { |
786 | ts = &s->temps[i]; | |
7dfd8c6a AJ |
787 | if (ts->temp_local) { |
788 | ts->val_type = TEMP_VAL_MEM; | |
789 | } else { | |
790 | ts->val_type = TEMP_VAL_DEAD; | |
791 | } | |
e8996ee0 FB |
792 | ts->mem_allocated = 0; |
793 | ts->fixed_reg = 0; | |
794 | } | |
c896fe29 FB |
795 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { |
796 | s->reg_to_temp[i] = -1; | |
797 | } | |
798 | } | |
799 | ||
ac56dd48 PB |
800 | static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, |
801 | int idx) | |
c896fe29 FB |
802 | { |
803 | TCGTemp *ts; | |
ac56dd48 | 804 | |
7f6f0ae5 | 805 | assert(idx >= 0 && idx < s->nb_temps); |
ac56dd48 | 806 | ts = &s->temps[idx]; |
7f6f0ae5 | 807 | assert(ts); |
ac56dd48 PB |
808 | if (idx < s->nb_globals) { |
809 | pstrcpy(buf, buf_size, ts->name); | |
c896fe29 | 810 | } else { |
641d5fbe FB |
811 | if (ts->temp_local) |
812 | snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); | |
813 | else | |
814 | snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); | |
c896fe29 FB |
815 | } |
816 | return buf; | |
817 | } | |
818 | ||
a7812ae4 PB |
819 | char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) |
820 | { | |
821 | return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); | |
822 | } | |
823 | ||
824 | char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) | |
ac56dd48 | 825 | { |
a810a2de | 826 | return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); |
ac56dd48 PB |
827 | } |
828 | ||
e8996ee0 | 829 | static int helper_cmp(const void *p1, const void *p2) |
4dc81f28 | 830 | { |
e8996ee0 FB |
831 | const TCGHelperInfo *th1 = p1; |
832 | const TCGHelperInfo *th2 = p2; | |
833 | if (th1->func < th2->func) | |
834 | return -1; | |
835 | else if (th1->func == th2->func) | |
836 | return 0; | |
837 | else | |
838 | return 1; | |
4dc81f28 FB |
839 | } |
840 | ||
e8996ee0 FB |
841 | /* find helper definition (Note: A hash table would be better) */ |
842 | static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val) | |
4dc81f28 | 843 | { |
e8996ee0 | 844 | int m, m_min, m_max; |
4dc81f28 | 845 | TCGHelperInfo *th; |
e8996ee0 | 846 | tcg_target_ulong v; |
4dc81f28 | 847 | |
e8996ee0 FB |
848 | if (unlikely(!s->helpers_sorted)) { |
849 | qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), | |
850 | helper_cmp); | |
851 | s->helpers_sorted = 1; | |
852 | } | |
853 | ||
854 | /* binary search */ | |
855 | m_min = 0; | |
856 | m_max = s->nb_helpers - 1; | |
857 | while (m_min <= m_max) { | |
858 | m = (m_min + m_max) >> 1; | |
859 | th = &s->helpers[m]; | |
860 | v = th->func; | |
861 | if (v == val) | |
862 | return th; | |
863 | else if (val < v) { | |
864 | m_max = m - 1; | |
865 | } else { | |
866 | m_min = m + 1; | |
4dc81f28 FB |
867 | } |
868 | } | |
e8996ee0 | 869 | return NULL; |
4dc81f28 FB |
870 | } |
871 | ||
f48f3ede BS |
872 | static const char * const cond_name[] = |
873 | { | |
0aed257f RH |
874 | [TCG_COND_NEVER] = "never", |
875 | [TCG_COND_ALWAYS] = "always", | |
f48f3ede BS |
876 | [TCG_COND_EQ] = "eq", |
877 | [TCG_COND_NE] = "ne", | |
878 | [TCG_COND_LT] = "lt", | |
879 | [TCG_COND_GE] = "ge", | |
880 | [TCG_COND_LE] = "le", | |
881 | [TCG_COND_GT] = "gt", | |
882 | [TCG_COND_LTU] = "ltu", | |
883 | [TCG_COND_GEU] = "geu", | |
884 | [TCG_COND_LEU] = "leu", | |
885 | [TCG_COND_GTU] = "gtu" | |
886 | }; | |
887 | ||
eeacee4d | 888 | void tcg_dump_ops(TCGContext *s) |
c896fe29 FB |
889 | { |
890 | const uint16_t *opc_ptr; | |
891 | const TCGArg *args; | |
892 | TCGArg arg; | |
a9751609 RH |
893 | TCGOpcode c; |
894 | int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn; | |
c896fe29 FB |
895 | const TCGOpDef *def; |
896 | char buf[128]; | |
897 | ||
7e4597d7 | 898 | first_insn = 1; |
c896fe29 FB |
899 | opc_ptr = gen_opc_buf; |
900 | args = gen_opparam_buf; | |
901 | while (opc_ptr < gen_opc_ptr) { | |
902 | c = *opc_ptr++; | |
903 | def = &tcg_op_defs[c]; | |
7e4597d7 FB |
904 | if (c == INDEX_op_debug_insn_start) { |
905 | uint64_t pc; | |
906 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS | |
907 | pc = ((uint64_t)args[1] << 32) | args[0]; | |
908 | #else | |
909 | pc = args[0]; | |
910 | #endif | |
eeacee4d BS |
911 | if (!first_insn) { |
912 | qemu_log("\n"); | |
913 | } | |
914 | qemu_log(" ---- 0x%" PRIx64, pc); | |
7e4597d7 FB |
915 | first_insn = 0; |
916 | nb_oargs = def->nb_oargs; | |
917 | nb_iargs = def->nb_iargs; | |
918 | nb_cargs = def->nb_cargs; | |
919 | } else if (c == INDEX_op_call) { | |
c896fe29 | 920 | TCGArg arg; |
4dc81f28 | 921 | |
c896fe29 FB |
922 | /* variable number of arguments */ |
923 | arg = *args++; | |
924 | nb_oargs = arg >> 16; | |
925 | nb_iargs = arg & 0xffff; | |
926 | nb_cargs = def->nb_cargs; | |
c896fe29 | 927 | |
eeacee4d | 928 | qemu_log(" %s ", def->name); |
7e4597d7 | 929 | |
b03cce8e | 930 | /* function name */ |
eeacee4d BS |
931 | qemu_log("%s", |
932 | tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
933 | args[nb_oargs + nb_iargs - 1])); | |
b03cce8e | 934 | /* flags */ |
eeacee4d | 935 | qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]); |
b03cce8e | 936 | /* nb out args */ |
eeacee4d | 937 | qemu_log(",$%d", nb_oargs); |
b03cce8e | 938 | for(i = 0; i < nb_oargs; i++) { |
eeacee4d BS |
939 | qemu_log(","); |
940 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
941 | args[i])); | |
b03cce8e FB |
942 | } |
943 | for(i = 0; i < (nb_iargs - 1); i++) { | |
eeacee4d | 944 | qemu_log(","); |
39cf05d3 | 945 | if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) { |
eeacee4d | 946 | qemu_log("<dummy>"); |
39cf05d3 | 947 | } else { |
eeacee4d BS |
948 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), |
949 | args[nb_oargs + i])); | |
39cf05d3 | 950 | } |
b03cce8e | 951 | } |
fba3161f | 952 | } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) { |
e8996ee0 FB |
953 | tcg_target_ulong val; |
954 | TCGHelperInfo *th; | |
955 | ||
956 | nb_oargs = def->nb_oargs; | |
957 | nb_iargs = def->nb_iargs; | |
958 | nb_cargs = def->nb_cargs; | |
eeacee4d BS |
959 | qemu_log(" %s %s,$", def->name, |
960 | tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0])); | |
e8996ee0 FB |
961 | val = args[1]; |
962 | th = tcg_find_helper(s, val); | |
963 | if (th) { | |
eeacee4d | 964 | qemu_log("%s", th->name); |
e8996ee0 | 965 | } else { |
eeacee4d BS |
966 | if (c == INDEX_op_movi_i32) { |
967 | qemu_log("0x%x", (uint32_t)val); | |
968 | } else { | |
969 | qemu_log("0x%" PRIx64 , (uint64_t)val); | |
970 | } | |
e8996ee0 | 971 | } |
b03cce8e | 972 | } else { |
eeacee4d | 973 | qemu_log(" %s ", def->name); |
b03cce8e FB |
974 | if (c == INDEX_op_nopn) { |
975 | /* variable number of arguments */ | |
976 | nb_cargs = *args; | |
977 | nb_oargs = 0; | |
978 | nb_iargs = 0; | |
979 | } else { | |
980 | nb_oargs = def->nb_oargs; | |
981 | nb_iargs = def->nb_iargs; | |
982 | nb_cargs = def->nb_cargs; | |
983 | } | |
984 | ||
985 | k = 0; | |
986 | for(i = 0; i < nb_oargs; i++) { | |
eeacee4d BS |
987 | if (k != 0) { |
988 | qemu_log(","); | |
989 | } | |
990 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
991 | args[k++])); | |
b03cce8e FB |
992 | } |
993 | for(i = 0; i < nb_iargs; i++) { | |
eeacee4d BS |
994 | if (k != 0) { |
995 | qemu_log(","); | |
996 | } | |
997 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
998 | args[k++])); | |
b03cce8e | 999 | } |
be210acb RH |
1000 | switch (c) { |
1001 | case INDEX_op_brcond_i32: | |
be210acb | 1002 | case INDEX_op_setcond_i32: |
ffc5ea09 | 1003 | case INDEX_op_movcond_i32: |
ffc5ea09 | 1004 | case INDEX_op_brcond2_i32: |
be210acb | 1005 | case INDEX_op_setcond2_i32: |
ffc5ea09 | 1006 | case INDEX_op_brcond_i64: |
be210acb | 1007 | case INDEX_op_setcond_i64: |
ffc5ea09 | 1008 | case INDEX_op_movcond_i64: |
eeacee4d BS |
1009 | if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { |
1010 | qemu_log(",%s", cond_name[args[k++]]); | |
1011 | } else { | |
1012 | qemu_log(",$0x%" TCG_PRIlx, args[k++]); | |
1013 | } | |
f48f3ede | 1014 | i = 1; |
be210acb RH |
1015 | break; |
1016 | default: | |
f48f3ede | 1017 | i = 0; |
be210acb RH |
1018 | break; |
1019 | } | |
f48f3ede | 1020 | for(; i < nb_cargs; i++) { |
eeacee4d BS |
1021 | if (k != 0) { |
1022 | qemu_log(","); | |
1023 | } | |
b03cce8e | 1024 | arg = args[k++]; |
eeacee4d | 1025 | qemu_log("$0x%" TCG_PRIlx, arg); |
b03cce8e | 1026 | } |
c896fe29 | 1027 | } |
eeacee4d | 1028 | qemu_log("\n"); |
c896fe29 FB |
1029 | args += nb_iargs + nb_oargs + nb_cargs; |
1030 | } | |
1031 | } | |
1032 | ||
1033 | /* we give more priority to constraints with less registers */ | |
1034 | static int get_constraint_priority(const TCGOpDef *def, int k) | |
1035 | { | |
1036 | const TCGArgConstraint *arg_ct; | |
1037 | ||
1038 | int i, n; | |
1039 | arg_ct = &def->args_ct[k]; | |
1040 | if (arg_ct->ct & TCG_CT_ALIAS) { | |
1041 | /* an alias is equivalent to a single register */ | |
1042 | n = 1; | |
1043 | } else { | |
1044 | if (!(arg_ct->ct & TCG_CT_REG)) | |
1045 | return 0; | |
1046 | n = 0; | |
1047 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { | |
1048 | if (tcg_regset_test_reg(arg_ct->u.regs, i)) | |
1049 | n++; | |
1050 | } | |
1051 | } | |
1052 | return TCG_TARGET_NB_REGS - n + 1; | |
1053 | } | |
1054 | ||
1055 | /* sort from highest priority to lowest */ | |
1056 | static void sort_constraints(TCGOpDef *def, int start, int n) | |
1057 | { | |
1058 | int i, j, p1, p2, tmp; | |
1059 | ||
1060 | for(i = 0; i < n; i++) | |
1061 | def->sorted_args[start + i] = start + i; | |
1062 | if (n <= 1) | |
1063 | return; | |
1064 | for(i = 0; i < n - 1; i++) { | |
1065 | for(j = i + 1; j < n; j++) { | |
1066 | p1 = get_constraint_priority(def, def->sorted_args[start + i]); | |
1067 | p2 = get_constraint_priority(def, def->sorted_args[start + j]); | |
1068 | if (p1 < p2) { | |
1069 | tmp = def->sorted_args[start + i]; | |
1070 | def->sorted_args[start + i] = def->sorted_args[start + j]; | |
1071 | def->sorted_args[start + j] = tmp; | |
1072 | } | |
1073 | } | |
1074 | } | |
1075 | } | |
1076 | ||
1077 | void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) | |
1078 | { | |
a9751609 | 1079 | TCGOpcode op; |
c896fe29 FB |
1080 | TCGOpDef *def; |
1081 | const char *ct_str; | |
1082 | int i, nb_args; | |
1083 | ||
1084 | for(;;) { | |
a9751609 | 1085 | if (tdefs->op == (TCGOpcode)-1) |
c896fe29 FB |
1086 | break; |
1087 | op = tdefs->op; | |
c3b08d0e | 1088 | assert((unsigned)op < NB_OPS); |
c896fe29 | 1089 | def = &tcg_op_defs[op]; |
c68aaa18 SW |
1090 | #if defined(CONFIG_DEBUG_TCG) |
1091 | /* Duplicate entry in op definitions? */ | |
1092 | assert(!def->used); | |
1093 | def->used = 1; | |
1094 | #endif | |
c896fe29 FB |
1095 | nb_args = def->nb_iargs + def->nb_oargs; |
1096 | for(i = 0; i < nb_args; i++) { | |
1097 | ct_str = tdefs->args_ct_str[i]; | |
c68aaa18 SW |
1098 | /* Incomplete TCGTargetOpDef entry? */ |
1099 | assert(ct_str != NULL); | |
c896fe29 FB |
1100 | tcg_regset_clear(def->args_ct[i].u.regs); |
1101 | def->args_ct[i].ct = 0; | |
1102 | if (ct_str[0] >= '0' && ct_str[0] <= '9') { | |
1103 | int oarg; | |
1104 | oarg = ct_str[0] - '0'; | |
1105 | assert(oarg < def->nb_oargs); | |
1106 | assert(def->args_ct[oarg].ct & TCG_CT_REG); | |
1107 | /* TCG_CT_ALIAS is for the output arguments. The input | |
5ff9d6a4 | 1108 | argument is tagged with TCG_CT_IALIAS. */ |
c896fe29 | 1109 | def->args_ct[i] = def->args_ct[oarg]; |
5ff9d6a4 FB |
1110 | def->args_ct[oarg].ct = TCG_CT_ALIAS; |
1111 | def->args_ct[oarg].alias_index = i; | |
c896fe29 | 1112 | def->args_ct[i].ct |= TCG_CT_IALIAS; |
5ff9d6a4 | 1113 | def->args_ct[i].alias_index = oarg; |
c896fe29 FB |
1114 | } else { |
1115 | for(;;) { | |
1116 | if (*ct_str == '\0') | |
1117 | break; | |
1118 | switch(*ct_str) { | |
1119 | case 'i': | |
1120 | def->args_ct[i].ct |= TCG_CT_CONST; | |
1121 | ct_str++; | |
1122 | break; | |
1123 | default: | |
1124 | if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { | |
1125 | fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", | |
1126 | ct_str, i, def->name); | |
1127 | exit(1); | |
1128 | } | |
1129 | } | |
1130 | } | |
1131 | } | |
1132 | } | |
1133 | ||
c68aaa18 SW |
1134 | /* TCGTargetOpDef entry with too much information? */ |
1135 | assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); | |
1136 | ||
c896fe29 FB |
1137 | /* sort the constraints (XXX: this is just an heuristic) */ |
1138 | sort_constraints(def, 0, def->nb_oargs); | |
1139 | sort_constraints(def, def->nb_oargs, def->nb_iargs); | |
1140 | ||
1141 | #if 0 | |
1142 | { | |
1143 | int i; | |
1144 | ||
1145 | printf("%s: sorted=", def->name); | |
1146 | for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) | |
1147 | printf(" %d", def->sorted_args[i]); | |
1148 | printf("\n"); | |
1149 | } | |
1150 | #endif | |
1151 | tdefs++; | |
1152 | } | |
1153 | ||
c68aaa18 | 1154 | #if defined(CONFIG_DEBUG_TCG) |
a9751609 | 1155 | i = 0; |
c68aaa18 | 1156 | for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { |
f412c762 RH |
1157 | const TCGOpDef *def = &tcg_op_defs[op]; |
1158 | if (op < INDEX_op_call | |
1159 | || op == INDEX_op_debug_insn_start | |
1160 | || (def->flags & TCG_OPF_NOT_PRESENT)) { | |
c68aaa18 | 1161 | /* Wrong entry in op definitions? */ |
f412c762 RH |
1162 | if (def->used) { |
1163 | fprintf(stderr, "Invalid op definition for %s\n", def->name); | |
a9751609 RH |
1164 | i = 1; |
1165 | } | |
c68aaa18 SW |
1166 | } else { |
1167 | /* Missing entry in op definitions? */ | |
f412c762 RH |
1168 | if (!def->used) { |
1169 | fprintf(stderr, "Missing op definition for %s\n", def->name); | |
a9751609 RH |
1170 | i = 1; |
1171 | } | |
c68aaa18 SW |
1172 | } |
1173 | } | |
a9751609 RH |
1174 | if (i == 1) { |
1175 | tcg_abort(); | |
1176 | } | |
c68aaa18 | 1177 | #endif |
c896fe29 FB |
1178 | } |
1179 | ||
1180 | #ifdef USE_LIVENESS_ANALYSIS | |
1181 | ||
1182 | /* set a nop for an operation using 'nb_args' */ | |
1183 | static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, | |
1184 | TCGArg *args, int nb_args) | |
1185 | { | |
1186 | if (nb_args == 0) { | |
1187 | *opc_ptr = INDEX_op_nop; | |
1188 | } else { | |
1189 | *opc_ptr = INDEX_op_nopn; | |
1190 | args[0] = nb_args; | |
1191 | args[nb_args - 1] = nb_args; | |
1192 | } | |
1193 | } | |
1194 | ||
9c43b68d AJ |
1195 | /* liveness analysis: end of function: all temps are dead, and globals |
1196 | should be in memory. */ | |
1197 | static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps, | |
1198 | uint8_t *mem_temps) | |
c896fe29 | 1199 | { |
9c43b68d AJ |
1200 | memset(dead_temps, 1, s->nb_temps); |
1201 | memset(mem_temps, 1, s->nb_globals); | |
1202 | memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals); | |
c896fe29 FB |
1203 | } |
1204 | ||
9c43b68d AJ |
1205 | /* liveness analysis: end of basic block: all temps are dead, globals |
1206 | and local temps should be in memory. */ | |
1207 | static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps, | |
1208 | uint8_t *mem_temps) | |
641d5fbe FB |
1209 | { |
1210 | int i; | |
641d5fbe | 1211 | |
9c43b68d AJ |
1212 | memset(dead_temps, 1, s->nb_temps); |
1213 | memset(mem_temps, 1, s->nb_globals); | |
641d5fbe | 1214 | for(i = s->nb_globals; i < s->nb_temps; i++) { |
9c43b68d | 1215 | mem_temps[i] = s->temps[i].temp_local; |
641d5fbe FB |
1216 | } |
1217 | } | |
1218 | ||
866cb6cb | 1219 | /* Liveness analysis : update the opc_dead_args array to tell if a |
c896fe29 FB |
1220 | given input arguments is dead. Instructions updating dead |
1221 | temporaries are removed. */ | |
8fcd3692 | 1222 | static void tcg_liveness_analysis(TCGContext *s) |
c896fe29 | 1223 | { |
a9751609 RH |
1224 | int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops; |
1225 | TCGOpcode op; | |
c896fe29 FB |
1226 | TCGArg *args; |
1227 | const TCGOpDef *def; | |
9c43b68d | 1228 | uint8_t *dead_temps, *mem_temps; |
ec7a869d AJ |
1229 | uint16_t dead_args; |
1230 | uint8_t sync_args; | |
c896fe29 FB |
1231 | |
1232 | gen_opc_ptr++; /* skip end */ | |
1233 | ||
1234 | nb_ops = gen_opc_ptr - gen_opc_buf; | |
1235 | ||
866cb6cb | 1236 | s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); |
ec7a869d | 1237 | s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); |
c896fe29 FB |
1238 | |
1239 | dead_temps = tcg_malloc(s->nb_temps); | |
9c43b68d AJ |
1240 | mem_temps = tcg_malloc(s->nb_temps); |
1241 | tcg_la_func_end(s, dead_temps, mem_temps); | |
c896fe29 FB |
1242 | |
1243 | args = gen_opparam_ptr; | |
1244 | op_index = nb_ops - 1; | |
1245 | while (op_index >= 0) { | |
1246 | op = gen_opc_buf[op_index]; | |
1247 | def = &tcg_op_defs[op]; | |
1248 | switch(op) { | |
1249 | case INDEX_op_call: | |
c6e113f5 FB |
1250 | { |
1251 | int call_flags; | |
c896fe29 | 1252 | |
c6e113f5 FB |
1253 | nb_args = args[-1]; |
1254 | args -= nb_args; | |
1255 | nb_iargs = args[0] & 0xffff; | |
1256 | nb_oargs = args[0] >> 16; | |
1257 | args++; | |
1258 | call_flags = args[nb_oargs + nb_iargs]; | |
1259 | ||
1260 | /* pure functions can be removed if their result is not | |
1261 | used */ | |
78505279 | 1262 | if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { |
c6e113f5 FB |
1263 | for(i = 0; i < nb_oargs; i++) { |
1264 | arg = args[i]; | |
9c43b68d | 1265 | if (!dead_temps[arg] || mem_temps[arg]) { |
c6e113f5 | 1266 | goto do_not_remove_call; |
9c43b68d | 1267 | } |
c6e113f5 FB |
1268 | } |
1269 | tcg_set_nop(s, gen_opc_buf + op_index, | |
1270 | args - 1, nb_args); | |
1271 | } else { | |
1272 | do_not_remove_call: | |
c896fe29 | 1273 | |
c6e113f5 | 1274 | /* output args are dead */ |
6b64b624 | 1275 | dead_args = 0; |
ec7a869d | 1276 | sync_args = 0; |
c6e113f5 FB |
1277 | for(i = 0; i < nb_oargs; i++) { |
1278 | arg = args[i]; | |
6b64b624 AJ |
1279 | if (dead_temps[arg]) { |
1280 | dead_args |= (1 << i); | |
1281 | } | |
9c43b68d AJ |
1282 | if (mem_temps[arg]) { |
1283 | sync_args |= (1 << i); | |
1284 | } | |
c6e113f5 | 1285 | dead_temps[arg] = 1; |
9c43b68d | 1286 | mem_temps[arg] = 0; |
c6e113f5 | 1287 | } |
78505279 AJ |
1288 | |
1289 | if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { | |
1290 | /* globals should be synced to memory */ | |
1291 | memset(mem_temps, 1, s->nb_globals); | |
1292 | } | |
1293 | if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | | |
1294 | TCG_CALL_NO_READ_GLOBALS))) { | |
9c43b68d AJ |
1295 | /* globals should go back to memory */ |
1296 | memset(dead_temps, 1, s->nb_globals); | |
b9c18f56 AJ |
1297 | } |
1298 | ||
c6e113f5 | 1299 | /* input args are live */ |
866cb6cb AJ |
1300 | for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { |
1301 | arg = args[i]; | |
39cf05d3 FB |
1302 | if (arg != TCG_CALL_DUMMY_ARG) { |
1303 | if (dead_temps[arg]) { | |
866cb6cb | 1304 | dead_args |= (1 << i); |
39cf05d3 FB |
1305 | } |
1306 | dead_temps[arg] = 0; | |
c6e113f5 | 1307 | } |
c6e113f5 | 1308 | } |
866cb6cb | 1309 | s->op_dead_args[op_index] = dead_args; |
ec7a869d | 1310 | s->op_sync_args[op_index] = sync_args; |
c896fe29 | 1311 | } |
c6e113f5 | 1312 | args--; |
c896fe29 | 1313 | } |
c896fe29 | 1314 | break; |
7e4597d7 FB |
1315 | case INDEX_op_debug_insn_start: |
1316 | args -= def->nb_args; | |
1317 | break; | |
c896fe29 FB |
1318 | case INDEX_op_nopn: |
1319 | nb_args = args[-1]; | |
1320 | args -= nb_args; | |
1321 | break; | |
5ff9d6a4 FB |
1322 | case INDEX_op_discard: |
1323 | args--; | |
1324 | /* mark the temporary as dead */ | |
1325 | dead_temps[args[0]] = 1; | |
9c43b68d | 1326 | mem_temps[args[0]] = 0; |
5ff9d6a4 | 1327 | break; |
c896fe29 FB |
1328 | case INDEX_op_end: |
1329 | break; | |
1305c451 RH |
1330 | |
1331 | case INDEX_op_add2_i32: | |
1332 | case INDEX_op_sub2_i32: | |
1333 | args -= 6; | |
1334 | nb_iargs = 4; | |
1335 | nb_oargs = 2; | |
1336 | /* Test if the high part of the operation is dead, but not | |
1337 | the low part. The result can be optimized to a simple | |
1338 | add or sub. This happens often for x86_64 guest when the | |
1339 | cpu mode is set to 32 bit. */ | |
b3a1be87 AJ |
1340 | if (dead_temps[args[1]] && !mem_temps[1]) { |
1341 | if (dead_temps[args[0]] && !mem_temps[0]) { | |
1305c451 RH |
1342 | goto do_remove; |
1343 | } | |
1344 | /* Create the single operation plus nop. */ | |
1345 | if (op == INDEX_op_add2_i32) { | |
1346 | op = INDEX_op_add_i32; | |
1347 | } else { | |
1348 | op = INDEX_op_sub_i32; | |
1349 | } | |
1350 | gen_opc_buf[op_index] = op; | |
1351 | args[1] = args[2]; | |
1352 | args[2] = args[4]; | |
1353 | assert(gen_opc_buf[op_index + 1] == INDEX_op_nop); | |
1354 | tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 3); | |
1355 | /* Fall through and mark the single-word operation live. */ | |
1356 | nb_iargs = 2; | |
1357 | nb_oargs = 1; | |
1358 | } | |
1359 | goto do_not_remove; | |
1360 | ||
1414968a RH |
1361 | case INDEX_op_mulu2_i32: |
1362 | args -= 4; | |
1363 | nb_iargs = 2; | |
1364 | nb_oargs = 2; | |
1365 | /* Likewise, test for the high part of the operation dead. */ | |
b3a1be87 AJ |
1366 | if (dead_temps[args[1]] && !mem_temps[1]) { |
1367 | if (dead_temps[args[0]] && !mem_temps[0]) { | |
1414968a RH |
1368 | goto do_remove; |
1369 | } | |
1370 | gen_opc_buf[op_index] = op = INDEX_op_mul_i32; | |
1371 | args[1] = args[2]; | |
1372 | args[2] = args[3]; | |
1373 | assert(gen_opc_buf[op_index + 1] == INDEX_op_nop); | |
1374 | tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 1); | |
1375 | /* Fall through and mark the single-word operation live. */ | |
1376 | nb_oargs = 1; | |
1377 | } | |
1378 | goto do_not_remove; | |
1379 | ||
c896fe29 | 1380 | default: |
1305c451 | 1381 | /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ |
49516bc0 AJ |
1382 | args -= def->nb_args; |
1383 | nb_iargs = def->nb_iargs; | |
1384 | nb_oargs = def->nb_oargs; | |
c896fe29 | 1385 | |
49516bc0 AJ |
1386 | /* Test if the operation can be removed because all |
1387 | its outputs are dead. We assume that nb_oargs == 0 | |
1388 | implies side effects */ | |
1389 | if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { | |
1390 | for(i = 0; i < nb_oargs; i++) { | |
1391 | arg = args[i]; | |
9c43b68d | 1392 | if (!dead_temps[arg] || mem_temps[arg]) { |
49516bc0 | 1393 | goto do_not_remove; |
9c43b68d | 1394 | } |
49516bc0 | 1395 | } |
1305c451 | 1396 | do_remove: |
49516bc0 | 1397 | tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args); |
c896fe29 | 1398 | #ifdef CONFIG_PROFILER |
49516bc0 | 1399 | s->del_op_count++; |
c896fe29 | 1400 | #endif |
49516bc0 AJ |
1401 | } else { |
1402 | do_not_remove: | |
c896fe29 | 1403 | |
49516bc0 | 1404 | /* output args are dead */ |
6b64b624 | 1405 | dead_args = 0; |
ec7a869d | 1406 | sync_args = 0; |
49516bc0 AJ |
1407 | for(i = 0; i < nb_oargs; i++) { |
1408 | arg = args[i]; | |
6b64b624 AJ |
1409 | if (dead_temps[arg]) { |
1410 | dead_args |= (1 << i); | |
1411 | } | |
9c43b68d AJ |
1412 | if (mem_temps[arg]) { |
1413 | sync_args |= (1 << i); | |
1414 | } | |
49516bc0 | 1415 | dead_temps[arg] = 1; |
9c43b68d | 1416 | mem_temps[arg] = 0; |
49516bc0 AJ |
1417 | } |
1418 | ||
1419 | /* if end of basic block, update */ | |
1420 | if (def->flags & TCG_OPF_BB_END) { | |
9c43b68d | 1421 | tcg_la_bb_end(s, dead_temps, mem_temps); |
3d5c5f87 AJ |
1422 | } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { |
1423 | /* globals should be synced to memory */ | |
9c43b68d | 1424 | memset(mem_temps, 1, s->nb_globals); |
49516bc0 AJ |
1425 | } |
1426 | ||
1427 | /* input args are live */ | |
866cb6cb AJ |
1428 | for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) { |
1429 | arg = args[i]; | |
49516bc0 | 1430 | if (dead_temps[arg]) { |
866cb6cb | 1431 | dead_args |= (1 << i); |
c896fe29 | 1432 | } |
49516bc0 | 1433 | dead_temps[arg] = 0; |
c896fe29 | 1434 | } |
866cb6cb | 1435 | s->op_dead_args[op_index] = dead_args; |
ec7a869d | 1436 | s->op_sync_args[op_index] = sync_args; |
c896fe29 FB |
1437 | } |
1438 | break; | |
1439 | } | |
1440 | op_index--; | |
1441 | } | |
1442 | ||
1443 | if (args != gen_opparam_buf) | |
1444 | tcg_abort(); | |
1445 | } | |
1446 | #else | |
1447 | /* dummy liveness analysis */ | |
655feed5 | 1448 | static void tcg_liveness_analysis(TCGContext *s) |
c896fe29 FB |
1449 | { |
1450 | int nb_ops; | |
1451 | nb_ops = gen_opc_ptr - gen_opc_buf; | |
1452 | ||
866cb6cb AJ |
1453 | s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); |
1454 | memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); | |
ec7a869d AJ |
1455 | s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t)); |
1456 | memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t)); | |
c896fe29 FB |
1457 | } |
1458 | #endif | |
1459 | ||
1460 | #ifndef NDEBUG | |
1461 | static void dump_regs(TCGContext *s) | |
1462 | { | |
1463 | TCGTemp *ts; | |
1464 | int i; | |
1465 | char buf[64]; | |
1466 | ||
1467 | for(i = 0; i < s->nb_temps; i++) { | |
1468 | ts = &s->temps[i]; | |
ac56dd48 | 1469 | printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); |
c896fe29 FB |
1470 | switch(ts->val_type) { |
1471 | case TEMP_VAL_REG: | |
1472 | printf("%s", tcg_target_reg_names[ts->reg]); | |
1473 | break; | |
1474 | case TEMP_VAL_MEM: | |
1475 | printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); | |
1476 | break; | |
1477 | case TEMP_VAL_CONST: | |
1478 | printf("$0x%" TCG_PRIlx, ts->val); | |
1479 | break; | |
1480 | case TEMP_VAL_DEAD: | |
1481 | printf("D"); | |
1482 | break; | |
1483 | default: | |
1484 | printf("???"); | |
1485 | break; | |
1486 | } | |
1487 | printf("\n"); | |
1488 | } | |
1489 | ||
1490 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { | |
1491 | if (s->reg_to_temp[i] >= 0) { | |
1492 | printf("%s: %s\n", | |
1493 | tcg_target_reg_names[i], | |
ac56dd48 | 1494 | tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); |
c896fe29 FB |
1495 | } |
1496 | } | |
1497 | } | |
1498 | ||
1499 | static void check_regs(TCGContext *s) | |
1500 | { | |
1501 | int reg, k; | |
1502 | TCGTemp *ts; | |
1503 | char buf[64]; | |
1504 | ||
1505 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
1506 | k = s->reg_to_temp[reg]; | |
1507 | if (k >= 0) { | |
1508 | ts = &s->temps[k]; | |
1509 | if (ts->val_type != TEMP_VAL_REG || | |
1510 | ts->reg != reg) { | |
1511 | printf("Inconsistency for register %s:\n", | |
1512 | tcg_target_reg_names[reg]); | |
b03cce8e | 1513 | goto fail; |
c896fe29 FB |
1514 | } |
1515 | } | |
1516 | } | |
1517 | for(k = 0; k < s->nb_temps; k++) { | |
1518 | ts = &s->temps[k]; | |
1519 | if (ts->val_type == TEMP_VAL_REG && | |
1520 | !ts->fixed_reg && | |
1521 | s->reg_to_temp[ts->reg] != k) { | |
1522 | printf("Inconsistency for temp %s:\n", | |
ac56dd48 | 1523 | tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); |
b03cce8e | 1524 | fail: |
c896fe29 FB |
1525 | printf("reg state:\n"); |
1526 | dump_regs(s); | |
1527 | tcg_abort(); | |
1528 | } | |
1529 | } | |
1530 | } | |
1531 | #endif | |
1532 | ||
1533 | static void temp_allocate_frame(TCGContext *s, int temp) | |
1534 | { | |
1535 | TCGTemp *ts; | |
1536 | ts = &s->temps[temp]; | |
9b9c37c3 RH |
1537 | #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) |
1538 | /* Sparc64 stack is accessed with offset of 2047 */ | |
b591dc59 BS |
1539 | s->current_frame_offset = (s->current_frame_offset + |
1540 | (tcg_target_long)sizeof(tcg_target_long) - 1) & | |
1541 | ~(sizeof(tcg_target_long) - 1); | |
f44c9960 | 1542 | #endif |
b591dc59 BS |
1543 | if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > |
1544 | s->frame_end) { | |
5ff9d6a4 | 1545 | tcg_abort(); |
b591dc59 | 1546 | } |
c896fe29 FB |
1547 | ts->mem_offset = s->current_frame_offset; |
1548 | ts->mem_reg = s->frame_reg; | |
1549 | ts->mem_allocated = 1; | |
b591dc59 | 1550 | s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long); |
c896fe29 FB |
1551 | } |
1552 | ||
7f6ceedf AJ |
1553 | /* sync register 'reg' by saving it to the corresponding temporary */ |
1554 | static inline void tcg_reg_sync(TCGContext *s, int reg) | |
1555 | { | |
1556 | TCGTemp *ts; | |
1557 | int temp; | |
1558 | ||
1559 | temp = s->reg_to_temp[reg]; | |
1560 | ts = &s->temps[temp]; | |
1561 | assert(ts->val_type == TEMP_VAL_REG); | |
1562 | if (!ts->mem_coherent && !ts->fixed_reg) { | |
1563 | if (!ts->mem_allocated) { | |
1564 | temp_allocate_frame(s, temp); | |
1565 | } | |
1566 | tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
1567 | } | |
1568 | ts->mem_coherent = 1; | |
1569 | } | |
1570 | ||
c896fe29 FB |
1571 | /* free register 'reg' by spilling the corresponding temporary if necessary */ |
1572 | static void tcg_reg_free(TCGContext *s, int reg) | |
1573 | { | |
c896fe29 FB |
1574 | int temp; |
1575 | ||
1576 | temp = s->reg_to_temp[reg]; | |
1577 | if (temp != -1) { | |
7f6ceedf AJ |
1578 | tcg_reg_sync(s, reg); |
1579 | s->temps[temp].val_type = TEMP_VAL_MEM; | |
c896fe29 FB |
1580 | s->reg_to_temp[reg] = -1; |
1581 | } | |
1582 | } | |
1583 | ||
1584 | /* Allocate a register belonging to reg1 & ~reg2 */ | |
1585 | static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) | |
1586 | { | |
1587 | int i, reg; | |
1588 | TCGRegSet reg_ct; | |
1589 | ||
1590 | tcg_regset_andnot(reg_ct, reg1, reg2); | |
1591 | ||
1592 | /* first try free registers */ | |
0954d0d9 | 1593 | for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { |
c896fe29 FB |
1594 | reg = tcg_target_reg_alloc_order[i]; |
1595 | if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) | |
1596 | return reg; | |
1597 | } | |
1598 | ||
1599 | /* XXX: do better spill choice */ | |
0954d0d9 | 1600 | for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { |
c896fe29 FB |
1601 | reg = tcg_target_reg_alloc_order[i]; |
1602 | if (tcg_regset_test_reg(reg_ct, reg)) { | |
1603 | tcg_reg_free(s, reg); | |
1604 | return reg; | |
1605 | } | |
1606 | } | |
1607 | ||
1608 | tcg_abort(); | |
1609 | } | |
1610 | ||
639368dd AJ |
1611 | /* mark a temporary as dead. */ |
1612 | static inline void temp_dead(TCGContext *s, int temp) | |
1613 | { | |
1614 | TCGTemp *ts; | |
1615 | ||
1616 | ts = &s->temps[temp]; | |
1617 | if (!ts->fixed_reg) { | |
1618 | if (ts->val_type == TEMP_VAL_REG) { | |
1619 | s->reg_to_temp[ts->reg] = -1; | |
1620 | } | |
1621 | if (temp < s->nb_globals || (ts->temp_local && ts->mem_allocated)) { | |
1622 | ts->val_type = TEMP_VAL_MEM; | |
1623 | } else { | |
1624 | ts->val_type = TEMP_VAL_DEAD; | |
1625 | } | |
1626 | } | |
1627 | } | |
1628 | ||
1ad80729 | 1629 | /* sync a temporary to memory. 'allocated_regs' is used in case a |
641d5fbe | 1630 | temporary registers needs to be allocated to store a constant. */ |
1ad80729 | 1631 | static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs) |
641d5fbe FB |
1632 | { |
1633 | TCGTemp *ts; | |
641d5fbe FB |
1634 | |
1635 | ts = &s->temps[temp]; | |
1636 | if (!ts->fixed_reg) { | |
1637 | switch(ts->val_type) { | |
1ad80729 AJ |
1638 | case TEMP_VAL_CONST: |
1639 | ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], | |
1640 | allocated_regs); | |
1641 | ts->val_type = TEMP_VAL_REG; | |
1642 | s->reg_to_temp[ts->reg] = temp; | |
1643 | ts->mem_coherent = 0; | |
1644 | tcg_out_movi(s, ts->type, ts->reg, ts->val); | |
1645 | /* fallthrough*/ | |
641d5fbe | 1646 | case TEMP_VAL_REG: |
1ad80729 | 1647 | tcg_reg_sync(s, ts->reg); |
641d5fbe FB |
1648 | break; |
1649 | case TEMP_VAL_DEAD: | |
641d5fbe FB |
1650 | case TEMP_VAL_MEM: |
1651 | break; | |
1652 | default: | |
1653 | tcg_abort(); | |
1654 | } | |
1655 | } | |
1656 | } | |
1657 | ||
1ad80729 AJ |
1658 | /* save a temporary to memory. 'allocated_regs' is used in case a |
1659 | temporary registers needs to be allocated to store a constant. */ | |
1660 | static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) | |
1661 | { | |
2c0366f0 AJ |
1662 | #ifdef USE_LIVENESS_ANALYSIS |
1663 | /* The liveness analysis already ensures that globals are back | |
1664 | in memory. Keep an assert for safety. */ | |
1665 | assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg); | |
1666 | #else | |
1ad80729 AJ |
1667 | temp_sync(s, temp, allocated_regs); |
1668 | temp_dead(s, temp); | |
2c0366f0 | 1669 | #endif |
1ad80729 AJ |
1670 | } |
1671 | ||
9814dd27 | 1672 | /* save globals to their canonical location and assume they can be |
e8996ee0 FB |
1673 | modified be the following code. 'allocated_regs' is used in case a |
1674 | temporary registers needs to be allocated to store a constant. */ | |
1675 | static void save_globals(TCGContext *s, TCGRegSet allocated_regs) | |
c896fe29 | 1676 | { |
641d5fbe | 1677 | int i; |
c896fe29 FB |
1678 | |
1679 | for(i = 0; i < s->nb_globals; i++) { | |
641d5fbe | 1680 | temp_save(s, i, allocated_regs); |
c896fe29 | 1681 | } |
e5097dc8 FB |
1682 | } |
1683 | ||
3d5c5f87 AJ |
1684 | /* sync globals to their canonical location and assume they can be |
1685 | read by the following code. 'allocated_regs' is used in case a | |
1686 | temporary registers needs to be allocated to store a constant. */ | |
1687 | static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) | |
1688 | { | |
1689 | int i; | |
1690 | ||
1691 | for (i = 0; i < s->nb_globals; i++) { | |
1692 | #ifdef USE_LIVENESS_ANALYSIS | |
1693 | assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg || | |
1694 | s->temps[i].mem_coherent); | |
1695 | #else | |
1696 | temp_sync(s, i, allocated_regs); | |
1697 | #endif | |
1698 | } | |
1699 | } | |
1700 | ||
e5097dc8 | 1701 | /* at the end of a basic block, we assume all temporaries are dead and |
e8996ee0 FB |
1702 | all globals are stored at their canonical location. */ |
1703 | static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) | |
e5097dc8 FB |
1704 | { |
1705 | TCGTemp *ts; | |
1706 | int i; | |
1707 | ||
c896fe29 FB |
1708 | for(i = s->nb_globals; i < s->nb_temps; i++) { |
1709 | ts = &s->temps[i]; | |
641d5fbe FB |
1710 | if (ts->temp_local) { |
1711 | temp_save(s, i, allocated_regs); | |
1712 | } else { | |
2c0366f0 AJ |
1713 | #ifdef USE_LIVENESS_ANALYSIS |
1714 | /* The liveness analysis already ensures that temps are dead. | |
1715 | Keep an assert for safety. */ | |
1716 | assert(ts->val_type == TEMP_VAL_DEAD); | |
1717 | #else | |
639368dd | 1718 | temp_dead(s, i); |
2c0366f0 | 1719 | #endif |
c896fe29 FB |
1720 | } |
1721 | } | |
e8996ee0 FB |
1722 | |
1723 | save_globals(s, allocated_regs); | |
c896fe29 FB |
1724 | } |
1725 | ||
866cb6cb | 1726 | #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) |
ec7a869d | 1727 | #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1) |
c896fe29 | 1728 | |
ec7a869d AJ |
1729 | static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, |
1730 | uint16_t dead_args, uint8_t sync_args) | |
e8996ee0 FB |
1731 | { |
1732 | TCGTemp *ots; | |
1733 | tcg_target_ulong val; | |
1734 | ||
1735 | ots = &s->temps[args[0]]; | |
1736 | val = args[1]; | |
1737 | ||
1738 | if (ots->fixed_reg) { | |
1739 | /* for fixed registers, we do not do any constant | |
1740 | propagation */ | |
1741 | tcg_out_movi(s, ots->type, ots->reg, val); | |
1742 | } else { | |
1235fc06 | 1743 | /* The movi is not explicitly generated here */ |
e8996ee0 FB |
1744 | if (ots->val_type == TEMP_VAL_REG) |
1745 | s->reg_to_temp[ots->reg] = -1; | |
1746 | ots->val_type = TEMP_VAL_CONST; | |
1747 | ots->val = val; | |
1748 | } | |
ec7a869d AJ |
1749 | if (NEED_SYNC_ARG(0)) { |
1750 | temp_sync(s, args[0], s->reserved_regs); | |
1751 | } | |
4c4e1ab2 AJ |
1752 | if (IS_DEAD_ARG(0)) { |
1753 | temp_dead(s, args[0]); | |
1754 | } | |
e8996ee0 FB |
1755 | } |
1756 | ||
c896fe29 | 1757 | static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, |
ec7a869d AJ |
1758 | const TCGArg *args, uint16_t dead_args, |
1759 | uint8_t sync_args) | |
c896fe29 | 1760 | { |
c29c1d7e | 1761 | TCGRegSet allocated_regs; |
c896fe29 | 1762 | TCGTemp *ts, *ots; |
c29c1d7e | 1763 | const TCGArgConstraint *arg_ct, *oarg_ct; |
c896fe29 | 1764 | |
c29c1d7e | 1765 | tcg_regset_set(allocated_regs, s->reserved_regs); |
c896fe29 FB |
1766 | ots = &s->temps[args[0]]; |
1767 | ts = &s->temps[args[1]]; | |
c29c1d7e AJ |
1768 | oarg_ct = &def->args_ct[0]; |
1769 | arg_ct = &def->args_ct[1]; | |
1770 | ||
1771 | /* If the source value is not in a register, and we're going to be | |
1772 | forced to have it in a register in order to perform the copy, | |
1773 | then copy the SOURCE value into its own register first. That way | |
1774 | we don't have to reload SOURCE the next time it is used. */ | |
1775 | if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG) | |
1776 | || ts->val_type == TEMP_VAL_MEM) { | |
1777 | ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
1778 | if (ts->val_type == TEMP_VAL_MEM) { | |
1779 | tcg_out_ld(s, ts->type, ts->reg, ts->mem_reg, ts->mem_offset); | |
1780 | ts->mem_coherent = 1; | |
1781 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1782 | tcg_out_movi(s, ts->type, ts->reg, ts->val); | |
1783 | } | |
1784 | s->reg_to_temp[ts->reg] = args[1]; | |
1785 | ts->val_type = TEMP_VAL_REG; | |
1786 | } | |
c896fe29 | 1787 | |
c29c1d7e AJ |
1788 | if (IS_DEAD_ARG(0) && !ots->fixed_reg) { |
1789 | /* mov to a non-saved dead register makes no sense (even with | |
1790 | liveness analysis disabled). */ | |
1791 | assert(NEED_SYNC_ARG(0)); | |
1792 | /* The code above should have moved the temp to a register. */ | |
1793 | assert(ts->val_type == TEMP_VAL_REG); | |
1794 | if (!ots->mem_allocated) { | |
1795 | temp_allocate_frame(s, args[0]); | |
1796 | } | |
1797 | tcg_out_st(s, ots->type, ts->reg, ots->mem_reg, ots->mem_offset); | |
1798 | if (IS_DEAD_ARG(1)) { | |
1799 | temp_dead(s, args[1]); | |
1800 | } | |
1801 | temp_dead(s, args[0]); | |
1802 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1803 | /* propagate constant */ | |
1804 | if (ots->val_type == TEMP_VAL_REG) { | |
1805 | s->reg_to_temp[ots->reg] = -1; | |
1806 | } | |
1807 | ots->val_type = TEMP_VAL_CONST; | |
1808 | ots->val = ts->val; | |
1809 | } else { | |
1810 | /* The code in the first if block should have moved the | |
1811 | temp to a register. */ | |
1812 | assert(ts->val_type == TEMP_VAL_REG); | |
866cb6cb | 1813 | if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { |
c896fe29 | 1814 | /* the mov can be suppressed */ |
c29c1d7e | 1815 | if (ots->val_type == TEMP_VAL_REG) { |
c896fe29 | 1816 | s->reg_to_temp[ots->reg] = -1; |
c29c1d7e AJ |
1817 | } |
1818 | ots->reg = ts->reg; | |
639368dd | 1819 | temp_dead(s, args[1]); |
c896fe29 | 1820 | } else { |
c29c1d7e AJ |
1821 | if (ots->val_type != TEMP_VAL_REG) { |
1822 | /* When allocating a new register, make sure to not spill the | |
1823 | input one. */ | |
1824 | tcg_regset_set_reg(allocated_regs, ts->reg); | |
1825 | ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs); | |
c896fe29 | 1826 | } |
c29c1d7e | 1827 | tcg_out_mov(s, ots->type, ots->reg, ts->reg); |
c896fe29 | 1828 | } |
c29c1d7e AJ |
1829 | ots->val_type = TEMP_VAL_REG; |
1830 | ots->mem_coherent = 0; | |
1831 | s->reg_to_temp[ots->reg] = args[0]; | |
1832 | if (NEED_SYNC_ARG(0)) { | |
1833 | tcg_reg_sync(s, ots->reg); | |
c896fe29 | 1834 | } |
ec7a869d | 1835 | } |
c896fe29 FB |
1836 | } |
1837 | ||
1838 | static void tcg_reg_alloc_op(TCGContext *s, | |
a9751609 | 1839 | const TCGOpDef *def, TCGOpcode opc, |
ec7a869d AJ |
1840 | const TCGArg *args, uint16_t dead_args, |
1841 | uint8_t sync_args) | |
c896fe29 FB |
1842 | { |
1843 | TCGRegSet allocated_regs; | |
1844 | int i, k, nb_iargs, nb_oargs, reg; | |
1845 | TCGArg arg; | |
1846 | const TCGArgConstraint *arg_ct; | |
1847 | TCGTemp *ts; | |
1848 | TCGArg new_args[TCG_MAX_OP_ARGS]; | |
1849 | int const_args[TCG_MAX_OP_ARGS]; | |
1850 | ||
1851 | nb_oargs = def->nb_oargs; | |
1852 | nb_iargs = def->nb_iargs; | |
1853 | ||
1854 | /* copy constants */ | |
1855 | memcpy(new_args + nb_oargs + nb_iargs, | |
1856 | args + nb_oargs + nb_iargs, | |
1857 | sizeof(TCGArg) * def->nb_cargs); | |
1858 | ||
1859 | /* satisfy input constraints */ | |
1860 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
1861 | for(k = 0; k < nb_iargs; k++) { | |
1862 | i = def->sorted_args[nb_oargs + k]; | |
1863 | arg = args[i]; | |
1864 | arg_ct = &def->args_ct[i]; | |
1865 | ts = &s->temps[arg]; | |
1866 | if (ts->val_type == TEMP_VAL_MEM) { | |
1867 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
e4d5434c | 1868 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 FB |
1869 | ts->val_type = TEMP_VAL_REG; |
1870 | ts->reg = reg; | |
1871 | ts->mem_coherent = 1; | |
1872 | s->reg_to_temp[reg] = arg; | |
1873 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1874 | if (tcg_target_const_match(ts->val, arg_ct)) { | |
1875 | /* constant is OK for instruction */ | |
1876 | const_args[i] = 1; | |
1877 | new_args[i] = ts->val; | |
1878 | goto iarg_end; | |
1879 | } else { | |
e8996ee0 | 1880 | /* need to move to a register */ |
c896fe29 FB |
1881 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); |
1882 | tcg_out_movi(s, ts->type, reg, ts->val); | |
e8996ee0 FB |
1883 | ts->val_type = TEMP_VAL_REG; |
1884 | ts->reg = reg; | |
1885 | ts->mem_coherent = 0; | |
1886 | s->reg_to_temp[reg] = arg; | |
c896fe29 FB |
1887 | } |
1888 | } | |
1889 | assert(ts->val_type == TEMP_VAL_REG); | |
5ff9d6a4 FB |
1890 | if (arg_ct->ct & TCG_CT_IALIAS) { |
1891 | if (ts->fixed_reg) { | |
1892 | /* if fixed register, we must allocate a new register | |
1893 | if the alias is not the same register */ | |
1894 | if (arg != args[arg_ct->alias_index]) | |
1895 | goto allocate_in_reg; | |
1896 | } else { | |
1897 | /* if the input is aliased to an output and if it is | |
1898 | not dead after the instruction, we must allocate | |
1899 | a new register and move it */ | |
866cb6cb | 1900 | if (!IS_DEAD_ARG(i)) { |
5ff9d6a4 | 1901 | goto allocate_in_reg; |
866cb6cb | 1902 | } |
5ff9d6a4 | 1903 | } |
c896fe29 FB |
1904 | } |
1905 | reg = ts->reg; | |
1906 | if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
1907 | /* nothing to do : the constraint is satisfied */ | |
1908 | } else { | |
1909 | allocate_in_reg: | |
1910 | /* allocate a new register matching the constraint | |
1911 | and move the temporary register into it */ | |
1912 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
3b6dac34 | 1913 | tcg_out_mov(s, ts->type, reg, ts->reg); |
c896fe29 | 1914 | } |
c896fe29 FB |
1915 | new_args[i] = reg; |
1916 | const_args[i] = 0; | |
1917 | tcg_regset_set_reg(allocated_regs, reg); | |
1918 | iarg_end: ; | |
1919 | } | |
1920 | ||
a52ad07e AJ |
1921 | /* mark dead temporaries and free the associated registers */ |
1922 | for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { | |
1923 | if (IS_DEAD_ARG(i)) { | |
1924 | temp_dead(s, args[i]); | |
1925 | } | |
1926 | } | |
1927 | ||
e8996ee0 FB |
1928 | if (def->flags & TCG_OPF_BB_END) { |
1929 | tcg_reg_alloc_bb_end(s, allocated_regs); | |
1930 | } else { | |
e8996ee0 FB |
1931 | if (def->flags & TCG_OPF_CALL_CLOBBER) { |
1932 | /* XXX: permit generic clobber register list ? */ | |
1933 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
1934 | if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { | |
1935 | tcg_reg_free(s, reg); | |
1936 | } | |
c896fe29 | 1937 | } |
3d5c5f87 AJ |
1938 | } |
1939 | if (def->flags & TCG_OPF_SIDE_EFFECTS) { | |
1940 | /* sync globals if the op has side effects and might trigger | |
1941 | an exception. */ | |
1942 | sync_globals(s, allocated_regs); | |
c896fe29 | 1943 | } |
e8996ee0 FB |
1944 | |
1945 | /* satisfy the output constraints */ | |
1946 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
1947 | for(k = 0; k < nb_oargs; k++) { | |
1948 | i = def->sorted_args[k]; | |
1949 | arg = args[i]; | |
1950 | arg_ct = &def->args_ct[i]; | |
1951 | ts = &s->temps[arg]; | |
1952 | if (arg_ct->ct & TCG_CT_ALIAS) { | |
1953 | reg = new_args[arg_ct->alias_index]; | |
1954 | } else { | |
1955 | /* if fixed register, we try to use it */ | |
1956 | reg = ts->reg; | |
1957 | if (ts->fixed_reg && | |
1958 | tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
1959 | goto oarg_end; | |
1960 | } | |
1961 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
c896fe29 | 1962 | } |
e8996ee0 FB |
1963 | tcg_regset_set_reg(allocated_regs, reg); |
1964 | /* if a fixed register is used, then a move will be done afterwards */ | |
1965 | if (!ts->fixed_reg) { | |
ec7a869d AJ |
1966 | if (ts->val_type == TEMP_VAL_REG) { |
1967 | s->reg_to_temp[ts->reg] = -1; | |
1968 | } | |
1969 | ts->val_type = TEMP_VAL_REG; | |
1970 | ts->reg = reg; | |
1971 | /* temp value is modified, so the value kept in memory is | |
1972 | potentially not the same */ | |
1973 | ts->mem_coherent = 0; | |
1974 | s->reg_to_temp[reg] = arg; | |
e8996ee0 FB |
1975 | } |
1976 | oarg_end: | |
1977 | new_args[i] = reg; | |
c896fe29 | 1978 | } |
c896fe29 FB |
1979 | } |
1980 | ||
c896fe29 FB |
1981 | /* emit instruction */ |
1982 | tcg_out_op(s, opc, new_args, const_args); | |
1983 | ||
1984 | /* move the outputs in the correct register if needed */ | |
1985 | for(i = 0; i < nb_oargs; i++) { | |
1986 | ts = &s->temps[args[i]]; | |
1987 | reg = new_args[i]; | |
1988 | if (ts->fixed_reg && ts->reg != reg) { | |
3b6dac34 | 1989 | tcg_out_mov(s, ts->type, ts->reg, reg); |
c896fe29 | 1990 | } |
ec7a869d AJ |
1991 | if (NEED_SYNC_ARG(i)) { |
1992 | tcg_reg_sync(s, reg); | |
1993 | } | |
1994 | if (IS_DEAD_ARG(i)) { | |
1995 | temp_dead(s, args[i]); | |
1996 | } | |
c896fe29 FB |
1997 | } |
1998 | } | |
1999 | ||
b03cce8e FB |
2000 | #ifdef TCG_TARGET_STACK_GROWSUP |
2001 | #define STACK_DIR(x) (-(x)) | |
2002 | #else | |
2003 | #define STACK_DIR(x) (x) | |
2004 | #endif | |
2005 | ||
c896fe29 | 2006 | static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def, |
a9751609 | 2007 | TCGOpcode opc, const TCGArg *args, |
ec7a869d | 2008 | uint16_t dead_args, uint8_t sync_args) |
c896fe29 FB |
2009 | { |
2010 | int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params; | |
2011 | TCGArg arg, func_arg; | |
2012 | TCGTemp *ts; | |
f54b3f92 | 2013 | tcg_target_long stack_offset, call_stack_size, func_addr; |
b03cce8e | 2014 | int const_func_arg, allocate_args; |
c896fe29 FB |
2015 | TCGRegSet allocated_regs; |
2016 | const TCGArgConstraint *arg_ct; | |
2017 | ||
2018 | arg = *args++; | |
2019 | ||
2020 | nb_oargs = arg >> 16; | |
2021 | nb_iargs = arg & 0xffff; | |
2022 | nb_params = nb_iargs - 1; | |
2023 | ||
2024 | flags = args[nb_oargs + nb_iargs]; | |
2025 | ||
6e17d0c5 | 2026 | nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); |
c896fe29 FB |
2027 | if (nb_regs > nb_params) |
2028 | nb_regs = nb_params; | |
2029 | ||
2030 | /* assign stack slots first */ | |
c896fe29 FB |
2031 | call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long); |
2032 | call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & | |
2033 | ~(TCG_TARGET_STACK_ALIGN - 1); | |
b03cce8e FB |
2034 | allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); |
2035 | if (allocate_args) { | |
345649c0 BS |
2036 | /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, |
2037 | preallocate call stack */ | |
2038 | tcg_abort(); | |
b03cce8e | 2039 | } |
39cf05d3 FB |
2040 | |
2041 | stack_offset = TCG_TARGET_CALL_STACK_OFFSET; | |
c896fe29 FB |
2042 | for(i = nb_regs; i < nb_params; i++) { |
2043 | arg = args[nb_oargs + i]; | |
39cf05d3 FB |
2044 | #ifdef TCG_TARGET_STACK_GROWSUP |
2045 | stack_offset -= sizeof(tcg_target_long); | |
2046 | #endif | |
2047 | if (arg != TCG_CALL_DUMMY_ARG) { | |
2048 | ts = &s->temps[arg]; | |
2049 | if (ts->val_type == TEMP_VAL_REG) { | |
2050 | tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); | |
2051 | } else if (ts->val_type == TEMP_VAL_MEM) { | |
2052 | reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], | |
2053 | s->reserved_regs); | |
2054 | /* XXX: not correct if reading values from the stack */ | |
2055 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
2056 | tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); | |
2057 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
2058 | reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], | |
2059 | s->reserved_regs); | |
2060 | /* XXX: sign extend may be needed on some targets */ | |
2061 | tcg_out_movi(s, ts->type, reg, ts->val); | |
2062 | tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); | |
2063 | } else { | |
2064 | tcg_abort(); | |
2065 | } | |
c896fe29 | 2066 | } |
39cf05d3 FB |
2067 | #ifndef TCG_TARGET_STACK_GROWSUP |
2068 | stack_offset += sizeof(tcg_target_long); | |
2069 | #endif | |
c896fe29 FB |
2070 | } |
2071 | ||
2072 | /* assign input registers */ | |
2073 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
2074 | for(i = 0; i < nb_regs; i++) { | |
2075 | arg = args[nb_oargs + i]; | |
39cf05d3 FB |
2076 | if (arg != TCG_CALL_DUMMY_ARG) { |
2077 | ts = &s->temps[arg]; | |
2078 | reg = tcg_target_call_iarg_regs[i]; | |
2079 | tcg_reg_free(s, reg); | |
2080 | if (ts->val_type == TEMP_VAL_REG) { | |
2081 | if (ts->reg != reg) { | |
3b6dac34 | 2082 | tcg_out_mov(s, ts->type, reg, ts->reg); |
39cf05d3 FB |
2083 | } |
2084 | } else if (ts->val_type == TEMP_VAL_MEM) { | |
2085 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
2086 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
2087 | /* XXX: sign extend ? */ | |
2088 | tcg_out_movi(s, ts->type, reg, ts->val); | |
2089 | } else { | |
2090 | tcg_abort(); | |
c896fe29 | 2091 | } |
39cf05d3 | 2092 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 | 2093 | } |
c896fe29 FB |
2094 | } |
2095 | ||
2096 | /* assign function address */ | |
2097 | func_arg = args[nb_oargs + nb_iargs - 1]; | |
2098 | arg_ct = &def->args_ct[0]; | |
2099 | ts = &s->temps[func_arg]; | |
f54b3f92 | 2100 | func_addr = ts->val; |
c896fe29 FB |
2101 | const_func_arg = 0; |
2102 | if (ts->val_type == TEMP_VAL_MEM) { | |
2103 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
e4d5434c | 2104 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 | 2105 | func_arg = reg; |
e8996ee0 | 2106 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 FB |
2107 | } else if (ts->val_type == TEMP_VAL_REG) { |
2108 | reg = ts->reg; | |
2109 | if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
2110 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
3b6dac34 | 2111 | tcg_out_mov(s, ts->type, reg, ts->reg); |
c896fe29 FB |
2112 | } |
2113 | func_arg = reg; | |
e8996ee0 | 2114 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 | 2115 | } else if (ts->val_type == TEMP_VAL_CONST) { |
f54b3f92 | 2116 | if (tcg_target_const_match(func_addr, arg_ct)) { |
c896fe29 | 2117 | const_func_arg = 1; |
f54b3f92 | 2118 | func_arg = func_addr; |
c896fe29 FB |
2119 | } else { |
2120 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
f54b3f92 | 2121 | tcg_out_movi(s, ts->type, reg, func_addr); |
c896fe29 | 2122 | func_arg = reg; |
e8996ee0 | 2123 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 FB |
2124 | } |
2125 | } else { | |
2126 | tcg_abort(); | |
2127 | } | |
e8996ee0 | 2128 | |
c896fe29 FB |
2129 | |
2130 | /* mark dead temporaries and free the associated registers */ | |
866cb6cb | 2131 | for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { |
866cb6cb | 2132 | if (IS_DEAD_ARG(i)) { |
639368dd | 2133 | temp_dead(s, args[i]); |
c896fe29 FB |
2134 | } |
2135 | } | |
2136 | ||
2137 | /* clobber call registers */ | |
2138 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
2139 | if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { | |
2140 | tcg_reg_free(s, reg); | |
2141 | } | |
2142 | } | |
78505279 AJ |
2143 | |
2144 | /* Save globals if they might be written by the helper, sync them if | |
2145 | they might be read. */ | |
2146 | if (flags & TCG_CALL_NO_READ_GLOBALS) { | |
2147 | /* Nothing to do */ | |
2148 | } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) { | |
2149 | sync_globals(s, allocated_regs); | |
2150 | } else { | |
b9c18f56 AJ |
2151 | save_globals(s, allocated_regs); |
2152 | } | |
c896fe29 FB |
2153 | |
2154 | tcg_out_op(s, opc, &func_arg, &const_func_arg); | |
c896fe29 FB |
2155 | |
2156 | /* assign output registers and emit moves if needed */ | |
2157 | for(i = 0; i < nb_oargs; i++) { | |
2158 | arg = args[i]; | |
2159 | ts = &s->temps[arg]; | |
2160 | reg = tcg_target_call_oarg_regs[i]; | |
e8996ee0 | 2161 | assert(s->reg_to_temp[reg] == -1); |
c896fe29 FB |
2162 | if (ts->fixed_reg) { |
2163 | if (ts->reg != reg) { | |
3b6dac34 | 2164 | tcg_out_mov(s, ts->type, ts->reg, reg); |
c896fe29 FB |
2165 | } |
2166 | } else { | |
ec7a869d AJ |
2167 | if (ts->val_type == TEMP_VAL_REG) { |
2168 | s->reg_to_temp[ts->reg] = -1; | |
2169 | } | |
2170 | ts->val_type = TEMP_VAL_REG; | |
2171 | ts->reg = reg; | |
2172 | ts->mem_coherent = 0; | |
2173 | s->reg_to_temp[reg] = arg; | |
2174 | if (NEED_SYNC_ARG(i)) { | |
2175 | tcg_reg_sync(s, reg); | |
2176 | } | |
8c11ad25 | 2177 | if (IS_DEAD_ARG(i)) { |
639368dd | 2178 | temp_dead(s, args[i]); |
8c11ad25 | 2179 | } |
c896fe29 FB |
2180 | } |
2181 | } | |
2182 | ||
2183 | return nb_iargs + nb_oargs + def->nb_cargs + 1; | |
2184 | } | |
2185 | ||
2186 | #ifdef CONFIG_PROFILER | |
2187 | ||
54604f74 | 2188 | static int64_t tcg_table_op_count[NB_OPS]; |
c896fe29 | 2189 | |
871e6c35 | 2190 | static void dump_op_count(void) |
c896fe29 FB |
2191 | { |
2192 | int i; | |
2193 | FILE *f; | |
54604f74 | 2194 | f = fopen("/tmp/op.log", "w"); |
c896fe29 | 2195 | for(i = INDEX_op_end; i < NB_OPS; i++) { |
54604f74 | 2196 | fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]); |
c896fe29 FB |
2197 | } |
2198 | fclose(f); | |
2199 | } | |
2200 | #endif | |
2201 | ||
2202 | ||
2203 | static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | |
2ba1eeb6 | 2204 | long search_pc) |
c896fe29 | 2205 | { |
a9751609 RH |
2206 | TCGOpcode opc; |
2207 | int op_index; | |
c896fe29 | 2208 | const TCGOpDef *def; |
c896fe29 FB |
2209 | const TCGArg *args; |
2210 | ||
2211 | #ifdef DEBUG_DISAS | |
8fec2b8c | 2212 | if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { |
93fcfe39 | 2213 | qemu_log("OP:\n"); |
eeacee4d | 2214 | tcg_dump_ops(s); |
93fcfe39 | 2215 | qemu_log("\n"); |
c896fe29 FB |
2216 | } |
2217 | #endif | |
2218 | ||
c5cc28ff AJ |
2219 | #ifdef CONFIG_PROFILER |
2220 | s->opt_time -= profile_getclock(); | |
2221 | #endif | |
2222 | ||
8f2e8c07 KB |
2223 | #ifdef USE_TCG_OPTIMIZATIONS |
2224 | gen_opparam_ptr = | |
2225 | tcg_optimize(s, gen_opc_ptr, gen_opparam_buf, tcg_op_defs); | |
2226 | #endif | |
2227 | ||
a23a9ec6 | 2228 | #ifdef CONFIG_PROFILER |
c5cc28ff | 2229 | s->opt_time += profile_getclock(); |
a23a9ec6 FB |
2230 | s->la_time -= profile_getclock(); |
2231 | #endif | |
c5cc28ff | 2232 | |
c896fe29 | 2233 | tcg_liveness_analysis(s); |
c5cc28ff | 2234 | |
a23a9ec6 FB |
2235 | #ifdef CONFIG_PROFILER |
2236 | s->la_time += profile_getclock(); | |
2237 | #endif | |
c896fe29 FB |
2238 | |
2239 | #ifdef DEBUG_DISAS | |
8fec2b8c | 2240 | if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { |
c5cc28ff | 2241 | qemu_log("OP after optimization and liveness analysis:\n"); |
eeacee4d | 2242 | tcg_dump_ops(s); |
93fcfe39 | 2243 | qemu_log("\n"); |
c896fe29 FB |
2244 | } |
2245 | #endif | |
2246 | ||
2247 | tcg_reg_alloc_start(s); | |
2248 | ||
2249 | s->code_buf = gen_code_buf; | |
2250 | s->code_ptr = gen_code_buf; | |
2251 | ||
c896fe29 FB |
2252 | args = gen_opparam_buf; |
2253 | op_index = 0; | |
b3db8758 | 2254 | |
c896fe29 FB |
2255 | for(;;) { |
2256 | opc = gen_opc_buf[op_index]; | |
2257 | #ifdef CONFIG_PROFILER | |
54604f74 | 2258 | tcg_table_op_count[opc]++; |
c896fe29 FB |
2259 | #endif |
2260 | def = &tcg_op_defs[opc]; | |
2261 | #if 0 | |
2262 | printf("%s: %d %d %d\n", def->name, | |
2263 | def->nb_oargs, def->nb_iargs, def->nb_cargs); | |
2264 | // dump_regs(s); | |
2265 | #endif | |
2266 | switch(opc) { | |
2267 | case INDEX_op_mov_i32: | |
c896fe29 | 2268 | case INDEX_op_mov_i64: |
ec7a869d AJ |
2269 | tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index], |
2270 | s->op_sync_args[op_index]); | |
c896fe29 | 2271 | break; |
e8996ee0 | 2272 | case INDEX_op_movi_i32: |
e8996ee0 | 2273 | case INDEX_op_movi_i64: |
ec7a869d AJ |
2274 | tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index], |
2275 | s->op_sync_args[op_index]); | |
e8996ee0 | 2276 | break; |
7e4597d7 FB |
2277 | case INDEX_op_debug_insn_start: |
2278 | /* debug instruction */ | |
2279 | break; | |
c896fe29 FB |
2280 | case INDEX_op_nop: |
2281 | case INDEX_op_nop1: | |
2282 | case INDEX_op_nop2: | |
2283 | case INDEX_op_nop3: | |
2284 | break; | |
2285 | case INDEX_op_nopn: | |
2286 | args += args[0]; | |
2287 | goto next; | |
5ff9d6a4 | 2288 | case INDEX_op_discard: |
639368dd | 2289 | temp_dead(s, args[0]); |
5ff9d6a4 | 2290 | break; |
c896fe29 | 2291 | case INDEX_op_set_label: |
e8996ee0 | 2292 | tcg_reg_alloc_bb_end(s, s->reserved_regs); |
9d6fca70 | 2293 | tcg_out_label(s, args[0], s->code_ptr); |
c896fe29 FB |
2294 | break; |
2295 | case INDEX_op_call: | |
ec7a869d AJ |
2296 | args += tcg_reg_alloc_call(s, def, opc, args, |
2297 | s->op_dead_args[op_index], | |
2298 | s->op_sync_args[op_index]); | |
c896fe29 FB |
2299 | goto next; |
2300 | case INDEX_op_end: | |
2301 | goto the_end; | |
c896fe29 | 2302 | default: |
25c4d9cc RH |
2303 | /* Sanity check that we've not introduced any unhandled opcodes. */ |
2304 | if (def->flags & TCG_OPF_NOT_PRESENT) { | |
2305 | tcg_abort(); | |
2306 | } | |
c896fe29 FB |
2307 | /* Note: in order to speed up the code, it would be much |
2308 | faster to have specialized register allocator functions for | |
2309 | some common argument patterns */ | |
ec7a869d AJ |
2310 | tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index], |
2311 | s->op_sync_args[op_index]); | |
c896fe29 FB |
2312 | break; |
2313 | } | |
2314 | args += def->nb_args; | |
8df1ca4b | 2315 | next: |
2ba1eeb6 | 2316 | if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) { |
b314f270 | 2317 | return op_index; |
c896fe29 FB |
2318 | } |
2319 | op_index++; | |
2320 | #ifndef NDEBUG | |
2321 | check_regs(s); | |
2322 | #endif | |
2323 | } | |
2324 | the_end: | |
b76f0d8c YL |
2325 | #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU) |
2326 | /* Generate TB finalization at the end of block */ | |
2327 | tcg_out_tb_finalize(s); | |
2328 | #endif | |
c896fe29 FB |
2329 | return -1; |
2330 | } | |
2331 | ||
54604f74 | 2332 | int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) |
c896fe29 FB |
2333 | { |
2334 | #ifdef CONFIG_PROFILER | |
2335 | { | |
c896fe29 FB |
2336 | int n; |
2337 | n = (gen_opc_ptr - gen_opc_buf); | |
a23a9ec6 FB |
2338 | s->op_count += n; |
2339 | if (n > s->op_count_max) | |
2340 | s->op_count_max = n; | |
2341 | ||
2342 | s->temp_count += s->nb_temps; | |
2343 | if (s->nb_temps > s->temp_count_max) | |
2344 | s->temp_count_max = s->nb_temps; | |
c896fe29 FB |
2345 | } |
2346 | #endif | |
2347 | ||
2ba1eeb6 | 2348 | tcg_gen_code_common(s, gen_code_buf, -1); |
c896fe29 FB |
2349 | |
2350 | /* flush instruction cache */ | |
2aeabc08 SW |
2351 | flush_icache_range((tcg_target_ulong)gen_code_buf, |
2352 | (tcg_target_ulong)s->code_ptr); | |
2353 | ||
c896fe29 FB |
2354 | return s->code_ptr - gen_code_buf; |
2355 | } | |
2356 | ||
2ba1eeb6 | 2357 | /* Return the index of the micro operation such as the pc after is < |
623e265c PB |
2358 | offset bytes from the start of the TB. The contents of gen_code_buf must |
2359 | not be changed, though writing the same values is ok. | |
2360 | Return -1 if not found. */ | |
54604f74 | 2361 | int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset) |
c896fe29 | 2362 | { |
623e265c | 2363 | return tcg_gen_code_common(s, gen_code_buf, offset); |
c896fe29 | 2364 | } |
a23a9ec6 FB |
2365 | |
2366 | #ifdef CONFIG_PROFILER | |
405cf9ff | 2367 | void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) |
a23a9ec6 FB |
2368 | { |
2369 | TCGContext *s = &tcg_ctx; | |
2370 | int64_t tot; | |
2371 | ||
2372 | tot = s->interm_time + s->code_time; | |
2373 | cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", | |
2374 | tot, tot / 2.4e9); | |
2375 | cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", | |
2376 | s->tb_count, | |
2377 | s->tb_count1 - s->tb_count, | |
2378 | s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); | |
2379 | cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", | |
2380 | s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); | |
a23a9ec6 FB |
2381 | cpu_fprintf(f, "deleted ops/TB %0.2f\n", |
2382 | s->tb_count ? | |
2383 | (double)s->del_op_count / s->tb_count : 0); | |
2384 | cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", | |
2385 | s->tb_count ? | |
2386 | (double)s->temp_count / s->tb_count : 0, | |
2387 | s->temp_count_max); | |
2388 | ||
2389 | cpu_fprintf(f, "cycles/op %0.1f\n", | |
2390 | s->op_count ? (double)tot / s->op_count : 0); | |
2391 | cpu_fprintf(f, "cycles/in byte %0.1f\n", | |
2392 | s->code_in_len ? (double)tot / s->code_in_len : 0); | |
2393 | cpu_fprintf(f, "cycles/out byte %0.1f\n", | |
2394 | s->code_out_len ? (double)tot / s->code_out_len : 0); | |
2395 | if (tot == 0) | |
2396 | tot = 1; | |
2397 | cpu_fprintf(f, " gen_interm time %0.1f%%\n", | |
2398 | (double)s->interm_time / tot * 100.0); | |
2399 | cpu_fprintf(f, " gen_code time %0.1f%%\n", | |
2400 | (double)s->code_time / tot * 100.0); | |
c5cc28ff AJ |
2401 | cpu_fprintf(f, "optim./code time %0.1f%%\n", |
2402 | (double)s->opt_time / (s->code_time ? s->code_time : 1) | |
2403 | * 100.0); | |
a23a9ec6 FB |
2404 | cpu_fprintf(f, "liveness/code time %0.1f%%\n", |
2405 | (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); | |
2406 | cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", | |
2407 | s->restore_count); | |
2408 | cpu_fprintf(f, " avg cycles %0.1f\n", | |
2409 | s->restore_count ? (double)s->restore_time / s->restore_count : 0); | |
871e6c35 BS |
2410 | |
2411 | dump_op_count(); | |
a23a9ec6 FB |
2412 | } |
2413 | #else | |
405cf9ff | 2414 | void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) |
a23a9ec6 | 2415 | { |
24bf7b3a | 2416 | cpu_fprintf(f, "[TCG profiler not compiled]\n"); |
a23a9ec6 FB |
2417 | } |
2418 | #endif | |
813da627 RH |
2419 | |
2420 | #ifdef ELF_HOST_MACHINE | |
5872bbf2 RH |
2421 | /* In order to use this feature, the backend needs to do three things: |
2422 | ||
2423 | (1) Define ELF_HOST_MACHINE to indicate both what value to | |
2424 | put into the ELF image and to indicate support for the feature. | |
2425 | ||
2426 | (2) Define tcg_register_jit. This should create a buffer containing | |
2427 | the contents of a .debug_frame section that describes the post- | |
2428 | prologue unwind info for the tcg machine. | |
2429 | ||
2430 | (3) Call tcg_register_jit_int, with the constructed .debug_frame. | |
2431 | */ | |
813da627 RH |
2432 | |
2433 | /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ | |
2434 | typedef enum { | |
2435 | JIT_NOACTION = 0, | |
2436 | JIT_REGISTER_FN, | |
2437 | JIT_UNREGISTER_FN | |
2438 | } jit_actions_t; | |
2439 | ||
2440 | struct jit_code_entry { | |
2441 | struct jit_code_entry *next_entry; | |
2442 | struct jit_code_entry *prev_entry; | |
2443 | const void *symfile_addr; | |
2444 | uint64_t symfile_size; | |
2445 | }; | |
2446 | ||
2447 | struct jit_descriptor { | |
2448 | uint32_t version; | |
2449 | uint32_t action_flag; | |
2450 | struct jit_code_entry *relevant_entry; | |
2451 | struct jit_code_entry *first_entry; | |
2452 | }; | |
2453 | ||
2454 | void __jit_debug_register_code(void) __attribute__((noinline)); | |
2455 | void __jit_debug_register_code(void) | |
2456 | { | |
2457 | asm(""); | |
2458 | } | |
2459 | ||
2460 | /* Must statically initialize the version, because GDB may check | |
2461 | the version before we can set it. */ | |
2462 | struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; | |
2463 | ||
2464 | /* End GDB interface. */ | |
2465 | ||
2466 | static int find_string(const char *strtab, const char *str) | |
2467 | { | |
2468 | const char *p = strtab + 1; | |
2469 | ||
2470 | while (1) { | |
2471 | if (strcmp(p, str) == 0) { | |
2472 | return p - strtab; | |
2473 | } | |
2474 | p += strlen(p) + 1; | |
2475 | } | |
2476 | } | |
2477 | ||
5872bbf2 | 2478 | static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, |
813da627 RH |
2479 | void *debug_frame, size_t debug_frame_size) |
2480 | { | |
5872bbf2 RH |
2481 | struct __attribute__((packed)) DebugInfo { |
2482 | uint32_t len; | |
2483 | uint16_t version; | |
2484 | uint32_t abbrev; | |
2485 | uint8_t ptr_size; | |
2486 | uint8_t cu_die; | |
2487 | uint16_t cu_lang; | |
2488 | uintptr_t cu_low_pc; | |
2489 | uintptr_t cu_high_pc; | |
2490 | uint8_t fn_die; | |
2491 | char fn_name[16]; | |
2492 | uintptr_t fn_low_pc; | |
2493 | uintptr_t fn_high_pc; | |
2494 | uint8_t cu_eoc; | |
2495 | }; | |
813da627 RH |
2496 | |
2497 | struct ElfImage { | |
2498 | ElfW(Ehdr) ehdr; | |
2499 | ElfW(Phdr) phdr; | |
5872bbf2 RH |
2500 | ElfW(Shdr) shdr[7]; |
2501 | ElfW(Sym) sym[2]; | |
2502 | struct DebugInfo di; | |
2503 | uint8_t da[24]; | |
2504 | char str[80]; | |
2505 | }; | |
2506 | ||
2507 | struct ElfImage *img; | |
2508 | ||
2509 | static const struct ElfImage img_template = { | |
2510 | .ehdr = { | |
2511 | .e_ident[EI_MAG0] = ELFMAG0, | |
2512 | .e_ident[EI_MAG1] = ELFMAG1, | |
2513 | .e_ident[EI_MAG2] = ELFMAG2, | |
2514 | .e_ident[EI_MAG3] = ELFMAG3, | |
2515 | .e_ident[EI_CLASS] = ELF_CLASS, | |
2516 | .e_ident[EI_DATA] = ELF_DATA, | |
2517 | .e_ident[EI_VERSION] = EV_CURRENT, | |
2518 | .e_type = ET_EXEC, | |
2519 | .e_machine = ELF_HOST_MACHINE, | |
2520 | .e_version = EV_CURRENT, | |
2521 | .e_phoff = offsetof(struct ElfImage, phdr), | |
2522 | .e_shoff = offsetof(struct ElfImage, shdr), | |
2523 | .e_ehsize = sizeof(ElfW(Shdr)), | |
2524 | .e_phentsize = sizeof(ElfW(Phdr)), | |
2525 | .e_phnum = 1, | |
2526 | .e_shentsize = sizeof(ElfW(Shdr)), | |
2527 | .e_shnum = ARRAY_SIZE(img->shdr), | |
2528 | .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, | |
abbb3eae RH |
2529 | #ifdef ELF_HOST_FLAGS |
2530 | .e_flags = ELF_HOST_FLAGS, | |
2531 | #endif | |
2532 | #ifdef ELF_OSABI | |
2533 | .e_ident[EI_OSABI] = ELF_OSABI, | |
2534 | #endif | |
5872bbf2 RH |
2535 | }, |
2536 | .phdr = { | |
2537 | .p_type = PT_LOAD, | |
2538 | .p_flags = PF_X, | |
2539 | }, | |
2540 | .shdr = { | |
2541 | [0] = { .sh_type = SHT_NULL }, | |
2542 | /* Trick: The contents of code_gen_buffer are not present in | |
2543 | this fake ELF file; that got allocated elsewhere. Therefore | |
2544 | we mark .text as SHT_NOBITS (similar to .bss) so that readers | |
2545 | will not look for contents. We can record any address. */ | |
2546 | [1] = { /* .text */ | |
2547 | .sh_type = SHT_NOBITS, | |
2548 | .sh_flags = SHF_EXECINSTR | SHF_ALLOC, | |
2549 | }, | |
2550 | [2] = { /* .debug_info */ | |
2551 | .sh_type = SHT_PROGBITS, | |
2552 | .sh_offset = offsetof(struct ElfImage, di), | |
2553 | .sh_size = sizeof(struct DebugInfo), | |
2554 | }, | |
2555 | [3] = { /* .debug_abbrev */ | |
2556 | .sh_type = SHT_PROGBITS, | |
2557 | .sh_offset = offsetof(struct ElfImage, da), | |
2558 | .sh_size = sizeof(img->da), | |
2559 | }, | |
2560 | [4] = { /* .debug_frame */ | |
2561 | .sh_type = SHT_PROGBITS, | |
2562 | .sh_offset = sizeof(struct ElfImage), | |
2563 | }, | |
2564 | [5] = { /* .symtab */ | |
2565 | .sh_type = SHT_SYMTAB, | |
2566 | .sh_offset = offsetof(struct ElfImage, sym), | |
2567 | .sh_size = sizeof(img->sym), | |
2568 | .sh_info = 1, | |
2569 | .sh_link = ARRAY_SIZE(img->shdr) - 1, | |
2570 | .sh_entsize = sizeof(ElfW(Sym)), | |
2571 | }, | |
2572 | [6] = { /* .strtab */ | |
2573 | .sh_type = SHT_STRTAB, | |
2574 | .sh_offset = offsetof(struct ElfImage, str), | |
2575 | .sh_size = sizeof(img->str), | |
2576 | } | |
2577 | }, | |
2578 | .sym = { | |
2579 | [1] = { /* code_gen_buffer */ | |
2580 | .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), | |
2581 | .st_shndx = 1, | |
2582 | } | |
2583 | }, | |
2584 | .di = { | |
2585 | .len = sizeof(struct DebugInfo) - 4, | |
2586 | .version = 2, | |
2587 | .ptr_size = sizeof(void *), | |
2588 | .cu_die = 1, | |
2589 | .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ | |
2590 | .fn_die = 2, | |
2591 | .fn_name = "code_gen_buffer" | |
2592 | }, | |
2593 | .da = { | |
2594 | 1, /* abbrev number (the cu) */ | |
2595 | 0x11, 1, /* DW_TAG_compile_unit, has children */ | |
2596 | 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ | |
2597 | 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ | |
2598 | 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ | |
2599 | 0, 0, /* end of abbrev */ | |
2600 | 2, /* abbrev number (the fn) */ | |
2601 | 0x2e, 0, /* DW_TAG_subprogram, no children */ | |
2602 | 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ | |
2603 | 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ | |
2604 | 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ | |
2605 | 0, 0, /* end of abbrev */ | |
2606 | 0 /* no more abbrev */ | |
2607 | }, | |
2608 | .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" | |
2609 | ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", | |
813da627 RH |
2610 | }; |
2611 | ||
2612 | /* We only need a single jit entry; statically allocate it. */ | |
2613 | static struct jit_code_entry one_entry; | |
2614 | ||
5872bbf2 | 2615 | uintptr_t buf = (uintptr_t)buf_ptr; |
813da627 | 2616 | size_t img_size = sizeof(struct ElfImage) + debug_frame_size; |
813da627 | 2617 | |
5872bbf2 RH |
2618 | img = g_malloc(img_size); |
2619 | *img = img_template; | |
2620 | memcpy(img + 1, debug_frame, debug_frame_size); | |
813da627 | 2621 | |
5872bbf2 RH |
2622 | img->phdr.p_vaddr = buf; |
2623 | img->phdr.p_paddr = buf; | |
2624 | img->phdr.p_memsz = buf_size; | |
813da627 | 2625 | |
813da627 | 2626 | img->shdr[1].sh_name = find_string(img->str, ".text"); |
5872bbf2 | 2627 | img->shdr[1].sh_addr = buf; |
813da627 RH |
2628 | img->shdr[1].sh_size = buf_size; |
2629 | ||
5872bbf2 RH |
2630 | img->shdr[2].sh_name = find_string(img->str, ".debug_info"); |
2631 | img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); | |
2632 | ||
2633 | img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); | |
2634 | img->shdr[4].sh_size = debug_frame_size; | |
2635 | ||
2636 | img->shdr[5].sh_name = find_string(img->str, ".symtab"); | |
2637 | img->shdr[6].sh_name = find_string(img->str, ".strtab"); | |
2638 | ||
2639 | img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); | |
2640 | img->sym[1].st_value = buf; | |
2641 | img->sym[1].st_size = buf_size; | |
813da627 | 2642 | |
5872bbf2 RH |
2643 | img->di.cu_low_pc = buf; |
2644 | img->di.cu_high_pc = buf_size; | |
2645 | img->di.fn_low_pc = buf; | |
2646 | img->di.fn_high_pc = buf_size; | |
813da627 RH |
2647 | |
2648 | #ifdef DEBUG_JIT | |
2649 | /* Enable this block to be able to debug the ELF image file creation. | |
2650 | One can use readelf, objdump, or other inspection utilities. */ | |
2651 | { | |
2652 | FILE *f = fopen("/tmp/qemu.jit", "w+b"); | |
2653 | if (f) { | |
5872bbf2 | 2654 | if (fwrite(img, img_size, 1, f) != img_size) { |
813da627 RH |
2655 | /* Avoid stupid unused return value warning for fwrite. */ |
2656 | } | |
2657 | fclose(f); | |
2658 | } | |
2659 | } | |
2660 | #endif | |
2661 | ||
2662 | one_entry.symfile_addr = img; | |
2663 | one_entry.symfile_size = img_size; | |
2664 | ||
2665 | __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; | |
2666 | __jit_debug_descriptor.relevant_entry = &one_entry; | |
2667 | __jit_debug_descriptor.first_entry = &one_entry; | |
2668 | __jit_debug_register_code(); | |
2669 | } | |
2670 | #else | |
5872bbf2 RH |
2671 | /* No support for the feature. Provide the entry point expected by exec.c, |
2672 | and implement the internal function we declared earlier. */ | |
813da627 RH |
2673 | |
2674 | static void tcg_register_jit_int(void *buf, size_t size, | |
2675 | void *debug_frame, size_t debug_frame_size) | |
2676 | { | |
2677 | } | |
2678 | ||
2679 | void tcg_register_jit(void *buf, size_t buf_size) | |
2680 | { | |
2681 | } | |
2682 | #endif /* ELF_HOST_MACHINE */ |