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1/*
2 * QEMU ES1370 emulation
3 *
4 * Copyright (c) 2005 Vassili Karpov (malc)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* #define DEBUG_ES1370 */
26/* #define VERBOSE_ES1370 */
27#define SILENT_ES1370
28
6086a565 29#include "qemu/osdep.h"
83c9f4ca 30#include "hw/hw.h"
8a824e4d 31#include "hw/audio/soundhw.h"
87ecb68b 32#include "audio/audio.h"
83c9f4ca 33#include "hw/pci/pci.h"
9c17d615 34#include "sysemu/dma.h"
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35
36/* Missing stuff:
37 SCTRL_P[12](END|ST)INC
38 SCTRL_P1SCTRLD
39 SCTRL_P2DACSEN
40 CTRL_DAC_SYNC
41 MIDI
42 non looped mode
43 surely more
44*/
45
46/*
47 Following macros and samplerate array were copied verbatim from
48 Linux kernel 2.4.30: drivers/sound/es1370.c
49
50 Copyright (C) 1998-2001, 2003 Thomas Sailer ([email protected])
51*/
52
53/* Start blatant GPL violation */
54
55#define ES1370_REG_CONTROL 0x00
56#define ES1370_REG_STATUS 0x04
57#define ES1370_REG_UART_DATA 0x08
58#define ES1370_REG_UART_STATUS 0x09
59#define ES1370_REG_UART_CONTROL 0x09
60#define ES1370_REG_UART_TEST 0x0a
61#define ES1370_REG_MEMPAGE 0x0c
62#define ES1370_REG_CODEC 0x10
63#define ES1370_REG_SERIAL_CONTROL 0x20
64#define ES1370_REG_DAC1_SCOUNT 0x24
65#define ES1370_REG_DAC2_SCOUNT 0x28
66#define ES1370_REG_ADC_SCOUNT 0x2c
67
68#define ES1370_REG_DAC1_FRAMEADR 0xc30
69#define ES1370_REG_DAC1_FRAMECNT 0xc34
70#define ES1370_REG_DAC2_FRAMEADR 0xc38
71#define ES1370_REG_DAC2_FRAMECNT 0xc3c
72#define ES1370_REG_ADC_FRAMEADR 0xd30
73#define ES1370_REG_ADC_FRAMECNT 0xd34
74#define ES1370_REG_PHANTOM_FRAMEADR 0xd38
75#define ES1370_REG_PHANTOM_FRAMECNT 0xd3c
76
77static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
78
79#define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
80#define DAC2_DIVTOSR(x) (1411200/((x)+2))
81
82#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */
83#define CTRL_XCTL1 0x40000000 /* electret mic bias */
84#define CTRL_OPEN 0x20000000 /* no function, can be read and written */
85#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */
86#define CTRL_SH_PCLKDIV 16
87#define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
88#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
89#define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
90#define CTRL_SH_WTSRSEL 12
91#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */
92#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
93#define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */
94#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */
95#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
96#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
97#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
98#define CTRL_ADC_EN 0x00000010 /* enable ADC */
99#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
100#define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */
101#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */
102#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */
103
104#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
105#define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */
106#define STAT_CBUSY 0x00000200 /* 1 = codec busy */
107#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */
108#define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
109#define STAT_SH_VC 5
110#define STAT_MCCB 0x00000010 /* CCB int pending */
111#define STAT_UART 0x00000008 /* UART int pending */
112#define STAT_DAC1 0x00000004 /* DAC1 int pending */
113#define STAT_DAC2 0x00000002 /* DAC2 int pending */
114#define STAT_ADC 0x00000001 /* ADC int pending */
115
116#define USTAT_RXINT 0x80 /* UART rx int pending */
117#define USTAT_TXINT 0x04 /* UART tx int pending */
118#define USTAT_TXRDY 0x02 /* UART tx ready */
119#define USTAT_RXRDY 0x01 /* UART rx ready */
120
121#define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
122#define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
123#define UCTRL_ENA_TXINT 0x20 /* enable TX int */
124#define UCTRL_CNTRL 0x03 /* control field */
125#define UCTRL_CNTRL_SWR 0x03 /* software reset command */
126
127#define SCTRL_P2ENDINC 0x00380000 /* */
128#define SCTRL_SH_P2ENDINC 19
129#define SCTRL_P2STINC 0x00070000 /* */
130#define SCTRL_SH_P2STINC 16
131#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
132#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
133#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
134#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
135#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
136#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
137#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
138#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
139#define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
140#define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
141#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
142#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
143#define SCTRL_R1FMT 0x00000030 /* format mask */
144#define SCTRL_SH_R1FMT 4
145#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
146#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
147#define SCTRL_P2FMT 0x0000000c /* format mask */
148#define SCTRL_SH_P2FMT 2
149#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
150#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
151#define SCTRL_P1FMT 0x00000003 /* format mask */
152#define SCTRL_SH_P1FMT 0
153
154/* End blatant GPL violation */
155
156#define NB_CHANNELS 3
157#define DAC1_CHANNEL 0
158#define DAC2_CHANNEL 1
159#define ADC_CHANNEL 2
160
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161static void es1370_dac1_callback (void *opaque, int free);
162static void es1370_dac2_callback (void *opaque, int free);
163static void es1370_adc_callback (void *opaque, int avail);
164
165#ifdef DEBUG_ES1370
166
167#define ldebug(...) AUD_log ("es1370", __VA_ARGS__)
168
169static void print_ctl (uint32_t val)
170{
171 char buf[1024];
172
173 buf[0] = '\0';
174#define a(n) if (val & CTRL_##n) strcat (buf, " "#n)
175 a (ADC_STOP);
176 a (XCTL1);
177 a (OPEN);
178 a (MSFMTSEL);
179 a (M_SBB);
180 a (DAC_SYNC);
181 a (CCB_INTRM);
182 a (M_CB);
183 a (XCTL0);
184 a (BREQ);
185 a (DAC1_EN);
186 a (DAC2_EN);
187 a (ADC_EN);
188 a (UART_EN);
189 a (JYSTK_EN);
190 a (CDC_EN);
191 a (SERR_DIS);
192#undef a
193 AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n",
194 (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV,
195 DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
196 dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
197 buf);
198}
199
200static void print_sctl (uint32_t val)
201{
202 static const char *fmt_names[] = {"8M", "8S", "16M", "16S"};
203 char buf[1024];
204
205 buf[0] = '\0';
206
207#define a(n) if (val & SCTRL_##n) strcat (buf, " "#n)
208#define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n)
209 b (R1LOOPSEL);
210 b (P2LOOPSEL);
211 b (P1LOOPSEL);
212 a (P2PAUSE);
213 a (P1PAUSE);
214 a (R1INTEN);
215 a (P2INTEN);
216 a (P1INTEN);
217 a (P1SCTRLD);
218 a (P2DACSEN);
219 if (buf[0]) {
220 strcat (buf, "\n ");
221 }
222 else {
223 buf[0] = ' ';
224 buf[1] = '\0';
225 }
226#undef b
227#undef a
228 AUD_log ("es1370",
229 "%s"
230 "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
231 buf,
232 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
233 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
234 fmt_names [(val >> SCTRL_SH_R1FMT) & 3],
235 fmt_names [(val >> SCTRL_SH_P2FMT) & 3],
236 fmt_names [(val >> SCTRL_SH_P1FMT) & 3]
237 );
238}
239#else
240#define ldebug(...)
241#define print_ctl(...)
242#define print_sctl(...)
243#endif
244
245#ifdef VERBOSE_ES1370
246#define dolog(...) AUD_log ("es1370", __VA_ARGS__)
247#else
248#define dolog(...)
249#endif
250
251#ifndef SILENT_ES1370
946fc947 252#define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__)
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253#else
254#define lwarn(...)
255#endif
256
257struct chan {
258 uint32_t shift;
259 uint32_t leftover;
260 uint32_t scount;
261 uint32_t frame_addr;
262 uint32_t frame_cnt;
263};
264
265typedef struct ES1370State {
e5944641 266 PCIDevice dev;
c0fe3827 267 QEMUSoundCard card;
e1a99dbd 268 MemoryRegion io;
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269 struct chan chan[NB_CHANNELS];
270 SWVoiceOut *dac_voice[2];
271 SWVoiceIn *adc_voice;
272
273 uint32_t ctl;
274 uint32_t status;
275 uint32_t mempage;
276 uint32_t codec;
277 uint32_t sctl;
278} ES1370State;
279
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280struct chan_bits {
281 uint32_t ctl_en;
282 uint32_t stat_int;
283 uint32_t sctl_pause;
284 uint32_t sctl_inten;
285 uint32_t sctl_fmt;
286 uint32_t sctl_sh_fmt;
287 uint32_t sctl_loopsel;
288 void (*calc_freq) (ES1370State *s, uint32_t ctl,
289 uint32_t *old_freq, uint32_t *new_freq);
290};
291
0d769044
C
292#define TYPE_ES1370 "ES1370"
293#define ES1370(obj) \
294 OBJECT_CHECK(ES1370State, (obj), TYPE_ES1370)
295
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296static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
297 uint32_t *old_freq, uint32_t *new_freq);
298static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
299 uint32_t *old_freq,
300 uint32_t *new_freq);
301
302static const struct chan_bits es1370_chan_bits[] = {
303 {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN,
304 SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL,
305 es1370_dac1_calc_freq},
306
307 {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN,
308 SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL,
309 es1370_dac2_and_adc_calc_freq},
310
311 {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN,
312 SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL,
313 es1370_dac2_and_adc_calc_freq}
314};
315
316static void es1370_update_status (ES1370State *s, uint32_t new_status)
317{
318 uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC);
319
320 if (level) {
321 s->status = new_status | STAT_INTR;
322 }
323 else {
324 s->status = new_status & ~STAT_INTR;
325 }
9e64f8a3 326 pci_set_irq(&s->dev, !!level);
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327}
328
329static void es1370_reset (ES1370State *s)
330{
331 size_t i;
332
333 s->ctl = 1;
334 s->status = 0x60;
335 s->mempage = 0;
336 s->codec = 0;
337 s->sctl = 0;
338
339 for (i = 0; i < NB_CHANNELS; ++i) {
340 struct chan *d = &s->chan[i];
341 d->scount = 0;
342 d->leftover = 0;
343 if (i == ADC_CHANNEL) {
c0fe3827 344 AUD_close_in (&s->card, s->adc_voice);
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345 s->adc_voice = NULL;
346 }
347 else {
c0fe3827 348 AUD_close_out (&s->card, s->dac_voice[i]);
1d14ffa9
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349 s->dac_voice[i] = NULL;
350 }
351 }
9e64f8a3 352 pci_irq_deassert(&s->dev);
1d14ffa9
FB
353}
354
355static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl)
356{
357 uint32_t new_status = s->status;
358
359 if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) {
360 new_status &= ~STAT_DAC1;
361 }
362
363 if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) {
364 new_status &= ~STAT_DAC2;
365 }
366
367 if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) {
368 new_status &= ~STAT_ADC;
369 }
370
371 if (new_status != s->status) {
372 es1370_update_status (s, new_status);
373 }
374}
375
376static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
377 uint32_t *old_freq, uint32_t *new_freq)
378
379{
380 *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
381 *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
382}
383
384static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
385 uint32_t *old_freq,
386 uint32_t *new_freq)
387
388{
389 uint32_t old_pclkdiv, new_pclkdiv;
390
391 new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
392 old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
393 *new_freq = DAC2_DIVTOSR (new_pclkdiv);
394 *old_freq = DAC2_DIVTOSR (old_pclkdiv);
395}
396
397static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl)
398{
399 size_t i;
400 uint32_t old_freq, new_freq, old_fmt, new_fmt;
401
402 for (i = 0; i < NB_CHANNELS; ++i) {
403 struct chan *d = &s->chan[i];
404 const struct chan_bits *b = &es1370_chan_bits[i];
405
406 new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
407 old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
408
409 b->calc_freq (s, ctl, &old_freq, &new_freq);
410
411 if ((old_fmt != new_fmt) || (old_freq != new_freq)) {
412 d->shift = (new_fmt & 1) + (new_fmt >> 1);
f8687bab 413 ldebug ("channel %zu, freq = %d, nchannels %d, fmt %d, shift %d\n",
1d14ffa9
FB
414 i,
415 new_freq,
416 1 << (new_fmt & 1),
417 (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8,
418 d->shift);
419 if (new_freq) {
1ea879e5 420 struct audsettings as;
c0fe3827
FB
421
422 as.freq = new_freq;
423 as.nchannels = 1 << (new_fmt & 1);
424 as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8;
d929eba5 425 as.endianness = 0;
c0fe3827 426
1d14ffa9
FB
427 if (i == ADC_CHANNEL) {
428 s->adc_voice =
429 AUD_open_in (
c0fe3827 430 &s->card,
1d14ffa9
FB
431 s->adc_voice,
432 "es1370.adc",
433 s,
434 es1370_adc_callback,
d929eba5 435 &as
1d14ffa9
FB
436 );
437 }
438 else {
439 s->dac_voice[i] =
440 AUD_open_out (
c0fe3827 441 &s->card,
1d14ffa9
FB
442 s->dac_voice[i],
443 i ? "es1370.dac2" : "es1370.dac1",
444 s,
445 i ? es1370_dac2_callback : es1370_dac1_callback,
d929eba5 446 &as
1d14ffa9
FB
447 );
448 }
449 }
450 }
451
452 if (((ctl ^ s->ctl) & b->ctl_en)
453 || ((sctl ^ s->sctl) & b->sctl_pause)) {
454 int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause);
455
456 if (i == ADC_CHANNEL) {
457 AUD_set_active_in (s->adc_voice, on);
458 }
459 else {
460 AUD_set_active_out (s->dac_voice[i], on);
461 }
462 }
463 }
464
465 s->ctl = ctl;
466 s->sctl = sctl;
467}
468
469static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr)
470{
471 addr &= 0xff;
472 if (addr >= 0x30 && addr <= 0x3f)
473 addr |= s->mempage << 8;
474 return addr;
475}
476
154c1d1f 477static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
1d14ffa9
FB
478{
479 ES1370State *s = opaque;
480 struct chan *d = &s->chan[0];
481
482 addr = es1370_fixup (s, addr);
483
484 switch (addr) {
485 case ES1370_REG_CONTROL:
486 es1370_update_voices (s, val, s->sctl);
487 print_ctl (val);
488 break;
489
490 case ES1370_REG_MEMPAGE:
491 s->mempage = val & 0xf;
492 break;
493
494 case ES1370_REG_SERIAL_CONTROL:
495 es1370_maybe_lower_irq (s, val);
496 es1370_update_voices (s, s->ctl, val);
497 print_sctl (val);
498 break;
499
1d14ffa9 500 case ES1370_REG_DAC1_SCOUNT:
154c1d1f
PB
501 case ES1370_REG_DAC2_SCOUNT:
502 case ES1370_REG_ADC_SCOUNT:
503 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
1d14ffa9 504 d->scount = (val & 0xffff) | (d->scount & ~0xffff);
f8687bab 505 ldebug ("chan %td CURR_SAMP_CT %d, SAMP_CT %d\n",
1d14ffa9
FB
506 d - &s->chan[0], val >> 16, (val & 0xffff));
507 break;
508
cf9270e5
PB
509 case ES1370_REG_ADC_FRAMEADR:
510 d += 2;
511 goto frameadr;
1d14ffa9 512 case ES1370_REG_DAC1_FRAMEADR:
154c1d1f 513 case ES1370_REG_DAC2_FRAMEADR:
154c1d1f 514 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
cf9270e5 515 frameadr:
1d14ffa9 516 d->frame_addr = val;
f8687bab 517 ldebug ("chan %td frame address %#x\n", d - &s->chan[0], val);
1d14ffa9
FB
518 break;
519
946fc947
FB
520 case ES1370_REG_PHANTOM_FRAMECNT:
521 lwarn ("writing to phantom frame count %#x\n", val);
522 break;
523 case ES1370_REG_PHANTOM_FRAMEADR:
524 lwarn ("writing to phantom frame address %#x\n", val);
525 break;
526
cf9270e5
PB
527 case ES1370_REG_ADC_FRAMECNT:
528 d += 2;
529 goto framecnt;
1d14ffa9 530 case ES1370_REG_DAC1_FRAMECNT:
154c1d1f 531 case ES1370_REG_DAC2_FRAMECNT:
154c1d1f 532 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
cf9270e5 533 framecnt:
1d14ffa9
FB
534 d->frame_cnt = val;
535 d->leftover = 0;
f8687bab 536 ldebug ("chan %td frame count %d, buffer size %d\n",
1d14ffa9
FB
537 d - &s->chan[0], val >> 16, val & 0xffff);
538 break;
539
540 default:
541 lwarn ("writel %#x <- %#x\n", addr, val);
542 break;
543 }
544}
545
154c1d1f 546static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size)
1d14ffa9
FB
547{
548 ES1370State *s = opaque;
549 uint32_t val;
550 struct chan *d = &s->chan[0];
551
552 addr = es1370_fixup (s, addr);
553
554 switch (addr) {
555 case ES1370_REG_CONTROL:
556 val = s->ctl;
557 break;
558 case ES1370_REG_STATUS:
559 val = s->status;
560 break;
561 case ES1370_REG_MEMPAGE:
562 val = s->mempage;
563 break;
564 case ES1370_REG_CODEC:
565 val = s->codec;
566 break;
567 case ES1370_REG_SERIAL_CONTROL:
568 val = s->sctl;
569 break;
570
1d14ffa9 571 case ES1370_REG_DAC1_SCOUNT:
154c1d1f
PB
572 case ES1370_REG_DAC2_SCOUNT:
573 case ES1370_REG_ADC_SCOUNT:
574 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
1d14ffa9
FB
575 val = d->scount;
576#ifdef DEBUG_ES1370
577 {
578 uint32_t curr_count = d->scount >> 16;
579 uint32_t count = d->scount & 0xffff;
580
581 curr_count <<= d->shift;
582 count <<= d->shift;
583 dolog ("read scount curr %d, total %d\n", curr_count, count);
584 }
585#endif
586 break;
587
24f7973b
PB
588 case ES1370_REG_ADC_FRAMECNT:
589 d += 2;
590 goto framecnt;
1d14ffa9 591 case ES1370_REG_DAC1_FRAMECNT:
154c1d1f 592 case ES1370_REG_DAC2_FRAMECNT:
154c1d1f 593 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
24f7973b 594 framecnt:
1d14ffa9
FB
595 val = d->frame_cnt;
596#ifdef DEBUG_ES1370
597 {
598 uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2;
599 uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2;
f8687bab 600 if (curr > size) {
1d14ffa9
FB
601 dolog ("read framecnt curr %d, size %d %d\n", curr, size,
602 curr > size);
f8687bab 603 }
1d14ffa9
FB
604 }
605#endif
606 break;
607
24f7973b
PB
608 case ES1370_REG_ADC_FRAMEADR:
609 d += 2;
610 goto frameadr;
1d14ffa9 611 case ES1370_REG_DAC1_FRAMEADR:
154c1d1f 612 case ES1370_REG_DAC2_FRAMEADR:
154c1d1f 613 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
24f7973b 614 frameadr:
1d14ffa9
FB
615 val = d->frame_addr;
616 break;
617
946fc947
FB
618 case ES1370_REG_PHANTOM_FRAMECNT:
619 val = ~0U;
620 lwarn ("reading from phantom frame count\n");
621 break;
622 case ES1370_REG_PHANTOM_FRAMEADR:
623 val = ~0U;
624 lwarn ("reading from phantom frame address\n");
625 break;
626
1d14ffa9
FB
627 default:
628 val = ~0U;
629 lwarn ("readl %#x -> %#x\n", addr, val);
630 break;
631 }
632 return val;
633}
634
1d14ffa9
FB
635static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel,
636 int max, int *irq)
637{
638 uint8_t tmpbuf[4096];
639 uint32_t addr = d->frame_addr;
640 int sc = d->scount & 0xffff;
641 int csc = d->scount >> 16;
642 int csc_bytes = (csc + 1) << d->shift;
643 int cnt = d->frame_cnt >> 16;
644 int size = d->frame_cnt & 0xffff;
645 int left = ((size - cnt + 1) << 2) + d->leftover;
a1b6abe7 646 int transferred = 0;
1d14ffa9
FB
647 int temp = audio_MIN (max, audio_MIN (left, csc_bytes));
648 int index = d - &s->chan[0];
649
650 addr += (cnt << 2) + d->leftover;
651
652 if (index == ADC_CHANNEL) {
653 while (temp) {
654 int acquired, to_copy;
655
c0fe3827 656 to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf));
1d14ffa9
FB
657 acquired = AUD_read (s->adc_voice, tmpbuf, to_copy);
658 if (!acquired)
659 break;
660
3204db98 661 pci_dma_write (&s->dev, addr, tmpbuf, acquired);
1d14ffa9
FB
662
663 temp -= acquired;
664 addr += acquired;
a1b6abe7 665 transferred += acquired;
1d14ffa9
FB
666 }
667 }
668 else {
669 SWVoiceOut *voice = s->dac_voice[index];
670
671 while (temp) {
672 int copied, to_copy;
673
c0fe3827 674 to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf));
3204db98 675 pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
1d14ffa9
FB
676 copied = AUD_write (voice, tmpbuf, to_copy);
677 if (!copied)
678 break;
679 temp -= copied;
680 addr += copied;
a1b6abe7 681 transferred += copied;
1d14ffa9
FB
682 }
683 }
684
a1b6abe7 685 if (csc_bytes == transferred) {
1d14ffa9
FB
686 *irq = 1;
687 d->scount = sc | (sc << 16);
688 ldebug ("sc = %d, rate = %f\n",
689 (sc + 1) << d->shift,
690 (sc + 1) / (double) 44100);
691 }
692 else {
693 *irq = 0;
a1b6abe7 694 d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16);
1d14ffa9
FB
695 }
696
a1b6abe7 697 cnt += (transferred + d->leftover) >> 2;
1d14ffa9
FB
698
699 if (s->sctl & loop_sel) {
700 /* Bah, how stupid is that having a 0 represent true value?
701 i just spent few hours on this shit */
946fc947 702 AUD_log ("es1370: warning", "non looping mode\n");
1d14ffa9
FB
703 }
704 else {
705 d->frame_cnt = size;
706
c0fe3827 707 if ((uint32_t) cnt <= d->frame_cnt)
1d14ffa9
FB
708 d->frame_cnt |= cnt << 16;
709 }
710
a1b6abe7 711 d->leftover = (transferred + d->leftover) & 3;
1d14ffa9
FB
712}
713
714static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail)
715{
716 uint32_t new_status = s->status;
717 int max_bytes, irq;
718 struct chan *d = &s->chan[chan];
719 const struct chan_bits *b = &es1370_chan_bits[chan];
720
721 if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) {
722 return;
723 }
724
725 max_bytes = free_or_avail;
726 max_bytes &= ~((1 << d->shift) - 1);
727 if (!max_bytes) {
728 return;
729 }
730
731 es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq);
732
733 if (irq) {
734 if (s->sctl & b->sctl_inten) {
735 new_status |= b->stat_int;
736 }
737 }
738
739 if (new_status != s->status) {
740 es1370_update_status (s, new_status);
741 }
742}
743
744static void es1370_dac1_callback (void *opaque, int free)
745{
746 ES1370State *s = opaque;
747
748 es1370_run_channel (s, DAC1_CHANNEL, free);
749}
750
751static void es1370_dac2_callback (void *opaque, int free)
752{
753 ES1370State *s = opaque;
754
755 es1370_run_channel (s, DAC2_CHANNEL, free);
756}
757
758static void es1370_adc_callback (void *opaque, int avail)
759{
760 ES1370State *s = opaque;
761
762 es1370_run_channel (s, ADC_CHANNEL, avail);
763}
764
e1a99dbd 765static const MemoryRegionOps es1370_io_ops = {
f3726fd7
AG
766 .read = es1370_read,
767 .write = es1370_write,
154c1d1f 768 .valid = {
f3726fd7
AG
769 .min_access_size = 1,
770 .max_access_size = 4,
771 },
154c1d1f
PB
772 .impl = {
773 .min_access_size = 4,
774 .max_access_size = 4,
775 },
e1a99dbd
AK
776 .endianness = DEVICE_LITTLE_ENDIAN,
777};
1d14ffa9 778
3a14c2df
JQ
779static const VMStateDescription vmstate_es1370_channel = {
780 .name = "es1370_channel",
781 .version_id = 2,
782 .minimum_version_id = 2,
d49805ae 783 .fields = (VMStateField[]) {
cf4dc461 784 VMSTATE_UINT32 (shift, struct chan),
785 VMSTATE_UINT32 (leftover, struct chan),
786 VMSTATE_UINT32 (scount, struct chan),
787 VMSTATE_UINT32 (frame_addr, struct chan),
788 VMSTATE_UINT32 (frame_cnt, struct chan),
789 VMSTATE_END_OF_LIST ()
1d14ffa9 790 }
3a14c2df 791};
1d14ffa9 792
3a14c2df 793static int es1370_post_load (void *opaque, int version_id)
1d14ffa9
FB
794{
795 uint32_t ctl, sctl;
796 ES1370State *s = opaque;
797 size_t i;
798
1d14ffa9 799 for (i = 0; i < NB_CHANNELS; ++i) {
1d14ffa9
FB
800 if (i == ADC_CHANNEL) {
801 if (s->adc_voice) {
c0fe3827 802 AUD_close_in (&s->card, s->adc_voice);
1d14ffa9
FB
803 s->adc_voice = NULL;
804 }
805 }
806 else {
807 if (s->dac_voice[i]) {
c0fe3827 808 AUD_close_out (&s->card, s->dac_voice[i]);
1d14ffa9
FB
809 s->dac_voice[i] = NULL;
810 }
811 }
812 }
813
3a14c2df
JQ
814 ctl = s->ctl;
815 sctl = s->sctl;
1d14ffa9
FB
816 s->ctl = 0;
817 s->sctl = 0;
818 es1370_update_voices (s, ctl, sctl);
819 return 0;
820}
821
3a14c2df
JQ
822static const VMStateDescription vmstate_es1370 = {
823 .name = "es1370",
824 .version_id = 2,
825 .minimum_version_id = 2,
3a14c2df 826 .post_load = es1370_post_load,
d49805ae 827 .fields = (VMStateField[]) {
cf4dc461 828 VMSTATE_PCI_DEVICE (dev, ES1370State),
829 VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2,
830 vmstate_es1370_channel, struct chan),
831 VMSTATE_UINT32 (ctl, ES1370State),
832 VMSTATE_UINT32 (status, ES1370State),
833 VMSTATE_UINT32 (mempage, ES1370State),
834 VMSTATE_UINT32 (codec, ES1370State),
835 VMSTATE_UINT32 (sctl, ES1370State),
836 VMSTATE_END_OF_LIST ()
3a14c2df
JQ
837 }
838};
839
11f547e5 840static void es1370_on_reset(DeviceState *dev)
1d14ffa9 841{
11f547e5 842 ES1370State *s = container_of(dev, ES1370State, dev.qdev);
1d14ffa9
FB
843 es1370_reset (s);
844}
845
9af21dbe 846static void es1370_realize(PCIDevice *dev, Error **errp)
1d14ffa9 847{
0d769044 848 ES1370State *s = ES1370(dev);
e5944641 849 uint8_t *c = s->dev.config;
1d14ffa9 850
d3e2f135 851 c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8;
1d14ffa9 852
0b8c537f 853#if 0
d3e2f135
MT
854 c[PCI_CAPABILITY_LIST] = 0xdc;
855 c[PCI_INTERRUPT_LINE] = 10;
1d14ffa9
FB
856 c[0xdc] = 0x00;
857#endif
858
d3e2f135
MT
859 c[PCI_INTERRUPT_PIN] = 1;
860 c[PCI_MIN_GNT] = 0x0c;
861 c[PCI_MAX_LAT] = 0x80;
1d14ffa9 862
64bde0f3 863 memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256);
e824b2cc 864 pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
c0fe3827 865
1a7dafce 866 AUD_register_card ("es1370", &s->card);
1d14ffa9 867 es1370_reset (s);
6806e595
GH
868}
869
069eb7b2
LQ
870static void es1370_exit(PCIDevice *dev)
871{
872 ES1370State *s = ES1370(dev);
873 int i;
874
875 for (i = 0; i < 2; ++i) {
876 AUD_close_out(&s->card, s->dac_voice[i]);
877 }
878
879 AUD_close_in(&s->card, s->adc_voice);
880 AUD_remove_card(&s->card);
881}
882
36cd6f6f 883static int es1370_init (PCIBus *bus)
6806e595 884{
0d769044 885 pci_create_simple (bus, -1, TYPE_ES1370);
1d14ffa9
FB
886 return 0;
887}
6806e595 888
cf4dc461 889static void es1370_class_init (ObjectClass *klass, void *data)
40021f08 890{
cf4dc461 891 DeviceClass *dc = DEVICE_CLASS (klass);
892 PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
40021f08 893
9af21dbe 894 k->realize = es1370_realize;
069eb7b2 895 k->exit = es1370_exit;
40021f08
AL
896 k->vendor_id = PCI_VENDOR_ID_ENSONIQ;
897 k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370;
898 k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
899 k->subsystem_vendor_id = 0x4942;
900 k->subsystem_id = 0x4c4c;
125ee0ed 901 set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
39bffca2
AL
902 dc->desc = "ENSONIQ AudioPCI ES1370";
903 dc->vmsd = &vmstate_es1370;
11f547e5 904 dc->reset = es1370_on_reset;
40021f08
AL
905}
906
8c43a6f0 907static const TypeInfo es1370_info = {
0d769044 908 .name = TYPE_ES1370,
39bffca2
AL
909 .parent = TYPE_PCI_DEVICE,
910 .instance_size = sizeof (ES1370State),
911 .class_init = es1370_class_init,
fd3b02c8
EH
912 .interfaces = (InterfaceInfo[]) {
913 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
914 { },
915 },
6806e595
GH
916};
917
83f7d43a 918static void es1370_register_types (void)
6806e595 919{
cf4dc461 920 type_register_static (&es1370_info);
36cd6f6f 921 pci_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370", es1370_init);
6806e595 922}
83f7d43a
AF
923
924type_init (es1370_register_types)
6806e595 925
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