]>
Commit | Line | Data |
---|---|---|
525bd324 AG |
1 | /* |
2 | * QEMU Moxie CPU | |
3 | * | |
4 | * Copyright (c) 2013 Anthony Green | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2.1 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
70c9483a | 16 | * You should have received a copy of the GNU Lesser General Public License |
525bd324 AG |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
18 | */ | |
19 | ||
d24688fb | 20 | #include "qemu/osdep.h" |
da34e65c | 21 | #include "qapi/error.h" |
525bd324 | 22 | #include "cpu.h" |
525bd324 AG |
23 | #include "migration/vmstate.h" |
24 | #include "machine.h" | |
25 | ||
a10b978c AF |
26 | static void moxie_cpu_set_pc(CPUState *cs, vaddr value) |
27 | { | |
28 | MoxieCPU *cpu = MOXIE_CPU(cs); | |
29 | ||
30 | cpu->env.pc = value; | |
31 | } | |
32 | ||
8c2e1b00 AF |
33 | static bool moxie_cpu_has_work(CPUState *cs) |
34 | { | |
35 | return cs->interrupt_request & CPU_INTERRUPT_HARD; | |
36 | } | |
37 | ||
781c67ca | 38 | static void moxie_cpu_reset(DeviceState *dev) |
525bd324 | 39 | { |
781c67ca | 40 | CPUState *s = CPU(dev); |
525bd324 AG |
41 | MoxieCPU *cpu = MOXIE_CPU(s); |
42 | MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(cpu); | |
43 | CPUMoxieState *env = &cpu->env; | |
44 | ||
781c67ca | 45 | mcc->parent_reset(dev); |
525bd324 | 46 | |
1f5c00cf | 47 | memset(env, 0, offsetof(CPUMoxieState, end_reset_fields)); |
525bd324 | 48 | env->pc = 0x1000; |
525bd324 AG |
49 | } |
50 | ||
9f87a4ca PC |
51 | static void moxie_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
52 | { | |
53 | info->mach = bfd_arch_moxie; | |
54 | info->print_insn = print_insn_moxie; | |
55 | } | |
56 | ||
525bd324 AG |
57 | static void moxie_cpu_realizefn(DeviceState *dev, Error **errp) |
58 | { | |
14a10fc3 | 59 | CPUState *cs = CPU(dev); |
c643bed9 | 60 | MoxieCPUClass *mcc = MOXIE_CPU_GET_CLASS(dev); |
ce5b1bbf LV |
61 | Error *local_err = NULL; |
62 | ||
63 | cpu_exec_realizefn(cs, &local_err); | |
64 | if (local_err != NULL) { | |
65 | error_propagate(errp, local_err); | |
66 | return; | |
67 | } | |
525bd324 | 68 | |
14a10fc3 AF |
69 | qemu_init_vcpu(cs); |
70 | cpu_reset(cs); | |
525bd324 | 71 | |
c643bed9 | 72 | mcc->parent_realize(dev, errp); |
525bd324 AG |
73 | } |
74 | ||
75 | static void moxie_cpu_initfn(Object *obj) | |
76 | { | |
525bd324 | 77 | MoxieCPU *cpu = MOXIE_CPU(obj); |
525bd324 | 78 | |
7506ed90 | 79 | cpu_set_cpustate_pointers(cpu); |
525bd324 AG |
80 | } |
81 | ||
82 | static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model) | |
83 | { | |
a7f981cc IM |
84 | ObjectClass *oc; |
85 | char *typename; | |
86 | ||
0255db23 | 87 | typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model); |
a7f981cc IM |
88 | oc = object_class_by_name(typename); |
89 | g_free(typename); | |
525bd324 AG |
90 | if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) || |
91 | object_class_is_abstract(oc))) { | |
92 | return NULL; | |
93 | } | |
94 | return oc; | |
95 | } | |
96 | ||
78271684 CF |
97 | #include "hw/core/tcg-cpu-ops.h" |
98 | ||
99 | static struct TCGCPUOps moxie_tcg_ops = { | |
100 | .initialize = moxie_translate_init, | |
101 | .tlb_fill = moxie_cpu_tlb_fill, | |
102 | ||
103 | #ifndef CONFIG_USER_ONLY | |
104 | .do_interrupt = moxie_cpu_do_interrupt, | |
105 | #endif /* !CONFIG_USER_ONLY */ | |
106 | }; | |
107 | ||
525bd324 AG |
108 | static void moxie_cpu_class_init(ObjectClass *oc, void *data) |
109 | { | |
110 | DeviceClass *dc = DEVICE_CLASS(oc); | |
111 | CPUClass *cc = CPU_CLASS(oc); | |
112 | MoxieCPUClass *mcc = MOXIE_CPU_CLASS(oc); | |
113 | ||
bf853881 PMD |
114 | device_class_set_parent_realize(dc, moxie_cpu_realizefn, |
115 | &mcc->parent_realize); | |
781c67ca | 116 | device_class_set_parent_reset(dc, moxie_cpu_reset, &mcc->parent_reset); |
525bd324 AG |
117 | |
118 | cc->class_by_name = moxie_cpu_class_by_name; | |
119 | ||
8c2e1b00 | 120 | cc->has_work = moxie_cpu_has_work; |
878096ee | 121 | cc->dump_state = moxie_cpu_dump_state; |
a10b978c | 122 | cc->set_pc = moxie_cpu_set_pc; |
ccfd61fc | 123 | #ifndef CONFIG_USER_ONLY |
00b941e5 AF |
124 | cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug; |
125 | cc->vmsd = &vmstate_moxie_cpu; | |
126 | #endif | |
9f87a4ca | 127 | cc->disas_set_info = moxie_cpu_disas_set_info; |
78271684 | 128 | cc->tcg_ops = &moxie_tcg_ops; |
525bd324 AG |
129 | } |
130 | ||
131 | static void moxielite_initfn(Object *obj) | |
132 | { | |
133 | /* Set cpu feature flags */ | |
134 | } | |
135 | ||
136 | static void moxie_any_initfn(Object *obj) | |
137 | { | |
138 | /* Set cpu feature flags */ | |
139 | } | |
140 | ||
0255db23 IM |
141 | #define DEFINE_MOXIE_CPU_TYPE(cpu_model, initfn) \ |
142 | { \ | |
143 | .parent = TYPE_MOXIE_CPU, \ | |
144 | .instance_init = initfn, \ | |
145 | .name = MOXIE_CPU_TYPE_NAME(cpu_model), \ | |
146 | } | |
525bd324 | 147 | |
0255db23 IM |
148 | static const TypeInfo moxie_cpus_type_infos[] = { |
149 | { /* base class should be registered first */ | |
150 | .name = TYPE_MOXIE_CPU, | |
151 | .parent = TYPE_CPU, | |
525bd324 | 152 | .instance_size = sizeof(MoxieCPU), |
0255db23 | 153 | .instance_init = moxie_cpu_initfn, |
525bd324 | 154 | .class_size = sizeof(MoxieCPUClass), |
0255db23 IM |
155 | .class_init = moxie_cpu_class_init, |
156 | }, | |
157 | DEFINE_MOXIE_CPU_TYPE("MoxieLite", moxielite_initfn), | |
158 | DEFINE_MOXIE_CPU_TYPE("any", moxie_any_initfn), | |
525bd324 AG |
159 | }; |
160 | ||
0255db23 | 161 | DEFINE_TYPES(moxie_cpus_type_infos) |