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0a6ed700 MM |
1 | /* |
2 | * libqos virtio MMIO driver | |
3 | * | |
4 | * Copyright (c) 2014 Marc Marí | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
7 | * See the COPYING file in the top-level directory. | |
8 | */ | |
9 | ||
681c28a3 | 10 | #include "qemu/osdep.h" |
0a6ed700 MM |
11 | #include "libqtest.h" |
12 | #include "libqos/virtio.h" | |
13 | #include "libqos/virtio-mmio.h" | |
14 | #include "libqos/malloc.h" | |
15 | #include "libqos/malloc-generic.h" | |
ee3b850a | 16 | #include "standard-headers/linux/virtio_ring.h" |
0a6ed700 MM |
17 | |
18 | static uint8_t qvirtio_mmio_config_readb(QVirtioDevice *d, uint64_t addr) | |
19 | { | |
20 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
21 | return readb(dev->addr + addr); | |
22 | } | |
23 | ||
24 | static uint16_t qvirtio_mmio_config_readw(QVirtioDevice *d, uint64_t addr) | |
25 | { | |
26 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
27 | return readw(dev->addr + addr); | |
28 | } | |
29 | ||
30 | static uint32_t qvirtio_mmio_config_readl(QVirtioDevice *d, uint64_t addr) | |
31 | { | |
32 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
33 | return readl(dev->addr + addr); | |
34 | } | |
35 | ||
36 | static uint64_t qvirtio_mmio_config_readq(QVirtioDevice *d, uint64_t addr) | |
37 | { | |
38 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
39 | return readq(dev->addr + addr); | |
40 | } | |
41 | ||
42 | static uint32_t qvirtio_mmio_get_features(QVirtioDevice *d) | |
43 | { | |
44 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
45 | writel(dev->addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0); | |
46 | return readl(dev->addr + QVIRTIO_MMIO_HOST_FEATURES); | |
47 | } | |
48 | ||
49 | static void qvirtio_mmio_set_features(QVirtioDevice *d, uint32_t features) | |
50 | { | |
51 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
52 | dev->features = features; | |
53 | writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0); | |
54 | writel(dev->addr + QVIRTIO_MMIO_GUEST_FEATURES, features); | |
55 | } | |
56 | ||
57 | static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d) | |
58 | { | |
59 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
60 | return dev->features; | |
61 | } | |
62 | ||
63 | static uint8_t qvirtio_mmio_get_status(QVirtioDevice *d) | |
64 | { | |
65 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
66 | return (uint8_t)readl(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS); | |
67 | } | |
68 | ||
69 | static void qvirtio_mmio_set_status(QVirtioDevice *d, uint8_t status) | |
70 | { | |
71 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
72 | writel(dev->addr + QVIRTIO_MMIO_DEVICE_STATUS, (uint32_t)status); | |
73 | } | |
74 | ||
75 | static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq) | |
76 | { | |
77 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
78 | uint32_t isr; | |
79 | ||
80 | isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 1; | |
81 | if (isr != 0) { | |
82 | writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1); | |
83 | return true; | |
84 | } | |
85 | ||
86 | return false; | |
87 | } | |
88 | ||
89 | static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d) | |
90 | { | |
91 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
92 | uint32_t isr; | |
93 | ||
94 | isr = readl(dev->addr + QVIRTIO_MMIO_INTERRUPT_STATUS) & 2; | |
95 | if (isr != 0) { | |
96 | writel(dev->addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2); | |
97 | return true; | |
98 | } | |
99 | ||
100 | return false; | |
101 | } | |
102 | ||
103 | static void qvirtio_mmio_queue_select(QVirtioDevice *d, uint16_t index) | |
104 | { | |
105 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
106 | writel(dev->addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index); | |
107 | ||
108 | g_assert_cmphex(readl(dev->addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0); | |
109 | } | |
110 | ||
111 | static uint16_t qvirtio_mmio_get_queue_size(QVirtioDevice *d) | |
112 | { | |
113 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
114 | return (uint16_t)readl(dev->addr + QVIRTIO_MMIO_QUEUE_NUM_MAX); | |
115 | } | |
116 | ||
117 | static void qvirtio_mmio_set_queue_address(QVirtioDevice *d, uint32_t pfn) | |
118 | { | |
119 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
120 | writel(dev->addr + QVIRTIO_MMIO_QUEUE_PFN, pfn); | |
121 | } | |
122 | ||
123 | static QVirtQueue *qvirtio_mmio_virtqueue_setup(QVirtioDevice *d, | |
124 | QGuestAllocator *alloc, uint16_t index) | |
125 | { | |
126 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
127 | QVirtQueue *vq; | |
128 | uint64_t addr; | |
129 | ||
130 | vq = g_malloc0(sizeof(*vq)); | |
131 | qvirtio_mmio_queue_select(d, index); | |
132 | writel(dev->addr + QVIRTIO_MMIO_QUEUE_ALIGN, dev->page_size); | |
133 | ||
134 | vq->index = index; | |
135 | vq->size = qvirtio_mmio_get_queue_size(d); | |
136 | vq->free_head = 0; | |
137 | vq->num_free = vq->size; | |
138 | vq->align = dev->page_size; | |
ee3b850a SH |
139 | vq->indirect = (dev->features & (1u << VIRTIO_RING_F_INDIRECT_DESC)) != 0; |
140 | vq->event = (dev->features & (1u << VIRTIO_RING_F_EVENT_IDX)) != 0; | |
0a6ed700 MM |
141 | |
142 | writel(dev->addr + QVIRTIO_MMIO_QUEUE_NUM, vq->size); | |
143 | ||
144 | /* Check different than 0 */ | |
145 | g_assert_cmpint(vq->size, !=, 0); | |
146 | ||
147 | /* Check power of 2 */ | |
148 | g_assert_cmpint(vq->size & (vq->size - 1), ==, 0); | |
149 | ||
150 | addr = guest_alloc(alloc, qvring_size(vq->size, dev->page_size)); | |
151 | qvring_init(alloc, vq, addr); | |
152 | qvirtio_mmio_set_queue_address(d, vq->desc / dev->page_size); | |
153 | ||
154 | return vq; | |
155 | } | |
156 | ||
157 | static void qvirtio_mmio_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq) | |
158 | { | |
159 | QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d; | |
160 | writel(dev->addr + QVIRTIO_MMIO_QUEUE_NOTIFY, vq->index); | |
161 | } | |
162 | ||
163 | const QVirtioBus qvirtio_mmio = { | |
164 | .config_readb = qvirtio_mmio_config_readb, | |
165 | .config_readw = qvirtio_mmio_config_readw, | |
166 | .config_readl = qvirtio_mmio_config_readl, | |
167 | .config_readq = qvirtio_mmio_config_readq, | |
168 | .get_features = qvirtio_mmio_get_features, | |
169 | .set_features = qvirtio_mmio_set_features, | |
170 | .get_guest_features = qvirtio_mmio_get_guest_features, | |
171 | .get_status = qvirtio_mmio_get_status, | |
172 | .set_status = qvirtio_mmio_set_status, | |
173 | .get_queue_isr_status = qvirtio_mmio_get_queue_isr_status, | |
174 | .get_config_isr_status = qvirtio_mmio_get_config_isr_status, | |
175 | .queue_select = qvirtio_mmio_queue_select, | |
176 | .get_queue_size = qvirtio_mmio_get_queue_size, | |
177 | .set_queue_address = qvirtio_mmio_set_queue_address, | |
178 | .virtqueue_setup = qvirtio_mmio_virtqueue_setup, | |
179 | .virtqueue_kick = qvirtio_mmio_virtqueue_kick, | |
180 | }; | |
181 | ||
182 | QVirtioMMIODevice *qvirtio_mmio_init_device(uint64_t addr, uint32_t page_size) | |
183 | { | |
184 | QVirtioMMIODevice *dev; | |
185 | uint32_t magic; | |
186 | dev = g_malloc0(sizeof(*dev)); | |
187 | ||
188 | magic = readl(addr + QVIRTIO_MMIO_MAGIC_VALUE); | |
189 | g_assert(magic == ('v' | 'i' << 8 | 'r' << 16 | 't' << 24)); | |
190 | ||
191 | dev->addr = addr; | |
192 | dev->page_size = page_size; | |
193 | dev->vdev.device_type = readl(addr + QVIRTIO_MMIO_DEVICE_ID); | |
194 | ||
195 | writel(addr + QVIRTIO_MMIO_GUEST_PAGE_SIZE, page_size); | |
196 | ||
197 | return dev; | |
198 | } |