[qemu.git] / hw / acpi / cpu.c

#include "qemu/osdep.h"
#include "hw/boards.h"
#include "hw/acpi/cpu.h"
#include "qapi/error.h"
#include "qapi-event.h"
#include "trace.h"

#define ACPI_CPU_HOTPLUG_REG_LEN 12
#define ACPI_CPU_SELECTOR_OFFSET_WR 0
#define ACPI_CPU_FLAGS_OFFSET_RW 4
#define ACPI_CPU_CMD_OFFSET_WR 5
#define ACPI_CPU_CMD_DATA_OFFSET_RW 8

enum {
    CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
    CPHP_OST_EVENT_CMD = 1,
    CPHP_OST_STATUS_CMD = 2,
    CPHP_CMD_MAX
};

static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
{
    ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);

    info->slot_type = ACPI_SLOT_TYPE_CPU;
    info->slot = g_strdup_printf("%d", idx);
    info->source = cdev->ost_event;
    info->status = cdev->ost_status;
    if (cdev->cpu) {
        DeviceState *dev = DEVICE(cdev->cpu);
        if (dev->id) {
            info->device = g_strdup(dev->id);
            info->has_device = true;
        }
    }
    return info;
}

void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
{
    int i;

    for (i = 0; i < cpu_st->dev_count; i++) {
        ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
        elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
        elem->next = NULL;
        **list = elem;
        *list = &elem->next;
    }
}

static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
{
    uint64_t val = 0;
    CPUHotplugState *cpu_st = opaque;
    AcpiCpuStatus *cdev;

    if (cpu_st->selector >= cpu_st->dev_count) {
        return val;
    }

    cdev = &cpu_st->devs[cpu_st->selector];
    switch (addr) {
    case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
        val |= cdev->cpu ? 1 : 0;
        val |= cdev->is_inserting ? 2 : 0;
        val |= cdev->is_removing  ? 4 : 0;
        trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
        break;
    case ACPI_CPU_CMD_DATA_OFFSET_RW:
        switch (cpu_st->command) {
        case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
           val = cpu_st->selector;
           break;
        default:
           break;
        }
        trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
        break;
    default:
        break;
    }
    return val;
}

static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
                           unsigned int size)
{
    CPUHotplugState *cpu_st = opaque;
    AcpiCpuStatus *cdev;
    ACPIOSTInfo *info;

    assert(cpu_st->dev_count);

    if (addr) {
        if (cpu_st->selector >= cpu_st->dev_count) {
            trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
            return;
        }
    }

    switch (addr) {
    case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
        cpu_st->selector = data;
        trace_cpuhp_acpi_write_idx(cpu_st->selector);
        break;
    case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields  */
        cdev = &cpu_st->devs[cpu_st->selector];
        if (data & 2) { /* clear insert event */
            cdev->is_inserting = false;
            trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
        } else if (data & 4) { /* clear remove event */
            cdev->is_removing = false;
            trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
        } else if (data & 8) {
            DeviceState *dev = NULL;
            HotplugHandler *hotplug_ctrl = NULL;

            if (!cdev->cpu) {
                trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
                break;
            }

            trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
            dev = DEVICE(cdev->cpu);
            hotplug_ctrl = qdev_get_hotplug_handler(dev);
            hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
        }
        break;
    case ACPI_CPU_CMD_OFFSET_WR:
        trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
        if (data < CPHP_CMD_MAX) {
            cpu_st->command = data;
            if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
                uint32_t iter = cpu_st->selector;

                do {
                    cdev = &cpu_st->devs[iter];
                    if (cdev->is_inserting || cdev->is_removing) {
                        cpu_st->selector = iter;
                        trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
                            cdev->is_inserting, cdev->is_removing);
                        break;
                    }
                    iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
                } while (iter != cpu_st->selector);
            }
        }
        break;
    case ACPI_CPU_CMD_DATA_OFFSET_RW:
        switch (cpu_st->command) {
        case CPHP_OST_EVENT_CMD: {
           cdev = &cpu_st->devs[cpu_st->selector];
           cdev->ost_event = data;
           trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
           break;
        }
        case CPHP_OST_STATUS_CMD: {
           cdev = &cpu_st->devs[cpu_st->selector];
           cdev->ost_status = data;
           info = acpi_cpu_device_status(cpu_st->selector, cdev);
           qapi_event_send_acpi_device_ost(info, &error_abort);
           qapi_free_ACPIOSTInfo(info);
           trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
                                             cdev->ost_status);
           break;
        }
        default:
           break;
        }
        break;
    default:
        break;
    }
}

static const MemoryRegionOps cpu_hotplug_ops = {
    .read = cpu_hotplug_rd,
    .write = cpu_hotplug_wr,
    .endianness = DEVICE_LITTLE_ENDIAN,
    .valid = {
        .min_access_size = 1,
        .max_access_size = 4,
    },
};

void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
                         CPUHotplugState *state, hwaddr base_addr)
{
    MachineState *machine = MACHINE(qdev_get_machine());
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    CPUArchIdList *id_list;
    int i;

    assert(mc->possible_cpu_arch_ids);
    id_list = mc->possible_cpu_arch_ids(machine);
    state->dev_count = id_list->len;
    state->devs = g_new0(typeof(*state->devs), state->dev_count);
    for (i = 0; i < id_list->len; i++) {
        state->devs[i].cpu =  id_list->cpus[i].cpu;
        state->devs[i].arch_id = id_list->cpus[i].arch_id;
    }
    g_free(id_list);
    memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
                          "acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
    memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
}

static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
{
    CPUClass *k = CPU_GET_CLASS(dev);
    uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
    int i;

    for (i = 0; i < cpu_st->dev_count; i++) {
        if (cpu_arch_id == cpu_st->devs[i].arch_id) {
            return &cpu_st->devs[i];
        }
    }
    return NULL;
}

void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
                      CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
{
    AcpiCpuStatus *cdev;

    cdev = get_cpu_status(cpu_st, dev);
    if (!cdev) {
        return;
    }

    cdev->cpu = CPU(dev);
    if (dev->hotplugged) {
        cdev->is_inserting = true;
        acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
    }
}

void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
                                CPUHotplugState *cpu_st,
                                DeviceState *dev, Error **errp)
{
    AcpiCpuStatus *cdev;

    cdev = get_cpu_status(cpu_st, dev);
    if (!cdev) {
        return;
    }

    cdev->is_removing = true;
    acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
}

void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
                        DeviceState *dev, Error **errp)
{
    AcpiCpuStatus *cdev;

    cdev = get_cpu_status(cpu_st, dev);
    if (!cdev) {
        return;
    }

    cdev->cpu = NULL;
}

static const VMStateDescription vmstate_cpuhp_sts = {
    .name = "CPU hotplug device state",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
        VMSTATE_BOOL(is_removing, AcpiCpuStatus),
        VMSTATE_UINT32(ost_event, AcpiCpuStatus),
        VMSTATE_UINT32(ost_status, AcpiCpuStatus),
        VMSTATE_END_OF_LIST()
    }
};

const VMStateDescription vmstate_cpu_hotplug = {
    .name = "CPU hotplug state",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField[]) {
        VMSTATE_UINT32(selector, CPUHotplugState),
        VMSTATE_UINT8(command, CPUHotplugState),
        VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
                                             vmstate_cpuhp_sts, AcpiCpuStatus),
        VMSTATE_END_OF_LIST()
    }
};

#define CPU_NAME_FMT      "C%.03X"
#define CPUHP_RES_DEVICE  "PRES"
#define CPU_LOCK          "CPLK"
#define CPU_STS_METHOD    "CSTA"
#define CPU_SCAN_METHOD   "CSCN"
#define CPU_NOTIFY_METHOD "CTFY"
#define CPU_EJECT_METHOD  "CEJ0"
#define CPU_OST_METHOD    "COST"

#define CPU_ENABLED       "CPEN"
#define CPU_SELECTOR      "CSEL"
#define CPU_COMMAND       "CCMD"
#define CPU_DATA          "CDAT"
#define CPU_INSERT_EVENT  "CINS"
#define CPU_REMOVE_EVENT  "CRMV"
#define CPU_EJECT_EVENT   "CEJ0"

void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
                    hwaddr io_base,
                    const char *res_root,
                    const char *event_handler_method)
{
    Aml *ifctx;
    Aml *field;
    Aml *method;
    Aml *cpu_ctrl_dev;
    Aml *cpus_dev;
    Aml *zero = aml_int(0);
    Aml *one = aml_int(1);
    Aml *sb_scope = aml_scope("_SB");
    MachineClass *mc = MACHINE_GET_CLASS(machine);
    CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
    char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
    Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
    AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
    AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);

    cpu_ctrl_dev = aml_device("%s", cphp_res_path);
    {
        Aml *crs;

        aml_append(cpu_ctrl_dev,
            aml_name_decl("_HID", aml_eisaid("PNP0A06")));
        aml_append(cpu_ctrl_dev,
            aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
        aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));

        crs = aml_resource_template();
        aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
                               ACPI_CPU_HOTPLUG_REG_LEN));
        aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));

        /* declare CPU hotplug MMIO region with related access fields */
        aml_append(cpu_ctrl_dev,
            aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
                                 ACPI_CPU_HOTPLUG_REG_LEN));

        field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
                          AML_WRITE_AS_ZEROS);
        aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
        /* 1 if enabled, read only */
        aml_append(field, aml_named_field(CPU_ENABLED, 1));
        /* (read) 1 if has a insert event. (write) 1 to clear event */
        aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
        /* (read) 1 if has a remove event. (write) 1 to clear event */
        aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
        /* initiates device eject, write only */
        aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
        aml_append(field, aml_reserved_field(4));
        aml_append(field, aml_named_field(CPU_COMMAND, 8));
        aml_append(cpu_ctrl_dev, field);

        field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
        /* CPU selector, write only */
        aml_append(field, aml_named_field(CPU_SELECTOR, 32));
        /* flags + cmd + 2byte align */
        aml_append(field, aml_reserved_field(4 * 8));
        aml_append(field, aml_named_field(CPU_DATA, 32));
        aml_append(cpu_ctrl_dev, field);

    }
    aml_append(sb_scope, cpu_ctrl_dev);

    cpus_dev = aml_device("\\_SB.CPUS");
    {
        int i;
        Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
        Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
        Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
        Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
        Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
        Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
        Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
        Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);

        aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
        aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));

        method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
        for (i = 0; i < arch_ids->len; i++) {
            Aml *cpu = aml_name(CPU_NAME_FMT, i);
            Aml *uid = aml_arg(0);
            Aml *event = aml_arg(1);

            ifctx = aml_if(aml_equal(uid, aml_int(i)));
            {
                aml_append(ifctx, aml_notify(cpu, event));
            }
            aml_append(method, ifctx);
        }
        aml_append(cpus_dev, method);

        method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
        {
            Aml *idx = aml_arg(0);
            Aml *sta = aml_local(0);

            aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
            aml_append(method, aml_store(idx, cpu_selector));
            aml_append(method, aml_store(zero, sta));
            ifctx = aml_if(aml_equal(is_enabled, one));
            {
                aml_append(ifctx, aml_store(aml_int(0xF), sta));
            }
            aml_append(method, ifctx);
            aml_append(method, aml_release(ctrl_lock));
            aml_append(method, aml_return(sta));
        }
        aml_append(cpus_dev, method);

        method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
        {
            Aml *idx = aml_arg(0);

            aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
            aml_append(method, aml_store(idx, cpu_selector));
            aml_append(method, aml_store(one, ej_evt));
            aml_append(method, aml_release(ctrl_lock));
        }
        aml_append(cpus_dev, method);

        method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
        {
            Aml *else_ctx;
            Aml *while_ctx;
            Aml *has_event = aml_local(0);
            Aml *dev_chk = aml_int(1);
            Aml *eject_req = aml_int(3);
            Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);

            aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
            aml_append(method, aml_store(one, has_event));
            while_ctx = aml_while(aml_equal(has_event, one));
            {
                 /* clear loop exit condition, ins_evt/rm_evt checks
                  * will set it to 1 while next_cpu_cmd returns a CPU
                  * with events */
                 aml_append(while_ctx, aml_store(zero, has_event));
                 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
                 ifctx = aml_if(aml_equal(ins_evt, one));
                 {
                     aml_append(ifctx,
                         aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
                     aml_append(ifctx, aml_store(one, ins_evt));
                     aml_append(ifctx, aml_store(one, has_event));
                 }
                 aml_append(while_ctx, ifctx);
                 else_ctx = aml_else();
                 ifctx = aml_if(aml_equal(rm_evt, one));
                 {
                     aml_append(ifctx,
                         aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
                     aml_append(ifctx, aml_store(one, rm_evt));
                     aml_append(ifctx, aml_store(one, has_event));
                 }
                 aml_append(else_ctx, ifctx);
                 aml_append(while_ctx, else_ctx);
            }
            aml_append(method, while_ctx);
            aml_append(method, aml_release(ctrl_lock));
        }
        aml_append(cpus_dev, method);

        method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
        {
            Aml *uid = aml_arg(0);
            Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
            Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);

            aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
            aml_append(method, aml_store(uid, cpu_selector));
            aml_append(method, aml_store(ev_cmd, cpu_cmd));
            aml_append(method, aml_store(aml_arg(1), cpu_data));
            aml_append(method, aml_store(st_cmd, cpu_cmd));
            aml_append(method, aml_store(aml_arg(2), cpu_data));
            aml_append(method, aml_release(ctrl_lock));
        }
        aml_append(cpus_dev, method);

        /* build Processor object for each processor */
        for (i = 0; i < arch_ids->len; i++) {
            Aml *dev;
            Aml *uid = aml_int(i);
            GArray *madt_buf = g_array_new(0, 1, 1);
            int arch_id = arch_ids->cpus[i].arch_id;

            if (opts.apci_1_compatible && arch_id < 255) {
                dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
            } else {
                dev = aml_device(CPU_NAME_FMT, i);
                aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
                aml_append(dev, aml_name_decl("_UID", uid));
            }

            method = aml_method("_STA", 0, AML_SERIALIZED);
            aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
            aml_append(dev, method);

            /* build _MAT object */
            assert(adevc && adevc->madt_cpu);
            adevc->madt_cpu(adev, i, arch_ids, madt_buf);
            switch (madt_buf->data[0]) {
            case ACPI_APIC_PROCESSOR: {
                AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
                apic->flags = cpu_to_le32(1);
                break;
            }
            default:
                assert(0);
            }
            aml_append(dev, aml_name_decl("_MAT",
                aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
            g_array_free(madt_buf, true);

            method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
            aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
            aml_append(dev, method);

            method = aml_method("_OST", 3, AML_SERIALIZED);
            aml_append(method,
                aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
                          aml_arg(1), aml_arg(2))
            );
            aml_append(dev, method);
            aml_append(cpus_dev, dev);
        }
    }
    aml_append(sb_scope, cpus_dev);
    aml_append(table, sb_scope);

    method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
    aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
    aml_append(table, method);

    g_free(cphp_res_path);
    g_free(arch_ids);
}
Commit	Line	Data
5e1b5d93 IM	1	#include "qemu/osdep.h"
	2	#include "hw/boards.h"
	3	#include "hw/acpi/cpu.h"
	4	#include "qapi/error.h"
76623d00	5	#include "qapi-event.h"
5e1b5d93 IM	6	#include "trace.h"
	7
	8	#define ACPI_CPU_HOTPLUG_REG_LEN 12
	9	#define ACPI_CPU_SELECTOR_OFFSET_WR 0
	10	#define ACPI_CPU_FLAGS_OFFSET_RW 4
d2238cb6 IM	11	#define ACPI_CPU_CMD_OFFSET_WR 5
	12	#define ACPI_CPU_CMD_DATA_OFFSET_RW 8
	13
	14	enum {
	15	CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
76623d00 IM	16	CPHP_OST_EVENT_CMD = 1,
76623d00 IM	17	CPHP_OST_STATUS_CMD = 2,
d2238cb6 IM	18	CPHP_CMD_MAX
d2238cb6 IM	19	};
5e1b5d93	20
76623d00 IM	21	static ACPIOSTInfo acpi_cpu_device_status(int idx, AcpiCpuStatus cdev)
	22	{
	23	ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
	24
	25	info->slot_type = ACPI_SLOT_TYPE_CPU;
	26	info->slot = g_strdup_printf("%d", idx);
	27	info->source = cdev->ost_event;
	28	info->status = cdev->ost_status;
	29	if (cdev->cpu) {
	30	DeviceState *dev = DEVICE(cdev->cpu);
	31	if (dev->id) {
	32	info->device = g_strdup(dev->id);
	33	info->has_device = true;
	34	}
	35	}
	36	return info;
	37	}
	38
	39	void acpi_cpu_ospm_status(CPUHotplugState cpu_st, ACPIOSTInfoList **list)
	40	{
	41	int i;
	42
	43	for (i = 0; i < cpu_st->dev_count; i++) {
	44	ACPIOSTInfoList *elem = g_new0(ACPIOSTInfoList, 1);
	45	elem->value = acpi_cpu_device_status(i, &cpu_st->devs[i]);
	46	elem->next = NULL;
	47	**list = elem;
	48	*list = &elem->next;
	49	}
	50	}
	51
5e1b5d93 IM	52	static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
	53	{
	54	uint64_t val = 0;
	55	CPUHotplugState *cpu_st = opaque;
	56	AcpiCpuStatus *cdev;
	57
	58	if (cpu_st->selector >= cpu_st->dev_count) {
	59	return val;
	60	}
	61
	62	cdev = &cpu_st->devs[cpu_st->selector];
	63	switch (addr) {
	64	case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
	65	val \|= cdev->cpu ? 1 : 0;
d2238cb6	66	val \|= cdev->is_inserting ? 2 : 0;
8872c25a	67	val \|= cdev->is_removing ? 4 : 0;
5e1b5d93 IM	68	trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
5e1b5d93 IM	69	break;
d2238cb6 IM	70	case ACPI_CPU_CMD_DATA_OFFSET_RW:
	71	switch (cpu_st->command) {
	72	case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
	73	val = cpu_st->selector;
	74	break;
	75	default:
	76	break;
	77	}
	78	trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
	79	break;
5e1b5d93 IM	80	default:
	81	break;
	82	}
	83	return val;
	84	}
	85
	86	static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
	87	unsigned int size)
	88	{
	89	CPUHotplugState *cpu_st = opaque;
d2238cb6	90	AcpiCpuStatus *cdev;
76623d00	91	ACPIOSTInfo *info;
5e1b5d93 IM	92
	93	assert(cpu_st->dev_count);
	94
	95	if (addr) {
	96	if (cpu_st->selector >= cpu_st->dev_count) {
	97	trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
	98	return;
	99	}
	100	}
	101
	102	switch (addr) {
	103	case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
	104	cpu_st->selector = data;
	105	trace_cpuhp_acpi_write_idx(cpu_st->selector);
	106	break;
d2238cb6 IM	107	case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
	108	cdev = &cpu_st->devs[cpu_st->selector];
	109	if (data & 2) { /* clear insert event */
	110	cdev->is_inserting = false;
	111	trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
8872c25a IM	112	} else if (data & 4) { /* clear remove event */
	113	cdev->is_removing = false;
	114	trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
	115	} else if (data & 8) {
	116	DeviceState *dev = NULL;
	117	HotplugHandler *hotplug_ctrl = NULL;
	118
	119	if (!cdev->cpu) {
	120	trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
	121	break;
	122	}
	123
	124	trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
	125	dev = DEVICE(cdev->cpu);
	126	hotplug_ctrl = qdev_get_hotplug_handler(dev);
	127	hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
d2238cb6 IM	128	}
	129	break;
	130	case ACPI_CPU_CMD_OFFSET_WR:
	131	trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
	132	if (data < CPHP_CMD_MAX) {
	133	cpu_st->command = data;
	134	if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
	135	uint32_t iter = cpu_st->selector;
	136
	137	do {
	138	cdev = &cpu_st->devs[iter];
8872c25a	139	if (cdev->is_inserting \|\| cdev->is_removing) {
d2238cb6 IM	140	cpu_st->selector = iter;
d2238cb6 IM	141	trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
8872c25a	142	cdev->is_inserting, cdev->is_removing);
d2238cb6 IM	143	break;
	144	}
	145	iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
	146	} while (iter != cpu_st->selector);
	147	}
	148	}
	149	break;
76623d00 IM	150	case ACPI_CPU_CMD_DATA_OFFSET_RW:
	151	switch (cpu_st->command) {
	152	case CPHP_OST_EVENT_CMD: {
	153	cdev = &cpu_st->devs[cpu_st->selector];
	154	cdev->ost_event = data;
	155	trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
	156	break;
	157	}
	158	case CPHP_OST_STATUS_CMD: {
	159	cdev = &cpu_st->devs[cpu_st->selector];
	160	cdev->ost_status = data;
	161	info = acpi_cpu_device_status(cpu_st->selector, cdev);
	162	qapi_event_send_acpi_device_ost(info, &error_abort);
	163	qapi_free_ACPIOSTInfo(info);
	164	trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
	165	cdev->ost_status);
	166	break;
	167	}
	168	default:
	169	break;
	170	}
	171	break;
5e1b5d93 IM	172	default:
	173	break;
	174	}
	175	}
	176
	177	static const MemoryRegionOps cpu_hotplug_ops = {
	178	.read = cpu_hotplug_rd,
	179	.write = cpu_hotplug_wr,
	180	.endianness = DEVICE_LITTLE_ENDIAN,
	181	.valid = {
	182	.min_access_size = 1,
	183	.max_access_size = 4,
	184	},
	185	};
	186
	187	void cpu_hotplug_hw_init(MemoryRegion as, Object owner,
	188	CPUHotplugState *state, hwaddr base_addr)
	189	{
	190	MachineState *machine = MACHINE(qdev_get_machine());
	191	MachineClass *mc = MACHINE_GET_CLASS(machine);
	192	CPUArchIdList *id_list;
	193	int i;
	194
	195	assert(mc->possible_cpu_arch_ids);
	196	id_list = mc->possible_cpu_arch_ids(machine);
	197	state->dev_count = id_list->len;
	198	state->devs = g_new0(typeof(*state->devs), state->dev_count);
	199	for (i = 0; i < id_list->len; i++) {
	200	state->devs[i].cpu = id_list->cpus[i].cpu;
	201	state->devs[i].arch_id = id_list->cpus[i].arch_id;
	202	}
	203	g_free(id_list);
	204	memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
	205	"acpi-mem-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
	206	memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
	207	}
	208
	209	static AcpiCpuStatus get_cpu_status(CPUHotplugState cpu_st, DeviceState *dev)
	210	{
	211	CPUClass *k = CPU_GET_CLASS(dev);
	212	uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
	213	int i;
	214
	215	for (i = 0; i < cpu_st->dev_count; i++) {
	216	if (cpu_arch_id == cpu_st->devs[i].arch_id) {
	217	return &cpu_st->devs[i];
	218	}
	219	}
	220	return NULL;
	221	}
	222
	223	void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
	224	CPUHotplugState cpu_st, DeviceState dev, Error **errp)
	225	{
	226	AcpiCpuStatus *cdev;
	227
	228	cdev = get_cpu_status(cpu_st, dev);
	229	if (!cdev) {
	230	return;
	231	}
	232
	233	cdev->cpu = CPU(dev);
d2238cb6 IM	234	if (dev->hotplugged) {
	235	cdev->is_inserting = true;
	236	acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
	237	}
5e1b5d93 IM	238	}
5e1b5d93 IM	239
8872c25a IM	240	void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
	241	CPUHotplugState *cpu_st,
	242	DeviceState dev, Error *errp)
	243	{
	244	AcpiCpuStatus *cdev;
	245
	246	cdev = get_cpu_status(cpu_st, dev);
	247	if (!cdev) {
	248	return;
	249	}
	250
	251	cdev->is_removing = true;
	252	acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
	253	}
	254
	255	void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
	256	DeviceState dev, Error *errp)
	257	{
	258	AcpiCpuStatus *cdev;
	259
	260	cdev = get_cpu_status(cpu_st, dev);
	261	if (!cdev) {
	262	return;
	263	}
	264
	265	cdev->cpu = NULL;
	266	}
	267
d2238cb6 IM	268	static const VMStateDescription vmstate_cpuhp_sts = {
	269	.name = "CPU hotplug device state",
	270	.version_id = 1,
	271	.minimum_version_id = 1,
	272	.minimum_version_id_old = 1,
	273	.fields = (VMStateField[]) {
	274	VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
8872c25a	275	VMSTATE_BOOL(is_removing, AcpiCpuStatus),
76623d00 IM	276	VMSTATE_UINT32(ost_event, AcpiCpuStatus),
76623d00 IM	277	VMSTATE_UINT32(ost_status, AcpiCpuStatus),
d2238cb6 IM	278	VMSTATE_END_OF_LIST()
	279	}
	280	};
	281
5e1b5d93 IM	282	const VMStateDescription vmstate_cpu_hotplug = {
	283	.name = "CPU hotplug state",
	284	.version_id = 1,
	285	.minimum_version_id = 1,
	286	.minimum_version_id_old = 1,
	287	.fields = (VMStateField[]) {
	288	VMSTATE_UINT32(selector, CPUHotplugState),
d2238cb6 IM	289	VMSTATE_UINT8(command, CPUHotplugState),
	290	VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
	291	vmstate_cpuhp_sts, AcpiCpuStatus),
5e1b5d93 IM	292	VMSTATE_END_OF_LIST()
	293	}
	294	};
	295
	296	#define CPU_NAME_FMT "C%.03X"
	297	#define CPUHP_RES_DEVICE "PRES"
	298	#define CPU_LOCK "CPLK"
	299	#define CPU_STS_METHOD "CSTA"
d2238cb6 IM	300	#define CPU_SCAN_METHOD "CSCN"
d2238cb6 IM	301	#define CPU_NOTIFY_METHOD "CTFY"
8872c25a	302	#define CPU_EJECT_METHOD "CEJ0"
76623d00	303	#define CPU_OST_METHOD "COST"
5e1b5d93 IM	304
	305	#define CPU_ENABLED "CPEN"
	306	#define CPU_SELECTOR "CSEL"
d2238cb6 IM	307	#define CPU_COMMAND "CCMD"
	308	#define CPU_DATA "CDAT"
	309	#define CPU_INSERT_EVENT "CINS"
8872c25a IM	310	#define CPU_REMOVE_EVENT "CRMV"
8872c25a IM	311	#define CPU_EJECT_EVENT "CEJ0"
5e1b5d93 IM	312
	313	void build_cpus_aml(Aml table, MachineState machine, CPUHotplugFeatures opts,
	314	hwaddr io_base,
d2238cb6 IM	315	const char *res_root,
d2238cb6 IM	316	const char *event_handler_method)
5e1b5d93 IM	317	{
	318	Aml *ifctx;
	319	Aml *field;
	320	Aml *method;
	321	Aml *cpu_ctrl_dev;
	322	Aml *cpus_dev;
	323	Aml *zero = aml_int(0);
	324	Aml *one = aml_int(1);
	325	Aml *sb_scope = aml_scope("_SB");
	326	MachineClass *mc = MACHINE_GET_CLASS(machine);
	327	CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
	328	char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
d2238cb6 IM	329	Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
	330	AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
	331	AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
5e1b5d93 IM	332
	333	cpu_ctrl_dev = aml_device("%s", cphp_res_path);
	334	{
	335	Aml *crs;
	336
	337	aml_append(cpu_ctrl_dev,
	338	aml_name_decl("_HID", aml_eisaid("PNP0A06")));
	339	aml_append(cpu_ctrl_dev,
	340	aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
	341	aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
	342
	343	crs = aml_resource_template();
	344	aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
	345	ACPI_CPU_HOTPLUG_REG_LEN));
	346	aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
	347
	348	/* declare CPU hotplug MMIO region with related access fields */
	349	aml_append(cpu_ctrl_dev,
	350	aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
	351	ACPI_CPU_HOTPLUG_REG_LEN));
	352
	353	field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
	354	AML_WRITE_AS_ZEROS);
	355	aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
	356	/* 1 if enabled, read only */
	357	aml_append(field, aml_named_field(CPU_ENABLED, 1));
d2238cb6 IM	358	/* (read) 1 if has a insert event. (write) 1 to clear event */
d2238cb6 IM	359	aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
8872c25a IM	360	/* (read) 1 if has a remove event. (write) 1 to clear event */
	361	aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
	362	/* initiates device eject, write only */
	363	aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
	364	aml_append(field, aml_reserved_field(4));
d2238cb6	365	aml_append(field, aml_named_field(CPU_COMMAND, 8));
5e1b5d93 IM	366	aml_append(cpu_ctrl_dev, field);
	367
	368	field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
	369	/* CPU selector, write only */
	370	aml_append(field, aml_named_field(CPU_SELECTOR, 32));
d2238cb6 IM	371	/* flags + cmd + 2byte align */
	372	aml_append(field, aml_reserved_field(4 * 8));
	373	aml_append(field, aml_named_field(CPU_DATA, 32));
5e1b5d93 IM	374	aml_append(cpu_ctrl_dev, field);
	375
	376	}
	377	aml_append(sb_scope, cpu_ctrl_dev);
	378
	379	cpus_dev = aml_device("\\_SB.CPUS");
	380	{
	381	int i;
	382	Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
	383	Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
	384	Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
d2238cb6 IM	385	Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
	386	Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
	387	Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
8872c25a IM	388	Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
8872c25a IM	389	Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
5e1b5d93 IM	390
	391	aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
	392	aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
	393
d2238cb6 IM	394	method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
	395	for (i = 0; i < arch_ids->len; i++) {
	396	Aml *cpu = aml_name(CPU_NAME_FMT, i);
	397	Aml *uid = aml_arg(0);
	398	Aml *event = aml_arg(1);
	399
	400	ifctx = aml_if(aml_equal(uid, aml_int(i)));
	401	{
	402	aml_append(ifctx, aml_notify(cpu, event));
	403	}
	404	aml_append(method, ifctx);
	405	}
	406	aml_append(cpus_dev, method);
	407
5e1b5d93 IM	408	method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
	409	{
	410	Aml *idx = aml_arg(0);
	411	Aml *sta = aml_local(0);
	412
	413	aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
	414	aml_append(method, aml_store(idx, cpu_selector));
	415	aml_append(method, aml_store(zero, sta));
	416	ifctx = aml_if(aml_equal(is_enabled, one));
	417	{
	418	aml_append(ifctx, aml_store(aml_int(0xF), sta));
	419	}
	420	aml_append(method, ifctx);
	421	aml_append(method, aml_release(ctrl_lock));
	422	aml_append(method, aml_return(sta));
	423	}
	424	aml_append(cpus_dev, method);
	425
8872c25a IM	426	method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
	427	{
	428	Aml *idx = aml_arg(0);
	429
	430	aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
	431	aml_append(method, aml_store(idx, cpu_selector));
	432	aml_append(method, aml_store(one, ej_evt));
	433	aml_append(method, aml_release(ctrl_lock));
	434	}
	435	aml_append(cpus_dev, method);
	436
d2238cb6 IM	437	method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
d2238cb6 IM	438	{
8872c25a	439	Aml *else_ctx;
d2238cb6 IM	440	Aml *while_ctx;
	441	Aml *has_event = aml_local(0);
	442	Aml *dev_chk = aml_int(1);
8872c25a	443	Aml *eject_req = aml_int(3);
d2238cb6 IM	444	Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
	445
	446	aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
	447	aml_append(method, aml_store(one, has_event));
	448	while_ctx = aml_while(aml_equal(has_event, one));
	449	{
8872c25a	450	/* clear loop exit condition, ins_evt/rm_evt checks
d2238cb6 IM	451	* will set it to 1 while next_cpu_cmd returns a CPU
	452	* with events */
	453	aml_append(while_ctx, aml_store(zero, has_event));
	454	aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
	455	ifctx = aml_if(aml_equal(ins_evt, one));
	456	{
	457	aml_append(ifctx,
	458	aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
	459	aml_append(ifctx, aml_store(one, ins_evt));
	460	aml_append(ifctx, aml_store(one, has_event));
	461	}
	462	aml_append(while_ctx, ifctx);
8872c25a IM	463	else_ctx = aml_else();
	464	ifctx = aml_if(aml_equal(rm_evt, one));
	465	{
	466	aml_append(ifctx,
	467	aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
	468	aml_append(ifctx, aml_store(one, rm_evt));
	469	aml_append(ifctx, aml_store(one, has_event));
	470	}
	471	aml_append(else_ctx, ifctx);
	472	aml_append(while_ctx, else_ctx);
d2238cb6 IM	473	}
	474	aml_append(method, while_ctx);
	475	aml_append(method, aml_release(ctrl_lock));
	476	}
	477	aml_append(cpus_dev, method);
	478
76623d00 IM	479	method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
	480	{
	481	Aml *uid = aml_arg(0);
	482	Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
	483	Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
	484
	485	aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
	486	aml_append(method, aml_store(uid, cpu_selector));
	487	aml_append(method, aml_store(ev_cmd, cpu_cmd));
	488	aml_append(method, aml_store(aml_arg(1), cpu_data));
	489	aml_append(method, aml_store(st_cmd, cpu_cmd));
	490	aml_append(method, aml_store(aml_arg(2), cpu_data));
	491	aml_append(method, aml_release(ctrl_lock));
	492	}
	493	aml_append(cpus_dev, method);
	494
5e1b5d93 IM	495	/* build Processor object for each processor */
	496	for (i = 0; i < arch_ids->len; i++) {
	497	Aml *dev;
	498	Aml *uid = aml_int(i);
d2238cb6	499	GArray *madt_buf = g_array_new(0, 1, 1);
5e1b5d93 IM	500	int arch_id = arch_ids->cpus[i].arch_id;
	501
	502	if (opts.apci_1_compatible && arch_id < 255) {
	503	dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
	504	} else {
	505	dev = aml_device(CPU_NAME_FMT, i);
	506	aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
	507	aml_append(dev, aml_name_decl("_UID", uid));
	508	}
	509
	510	method = aml_method("_STA", 0, AML_SERIALIZED);
	511	aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
	512	aml_append(dev, method);
	513
d2238cb6 IM	514	/* build _MAT object */
	515	assert(adevc && adevc->madt_cpu);
	516	adevc->madt_cpu(adev, i, arch_ids, madt_buf);
	517	switch (madt_buf->data[0]) {
	518	case ACPI_APIC_PROCESSOR: {
	519	AcpiMadtProcessorApic apic = (void )madt_buf->data;
	520	apic->flags = cpu_to_le32(1);
	521	break;
	522	}
	523	default:
	524	assert(0);
	525	}
	526	aml_append(dev, aml_name_decl("_MAT",
	527	aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
	528	g_array_free(madt_buf, true);
	529
8872c25a IM	530	method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
	531	aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
	532	aml_append(dev, method);
	533
76623d00 IM	534	method = aml_method("_OST", 3, AML_SERIALIZED);
	535	aml_append(method,
	536	aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
	537	aml_arg(1), aml_arg(2))
	538	);
	539	aml_append(dev, method);
5e1b5d93 IM	540	aml_append(cpus_dev, dev);
	541	}
	542	}
	543	aml_append(sb_scope, cpus_dev);
	544	aml_append(table, sb_scope);
	545
d2238cb6 IM	546	method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
	547	aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
	548	aml_append(table, method);
	549
5e1b5d93 IM	550	g_free(cphp_res_path);
	551	g_free(arch_ids);
	552	}